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/freebsd/sys/contrib/device-tree/Bindings/dma/
H A Dfsl-edma.txt1 * Freescale enhanced Direct Memory Access(eDMA) Controller
3 The eDMA channels have multiplex capability by programmble memory-mapped
8 * eDMA Controller
10 - compatible :
11 - "fsl,vf610-edma" for eDMA used similar to that on Vybrid vf610 SoC
12 - "fsl,imx7ulp-edma" for eDMA2 used similar to that on i.mx7ulp
13 - "fsl,ls1028a-edma" followed by "fsl,vf610-edma" for eDMA used on the
15 - reg : Specifies base physical address(s) and size of the eDMA registers.
16 The 1st region is eDMA control register's address and size.
19 - interrupts : A list of interrupt-specifiers, one for each entry in
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H A Dti-edma.txt1 Texas Instruments eDMA
8 ------------------------------------------------------------------------------
12 --------------------
13 - compatible: Should be:
14 - "ti,edma3-tpcc" for the channel controller(s) on OMAP,
16 - "ti,k2g-edma3-tpcc", "ti,edma3-tpcc" for the
18 - #dma-cells: Should be set to <2>. The first number is the DMA request
20 - reg: Memory map of eDMA CC
21 - reg-names: "edma3_cc"
22 - interrupts: Interrupt lines for CCINT, MPERR and CCERRINT.
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H A Dfsl,edma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/fsl,edma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale enhanced Direct Memory Access(eDMA) Controller
10 The eDMA channels have multiplex capability by programmable
11 memory-mapped registers. channels are split into two groups, called
16 - Peng Fan <peng.fan@nxp.com>
21 - enum:
22 - fsl,vf610-edma
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H A Dti-dma-crossbar.txt4 - compatible: "ti,dra7-dma-crossbar" for DRA7xx DMA crossbar
5 "ti,am335x-edma-crossbar" for AM335x and AM437x
6 - reg: Memory map for accessing module
7 - #dma-cells: Should be set to match with the DMA controller's dma-cells
8 for ti,dra7-dma-crossbar and <3> for ti,am335x-edma-crossbar.
9 - dma-requests: Number of DMA requests the crossbar can receive
10 - dma-masters: phandle pointing to the DMA controller
13 - dma-requests: Number of DMA requests the controller can handle
16 - ti,dma-safe-map: Safe routing value for unused request lines
17 - ti,reserved-dma-request-ranges: DMA request ranges which should not be used
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/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Domap-spi.txt4 - compatible :
5 - "ti,am654-mcspi" for AM654.
6 - "ti,omap2-mcspi" for OMAP2 & OMAP3.
7 - "ti,omap4-mcspi" for OMAP4+.
8 - ti,spi-num-cs : Number of chipselect supported by the instance.
9 - ti,hwmods: Name of the hwmod associated to the McSPI
10 - ti,pindir-d0-out-d1-in: Select the D0 pin as output and D1 as
15 - dmas: List of DMA specifiers with the controller specific format
16 as described in the generic DMA client binding. A tx and rx
18 - dma-names: List of DMA request names. These strings correspond
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/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Ddm816x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <dt-bindings/bus/ti-sysc.h>
4 #include <dt-bindings/clock/dm816.h>
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/omap.h>
10 interrupt-parent = <&intc>;
11 #address-cells = <1>;
12 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
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H A Ddm814x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <dt-bindings/bus/ti-sysc.h>
4 #include <dt-bindings/clock/dm814.h>
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/dm814x.h>
10 interrupt-parent = <&intc>;
11 #address-cells = <1>;
12 #size-cells = <1>;
30 #address-cells = <1>;
31 #size-cells = <0>;
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H A Dam33xx-l4.dtsi2 compatible = "ti,am33xx-l4-wkup", "simple-pm-bus";
3 power-domains = <&prm_wkup>;
5 clock-names = "fck";
10 reg-names = "ap", "la", "ia0", "ia1";
11 #address-cells = <1>;
12 #size-cells = <1>;
18 compatible = "simple-p
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H A Dam4372.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/clock/am4.h>
15 interrupt-parent = <&wakeupgen>;
16 #address-cells = <1>;
17 #size-cells = <1>;
41 #address-cells = <1>;
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/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dsnps,dw-pcie-ep.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
16 # Please create a separate DT-schema for your DWC PCIe Endpoint controller
17 # and make sure it's assigned with the vendor-specific compatible string.
21 const: snps,dw-pcie-ep
23 - compatible
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H A Dsnps,dw-pcie.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
16 # Please create a separate DT-schema for your DWC PCIe Root Port controller
17 # and make sure it's assigned with the vendor-specific compatible string.
21 const: snps,dw-pcie
23 - compatible
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/freebsd/sys/contrib/device-tree/Bindings/crypto/
H A Domap-aes.txt5 - compatible : Should contain entries for this and backward compatible
7 - "ti,omap2-aes" for OMAP2.
8 - "ti,omap3-aes" for OMAP3.
9 - "ti,omap4-aes" for OMAP4 and AM33XX.
12 - ti,hwmods: Name of the hwmod associated with the AES module
13 - reg : Offset and length of the register set for the module
14 - interrupts : the interrupt-specifier for the AES module.
17 - dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
19 - dma-names: DMA request names should include "tx" and "rx" if present.
24 compatible = "ti,omap4-aes";
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/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Ddavinci_mmc.txt9 - compatible:
10 Should be "ti,da830-mmc": for da830, da850, dm365
11 Should be "ti,dm355-mmc": for dm355, dm644x
14 - bus-width: Number of data lines, can be <1>, <4>, or <8>, default <1>
15 - max-frequency: Maximum operating clock frequency, default 25MHz.
16 - dmas: List of DMA specifiers with the controller specific format
17 as described in the generic DMA client binding. A tx and rx
19 - dma-names: RX and TX DMA request names. These strings correspond
24 compatible = "ti,da830-mmc",
27 bus-width = <4>;
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H A Dti-omap-hsmmc.txt10 ----------
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/freebsd/sys/dev/qcom_ess_edma/
H A Dqcom_ess_edma_hw.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
63 * Reset the ESS EDMA core.
66 * for the ESS core - and that includes both the EDMA (ethernet)
69 * AND, it's a placeholder for what the linux ess-edma driver
72 * ess-switch won't be initialised. In that case it defaults
77 * So, for now this is a big no-op, at least until everything
79 * this EDMA driver code to co-exist.
87 device_printf(sc->sc_dev, "%s: called, TODO!\n", __func__); in qcom_ess_edma_hw_reset()
90 * This is where the linux ess-edma driver would reset the in qcom_ess_edma_hw_reset()
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H A Dqcom_ess_edma_reg.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
5 * Copyright (c) 2014 - 2016, The Linux Foundation. All rights reserved.
32 * Copyright (c) 2014 - 2016, The Linux Foundation. All rights reserved.
95 /* Edma receive consumer index */
97 /* Edma transmit consumer index */
116 /* TX Interrupt mask register */
138 #define EDMA_REG_TXF_WATER_MARK 0x408 /* In 8-bytes */
156 /* Tx Descriptor Control Register */
174 /* TX Virtual Queue Mapping Control Register */
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/freebsd/sys/contrib/device-tree/src/arm/nxp/vf/
H A Dvfxxx.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 #include "vf610-pinfunc.h"
6 #include <dt-bindings/clock/vf610-clock.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/gpio/gpio.h>
32 compatible = "fixed-cloc
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8-ss-audio.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 NXP
7 #include <dt-bindings/clock/imx8-clock.h>
8 #include <dt-bindings/clock/imx8-lpcg.h>
9 #include <dt-bindings/dma/fsl-edma.h>
10 #include <dt-bindings/firmware/imx/rsrc.h>
12 audio_ipg_clk: clock-audio-ipg {
13 compatible = "fixed-clock";
14 #clock-cells = <0>;
15 clock-frequency = <120000000>;
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H A Dimx8-ss-dma.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 NXP
7 #include <dt-bindings/clock/imx8-lpcg.h>
8 #include <dt-bindings/dma/fsl-edma.h>
9 #include <dt-bindings/firmware/imx/rsrc.h>
11 dma_ipg_clk: clock-dma-ipg {
12 compatible = "fixed-clock";
13 #clock-cells = <0>;
14 clock-frequency = <120000000>;
15 clock-output-names = "dma_ipg_clk";
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/freebsd/sys/dev/mvs/
H A Dmvs.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
42 #define IC_HC0 0x000001ff /* bits 0-8 = HC0 */
44 #define IC_HC1 (IC_HC0 << IC_HC_SHIFT) /* 9-17 = HC1 */
58 #define IC_MAIN_RSVD (0xfe000000) /* bits 31-25 */
59 #define IC_MAIN_RSVD_5 (0xfff10000) /* bits 31-19 */
60 #define IC_MAIN_RSVD_SOC (0xfffffec0) /* bits 31-9, 7-6 */
65 #define CHIP_SOC_HC0_MASK(num) (0xff >> ((4 - (num)) * 2))
87 #define HC_RQOP 0x4 /* Request Queue Out-Pointer */
88 #define HC_RQIP 0x8 /* Response Queue In-Pointer */
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/freebsd/sys/dev/ath/
H A Dif_ath_tx_edma.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
44 * by the driver - eg, calls to ath_hal_gettsf32().
129 #define INCR(_l, _sz) (_l) ++; (_l) &= ((_sz) - 1)
130 #define DECR(_l, _sz) (_l) --; (_l) &= ((_sz) - 1)
153 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TX_FIFO_PUSH, in ath_tx_alq_edma_push()
161 * it may not meet the TXOP for say, DBA-gated traffic in TDMA mode.
163 * The TX completion code handles a TX FIFO slot having multiple frames,
184 txq->axq_qnum, in ath_tx_edma_push_staging_list()
185 txq->axq_fifo_depth, in ath_tx_edma_push_staging_list()
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H A Dif_athvar.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
52 * There is a separate TX ath_buf pool for management frames.
55 * TX activity.
60 * 802.11n requires more TX and RX buffers to do AMPDU.
72 #define ATH_TXBUF 200 /* number of TX buffers */
79 #define ATH_TXINTR_PERIOD 5 /* max number of batched tx descriptors */
86 * The following bits can be set during the PCI (and perhaps non-PCI
106 * tracking station state such as the current tx antenna.
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H A Dif_ath_beacon.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
44 * by the driver - eg, calls to ath_hal_gettsf32().
114 struct ath_hal *ah = sc->sc_ah; in ath_beaconq_setup()
123 if (sc->sc_isedma) in ath_beaconq_setup()
136 #define ATH_EXPONENT_TO_VALUE(v) ((1<<(v))-1) in ath_beaconq_config()
137 struct ieee80211com *ic = &sc->sc_ic; in ath_beaconq_config()
138 struct ath_hal *ah = sc->sc_ah; in ath_beaconq_config()
141 ath_hal_gettxqueueprops(ah, sc->sc_bhalq, &qi); in ath_beaconq_config()
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/freebsd/sys/contrib/device-tree/src/arm/ti/keystone/
H A Dkeystone-k2g.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/pinctrl/keystone.h>
10 #include <dt-bindings/gpio/gpio.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&gic>;
32 #address-cells = <1>;
33 #size-cells = <0>;
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/freebsd/sys/dts/arm/
H A Dqcom-ipq4019-ethernet.dtsi1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
28 #include <dt-bindings/net/qcom-qca807x.h>
33 #address-cells = <1>;
34 #size-cells = <0>;
35 compatible = "qcom,ipq4019-mdio";
40 ess-switch@c000000 {
41 compatible = "qcom,ess-switch";
44 reset-names = "ess_rst";
46 clock-names = "ess_clk";
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