Searched +full:edma2 +full:- +full:err (Results 1 – 2 of 2) sorted by relevance
1 // SPDX-License-Identifier: GPL-2.0-or-later3 * drivers/dma/fsl-edma.c5 * Copyright 2013-2014 Freescale Semiconductor, Inc.13 #include <dt-bindings/dma/fsl-edma.h>20 #include <linux/dma-mapping.h>25 #include "fsl-edma-common.h"31 vchan_synchronize(&fsl_chan->vchan); in fsl_edma_synchronize()38 struct edma_regs *regs = &fsl_edma->regs; in fsl_edma_tx_handler()40 intr = edma_readl(fsl_edma, regs->intl); in fsl_edma_tx_handler()44 for (ch = 0; ch < fsl_edma->n_chans; ch++) { in fsl_edma_tx_handler()[all …]
1 // SPDX-License-Identifier: GPL-2.04 * Copyright 2020-2022 HabanaLabs, Ltd.45 * since the code already has built-in support for binning of up to MAX_FAULTY_TPCS TPCs126 #define GAUDI2_PMMU_SPI_SEI_ENABLE_MASK GENMASK(GAUDI2_NUM_OF_MMU_SPI_SEI_CAUSE - 2, 0)127 #define GAUDI2_HMMU_SPI_SEI_ENABLE_MASK GENMASK(GAUDI2_NUM_OF_MMU_SPI_SEI_CAUSE - 1, 0)131 #define GAUDI2_VDEC_MSIX_ENTRIES (GAUDI2_IRQ_NUM_SHARED_DEC1_ABNRM - \134 #define ENGINE_ID_DCORE_OFFSET (GAUDI2_DCORE1_ENGINE_ID_EDMA_0 - GAUDI2_DCORE0_ENGINE_ID_EDMA_0)164 /* HW scrambles only bits 0-25 */288 GAUDI2_DCORE1_ENGINE_ID_EDMA_0, "EDMA2"},904 "wap sei (wbc axi err)",[all …]