1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a77470 SoC 4 * 5 * Copyright (C) 2018 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/clock/r8a77470-cpg-mssr.h> 11#include <dt-bindings/power/r8a77470-sysc.h> 12/ { 13 compatible = "renesas,r8a77470"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 aliases { 18 i2c0 = &i2c0; 19 i2c1 = &i2c1; 20 i2c2 = &i2c2; 21 i2c3 = &i2c3; 22 i2c4 = &i2c4; 23 }; 24 25 cpus { 26 #address-cells = <1>; 27 #size-cells = <0>; 28 29 cpu0: cpu@0 { 30 device_type = "cpu"; 31 compatible = "arm,cortex-a7"; 32 reg = <0>; 33 clock-frequency = <1000000000>; 34 clocks = <&cpg CPG_CORE R8A77470_CLK_Z2>; 35 power-domains = <&sysc R8A77470_PD_CA7_CPU0>; 36 enable-method = "renesas,apmu"; 37 next-level-cache = <&L2_CA7>; 38 }; 39 40 cpu1: cpu@1 { 41 device_type = "cpu"; 42 compatible = "arm,cortex-a7"; 43 reg = <1>; 44 clock-frequency = <1000000000>; 45 clocks = <&cpg CPG_CORE R8A77470_CLK_Z2>; 46 power-domains = <&sysc R8A77470_PD_CA7_CPU1>; 47 enable-method = "renesas,apmu"; 48 next-level-cache = <&L2_CA7>; 49 }; 50 51 L2_CA7: cache-controller-0 { 52 compatible = "cache"; 53 cache-unified; 54 cache-level = <2>; 55 power-domains = <&sysc R8A77470_PD_CA7_SCU>; 56 }; 57 }; 58 59 /* External root clock */ 60 extal_clk: extal { 61 compatible = "fixed-clock"; 62 #clock-cells = <0>; 63 /* This value must be overridden by the board. */ 64 clock-frequency = <0>; 65 }; 66 67 pmu { 68 compatible = "arm,cortex-a7-pmu"; 69 interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 70 <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 71 interrupt-affinity = <&cpu0>, <&cpu1>; 72 }; 73 74 /* External SCIF clock */ 75 scif_clk: scif { 76 compatible = "fixed-clock"; 77 #clock-cells = <0>; 78 /* This value must be overridden by the board. */ 79 clock-frequency = <0>; 80 }; 81 82 soc { 83 compatible = "simple-bus"; 84 interrupt-parent = <&gic>; 85 86 #address-cells = <2>; 87 #size-cells = <2>; 88 ranges; 89 90 rwdt: watchdog@e6020000 { 91 compatible = "renesas,r8a77470-wdt", 92 "renesas,rcar-gen2-wdt"; 93 reg = <0 0xe6020000 0 0x0c>; 94 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 95 clocks = <&cpg CPG_MOD 402>; 96 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 97 resets = <&cpg 402>; 98 status = "disabled"; 99 }; 100 101 gpio0: gpio@e6050000 { 102 compatible = "renesas,gpio-r8a77470", 103 "renesas,rcar-gen2-gpio"; 104 reg = <0 0xe6050000 0 0x50>; 105 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 106 #gpio-cells = <2>; 107 gpio-controller; 108 gpio-ranges = <&pfc 0 0 23>; 109 #interrupt-cells = <2>; 110 interrupt-controller; 111 clocks = <&cpg CPG_MOD 912>; 112 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 113 resets = <&cpg 912>; 114 }; 115 116 gpio1: gpio@e6051000 { 117 compatible = "renesas,gpio-r8a77470", 118 "renesas,rcar-gen2-gpio"; 119 reg = <0 0xe6051000 0 0x50>; 120 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 121 #gpio-cells = <2>; 122 gpio-controller; 123 gpio-ranges = <&pfc 0 32 23>; 124 #interrupt-cells = <2>; 125 interrupt-controller; 126 clocks = <&cpg CPG_MOD 911>; 127 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 128 resets = <&cpg 911>; 129 }; 130 131 gpio2: gpio@e6052000 { 132 compatible = "renesas,gpio-r8a77470", 133 "renesas,rcar-gen2-gpio"; 134 reg = <0 0xe6052000 0 0x50>; 135 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 136 #gpio-cells = <2>; 137 gpio-controller; 138 gpio-ranges = <&pfc 0 64 32>; 139 #interrupt-cells = <2>; 140 interrupt-controller; 141 clocks = <&cpg CPG_MOD 910>; 142 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 143 resets = <&cpg 910>; 144 }; 145 146 gpio3: gpio@e6053000 { 147 compatible = "renesas,gpio-r8a77470", 148 "renesas,rcar-gen2-gpio"; 149 reg = <0 0xe6053000 0 0x50>; 150 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 151 #gpio-cells = <2>; 152 gpio-controller; 153 gpio-ranges = <&pfc 0 96 30>; 154 gpio-reserved-ranges = <17 10>; 155 #interrupt-cells = <2>; 156 interrupt-controller; 157 clocks = <&cpg CPG_MOD 909>; 158 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 159 resets = <&cpg 909>; 160 }; 161 162 gpio4: gpio@e6054000 { 163 compatible = "renesas,gpio-r8a77470", 164 "renesas,rcar-gen2-gpio"; 165 reg = <0 0xe6054000 0 0x50>; 166 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 167 #gpio-cells = <2>; 168 gpio-controller; 169 gpio-ranges = <&pfc 0 128 26>; 170 #interrupt-cells = <2>; 171 interrupt-controller; 172 clocks = <&cpg CPG_MOD 908>; 173 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 174 resets = <&cpg 908>; 175 }; 176 177 gpio5: gpio@e6055000 { 178 compatible = "renesas,gpio-r8a77470", 179 "renesas,rcar-gen2-gpio"; 180 reg = <0 0xe6055000 0 0x50>; 181 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 182 #gpio-cells = <2>; 183 gpio-controller; 184 gpio-ranges = <&pfc 0 160 32>; 185 #interrupt-cells = <2>; 186 interrupt-controller; 187 clocks = <&cpg CPG_MOD 907>; 188 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 189 resets = <&cpg 907>; 190 }; 191 192 pfc: pinctrl@e6060000 { 193 compatible = "renesas,pfc-r8a77470"; 194 reg = <0 0xe6060000 0 0x118>; 195 }; 196 197 cpg: clock-controller@e6150000 { 198 compatible = "renesas,r8a77470-cpg-mssr"; 199 reg = <0 0xe6150000 0 0x1000>; 200 clocks = <&extal_clk>, <&usb_extal_clk>; 201 clock-names = "extal", "usb_extal"; 202 #clock-cells = <2>; 203 #power-domain-cells = <0>; 204 #reset-cells = <1>; 205 }; 206 207 apmu@e6151000 { 208 compatible = "renesas,r8a77470-apmu", "renesas,apmu"; 209 reg = <0 0xe6151000 0 0x188>; 210 cpus = <&cpu0>, <&cpu1>; 211 }; 212 213 rst: reset-controller@e6160000 { 214 compatible = "renesas,r8a77470-rst"; 215 reg = <0 0xe6160000 0 0x100>; 216 }; 217 218 sysc: system-controller@e6180000 { 219 compatible = "renesas,r8a77470-sysc"; 220 reg = <0 0xe6180000 0 0x200>; 221 #power-domain-cells = <1>; 222 }; 223 224 irqc: interrupt-controller@e61c0000 { 225 compatible = "renesas,irqc-r8a77470", "renesas,irqc"; 226 #interrupt-cells = <2>; 227 interrupt-controller; 228 reg = <0 0xe61c0000 0 0x200>; 229 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 230 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 231 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 232 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 233 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 234 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 235 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 236 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, 237 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 238 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 239 clocks = <&cpg CPG_MOD 407>; 240 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 241 resets = <&cpg 407>; 242 }; 243 244 tmu1: timer@fff60000 { 245 compatible = "renesas,tmu-r8a77470", "renesas,tmu"; 246 reg = <0 0xfff60000 0 0x30>; 247 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 248 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 249 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 250 <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 251 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 252 clocks = <&cpg CPG_MOD 111>; 253 clock-names = "fck"; 254 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 255 resets = <&cpg 111>; 256 status = "disabled"; 257 }; 258 259 tmu2: timer@fff70000 { 260 compatible = "renesas,tmu-r8a77470", "renesas,tmu"; 261 reg = <0 0xfff70000 0 0x30>; 262 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 263 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 264 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 265 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; 266 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 267 clocks = <&cpg CPG_MOD 122>; 268 clock-names = "fck"; 269 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 270 resets = <&cpg 122>; 271 status = "disabled"; 272 }; 273 274 tmu3: timer@fff80000 { 275 compatible = "renesas,tmu-r8a77470", "renesas,tmu"; 276 reg = <0 0xfff80000 0 0x30>; 277 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 278 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 279 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 280 interrupt-names = "tuni0", "tuni1", "tuni2"; 281 clocks = <&cpg CPG_MOD 121>; 282 clock-names = "fck"; 283 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 284 resets = <&cpg 121>; 285 status = "disabled"; 286 }; 287 288 icram0: sram@e63a0000 { 289 compatible = "mmio-sram"; 290 reg = <0 0xe63a0000 0 0x12000>; 291 #address-cells = <1>; 292 #size-cells = <1>; 293 ranges = <0 0 0xe63a0000 0x12000>; 294 }; 295 296 icram1: sram@e63c0000 { 297 compatible = "mmio-sram"; 298 reg = <0 0xe63c0000 0 0x1000>; 299 #address-cells = <1>; 300 #size-cells = <1>; 301 ranges = <0 0 0xe63c0000 0x1000>; 302 303 smp-sram@0 { 304 compatible = "renesas,smp-sram"; 305 reg = <0 0x100>; 306 }; 307 }; 308 309 icram2: sram@e6300000 { 310 compatible = "mmio-sram"; 311 reg = <0 0xe6300000 0 0x20000>; 312 #address-cells = <1>; 313 #size-cells = <1>; 314 ranges = <0 0 0xe6300000 0x20000>; 315 }; 316 317 i2c0: i2c@e6508000 { 318 #address-cells = <1>; 319 #size-cells = <0>; 320 compatible = "renesas,i2c-r8a77470", 321 "renesas,rcar-gen2-i2c"; 322 reg = <0 0xe6508000 0 0x40>; 323 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 324 clocks = <&cpg CPG_MOD 931>; 325 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 326 resets = <&cpg 931>; 327 i2c-scl-internal-delay-ns = <6>; 328 status = "disabled"; 329 }; 330 331 i2c1: i2c@e6518000 { 332 #address-cells = <1>; 333 #size-cells = <0>; 334 compatible = "renesas,i2c-r8a77470", 335 "renesas,rcar-gen2-i2c"; 336 reg = <0 0xe6518000 0 0x40>; 337 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 338 clocks = <&cpg CPG_MOD 930>; 339 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 340 resets = <&cpg 930>; 341 i2c-scl-internal-delay-ns = <6>; 342 status = "disabled"; 343 }; 344 345 i2c2: i2c@e6530000 { 346 #address-cells = <1>; 347 #size-cells = <0>; 348 compatible = "renesas,i2c-r8a77470", 349 "renesas,rcar-gen2-i2c"; 350 reg = <0 0xe6530000 0 0x40>; 351 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 352 clocks = <&cpg CPG_MOD 929>; 353 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 354 resets = <&cpg 929>; 355 i2c-scl-internal-delay-ns = <6>; 356 status = "disabled"; 357 }; 358 359 i2c3: i2c@e6540000 { 360 #address-cells = <1>; 361 #size-cells = <0>; 362 compatible = "renesas,i2c-r8a77470", 363 "renesas,rcar-gen2-i2c"; 364 reg = <0 0xe6540000 0 0x40>; 365 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 366 clocks = <&cpg CPG_MOD 928>; 367 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 368 resets = <&cpg 928>; 369 i2c-scl-internal-delay-ns = <6>; 370 status = "disabled"; 371 }; 372 373 i2c4: i2c@e6520000 { 374 #address-cells = <1>; 375 #size-cells = <0>; 376 compatible = "renesas,i2c-r8a77470", 377 "renesas,rcar-gen2-i2c"; 378 reg = <0 0xe6520000 0 0x40>; 379 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 380 clocks = <&cpg CPG_MOD 927>; 381 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 382 resets = <&cpg 927>; 383 i2c-scl-internal-delay-ns = <6>; 384 status = "disabled"; 385 }; 386 387 hsusb0: hsusb@e6590000 { 388 compatible = "renesas,usbhs-r8a77470", 389 "renesas,rcar-gen2-usbhs"; 390 reg = <0 0xe6590000 0 0x100>; 391 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 392 clocks = <&cpg CPG_MOD 704>; 393 dmas = <&usb_dmac00 0>, <&usb_dmac00 1>, 394 <&usb_dmac10 0>, <&usb_dmac10 1>; 395 dma-names = "ch0", "ch1", "ch2", "ch3"; 396 renesas,buswait = <4>; 397 phys = <&usb0 1>; 398 phy-names = "usb"; 399 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 400 resets = <&cpg 704>; 401 status = "disabled"; 402 }; 403 404 usbphy0: usb-phy-controller@e6590100 { 405 compatible = "renesas,usb-phy-r8a77470", 406 "renesas,rcar-gen2-usb-phy"; 407 reg = <0 0xe6590100 0 0x100>; 408 #address-cells = <1>; 409 #size-cells = <0>; 410 clocks = <&cpg CPG_MOD 704>; 411 clock-names = "usbhs"; 412 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 413 resets = <&cpg 704>; 414 status = "disabled"; 415 416 usb0: usb-phy@0 { 417 reg = <0>; 418 #phy-cells = <1>; 419 }; 420 }; 421 422 hsusb1: hsusb@e6598000 { 423 compatible = "renesas,usbhs-r8a77470", 424 "renesas,rcar-gen2-usbhs"; 425 reg = <0 0xe6598000 0 0x100>; 426 interrupts = <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>; 427 clocks = <&cpg CPG_MOD 706>; 428 dmas = <&usb_dmac01 0>, <&usb_dmac01 1>, 429 <&usb_dmac11 0>, <&usb_dmac11 1>; 430 dma-names = "ch0", "ch1", "ch2", "ch3"; 431 renesas,buswait = <4>; 432 /* We need to turn on usbphy0 to make usbphy1 to work */ 433 phys = <&usb1 1>; 434 phy-names = "usb"; 435 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 436 resets = <&cpg 706>; 437 status = "disabled"; 438 }; 439 440 usbphy1: usb-phy-controller@e6598100 { 441 compatible = "renesas,usb-phy-r8a77470", 442 "renesas,rcar-gen2-usb-phy"; 443 reg = <0 0xe6598100 0 0x100>; 444 #address-cells = <1>; 445 #size-cells = <0>; 446 clocks = <&cpg CPG_MOD 706>; 447 clock-names = "usbhs"; 448 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 449 resets = <&cpg 706>; 450 status = "disabled"; 451 452 usb1: usb-phy@0 { 453 reg = <0>; 454 #phy-cells = <1>; 455 }; 456 }; 457 458 usb_dmac00: dma-controller@e65a0000 { 459 compatible = "renesas,r8a77470-usb-dmac", 460 "renesas,usb-dmac"; 461 reg = <0 0xe65a0000 0 0x100>; 462 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 463 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 464 interrupt-names = "ch0", "ch1"; 465 clocks = <&cpg CPG_MOD 330>; 466 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 467 resets = <&cpg 330>; 468 #dma-cells = <1>; 469 dma-channels = <2>; 470 }; 471 472 usb_dmac10: dma-controller@e65b0000 { 473 compatible = "renesas,r8a77470-usb-dmac", 474 "renesas,usb-dmac"; 475 reg = <0 0xe65b0000 0 0x100>; 476 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 477 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 478 interrupt-names = "ch0", "ch1"; 479 clocks = <&cpg CPG_MOD 331>; 480 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 481 resets = <&cpg 331>; 482 #dma-cells = <1>; 483 dma-channels = <2>; 484 }; 485 486 usb_dmac01: dma-controller@e65a8000 { 487 compatible = "renesas,r8a77470-usb-dmac", 488 "renesas,usb-dmac"; 489 reg = <0 0xe65a8000 0 0x100>; 490 interrupts = <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, 491 <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>; 492 interrupt-names = "ch0", "ch1"; 493 clocks = <&cpg CPG_MOD 326>; 494 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 495 resets = <&cpg 326>; 496 #dma-cells = <1>; 497 dma-channels = <2>; 498 }; 499 500 usb_dmac11: dma-controller@e65b8000 { 501 compatible = "renesas,r8a77470-usb-dmac", 502 "renesas,usb-dmac"; 503 reg = <0 0xe65b8000 0 0x100>; 504 interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, 505 <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>; 506 interrupt-names = "ch0", "ch1"; 507 clocks = <&cpg CPG_MOD 327>; 508 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 509 resets = <&cpg 327>; 510 #dma-cells = <1>; 511 dma-channels = <2>; 512 }; 513 514 dmac0: dma-controller@e6700000 { 515 compatible = "renesas,dmac-r8a77470", 516 "renesas,rcar-dmac"; 517 reg = <0 0xe6700000 0 0x20000>; 518 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, 519 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 520 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 521 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 522 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 523 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 524 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 525 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 526 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 527 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 528 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 529 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 530 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 531 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 532 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 533 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; 534 interrupt-names = "error", 535 "ch0", "ch1", "ch2", "ch3", 536 "ch4", "ch5", "ch6", "ch7", 537 "ch8", "ch9", "ch10", "ch11", 538 "ch12", "ch13", "ch14"; 539 clocks = <&cpg CPG_MOD 219>; 540 clock-names = "fck"; 541 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 542 resets = <&cpg 219>; 543 #dma-cells = <1>; 544 dma-channels = <15>; 545 }; 546 547 dmac1: dma-controller@e6720000 { 548 compatible = "renesas,dmac-r8a77470", 549 "renesas,rcar-dmac"; 550 reg = <0 0xe6720000 0 0x20000>; 551 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 552 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 553 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 554 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 555 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 556 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 557 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 558 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 559 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 560 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 561 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 562 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 563 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 564 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 565 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 566 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; 567 interrupt-names = "error", 568 "ch0", "ch1", "ch2", "ch3", 569 "ch4", "ch5", "ch6", "ch7", 570 "ch8", "ch9", "ch10", "ch11", 571 "ch12", "ch13", "ch14"; 572 clocks = <&cpg CPG_MOD 218>; 573 clock-names = "fck"; 574 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 575 resets = <&cpg 218>; 576 #dma-cells = <1>; 577 dma-channels = <15>; 578 }; 579 580 avb: ethernet@e6800000 { 581 compatible = "renesas,etheravb-r8a77470", 582 "renesas,etheravb-rcar-gen2"; 583 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; 584 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 585 clocks = <&cpg CPG_MOD 812>; 586 clock-names = "fck"; 587 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 588 resets = <&cpg 812>; 589 #address-cells = <1>; 590 #size-cells = <0>; 591 status = "disabled"; 592 }; 593 594 qspi0: spi@e6b10000 { 595 compatible = "renesas,qspi-r8a77470", "renesas,qspi"; 596 reg = <0 0xe6b10000 0 0x2c>; 597 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 598 clocks = <&cpg CPG_MOD 918>; 599 dmas = <&dmac0 0x17>, <&dmac0 0x18>, 600 <&dmac1 0x17>, <&dmac1 0x18>; 601 dma-names = "tx", "rx", "tx", "rx"; 602 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 603 num-cs = <1>; 604 #address-cells = <1>; 605 #size-cells = <0>; 606 resets = <&cpg 918>; 607 status = "disabled"; 608 }; 609 610 qspi1: spi@ee200000 { 611 compatible = "renesas,qspi-r8a77470", "renesas,qspi"; 612 reg = <0 0xee200000 0 0x2c>; 613 interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; 614 clocks = <&cpg CPG_MOD 917>; 615 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, 616 <&dmac1 0xd1>, <&dmac1 0xd2>; 617 dma-names = "tx", "rx", "tx", "rx"; 618 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 619 num-cs = <1>; 620 #address-cells = <1>; 621 #size-cells = <0>; 622 resets = <&cpg 917>; 623 status = "disabled"; 624 }; 625 626 scif0: serial@e6e60000 { 627 compatible = "renesas,scif-r8a77470", 628 "renesas,rcar-gen2-scif", "renesas,scif"; 629 reg = <0 0xe6e60000 0 0x40>; 630 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 631 clocks = <&cpg CPG_MOD 721>, 632 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 633 clock-names = "fck", "brg_int", "scif_clk"; 634 dmas = <&dmac0 0x29>, <&dmac0 0x2a>, 635 <&dmac1 0x29>, <&dmac1 0x2a>; 636 dma-names = "tx", "rx", "tx", "rx"; 637 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 638 resets = <&cpg 721>; 639 status = "disabled"; 640 }; 641 642 scif1: serial@e6e68000 { 643 compatible = "renesas,scif-r8a77470", 644 "renesas,rcar-gen2-scif", "renesas,scif"; 645 reg = <0 0xe6e68000 0 0x40>; 646 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 647 clocks = <&cpg CPG_MOD 720>, 648 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 649 clock-names = "fck", "brg_int", "scif_clk"; 650 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, 651 <&dmac1 0x2d>, <&dmac1 0x2e>; 652 dma-names = "tx", "rx", "tx", "rx"; 653 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 654 resets = <&cpg 720>; 655 status = "disabled"; 656 }; 657 658 scif2: serial@e6e58000 { 659 compatible = "renesas,scif-r8a77470", 660 "renesas,rcar-gen2-scif", "renesas,scif"; 661 reg = <0 0xe6e58000 0 0x40>; 662 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 663 clocks = <&cpg CPG_MOD 719>, 664 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 665 clock-names = "fck", "brg_int", "scif_clk"; 666 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, 667 <&dmac1 0x2b>, <&dmac1 0x2c>; 668 dma-names = "tx", "rx", "tx", "rx"; 669 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 670 resets = <&cpg 719>; 671 status = "disabled"; 672 }; 673 674 scif3: serial@e6ea8000 { 675 compatible = "renesas,scif-r8a77470", 676 "renesas,rcar-gen2-scif", "renesas,scif"; 677 reg = <0 0xe6ea8000 0 0x40>; 678 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 679 clocks = <&cpg CPG_MOD 718>, 680 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 681 clock-names = "fck", "brg_int", "scif_clk"; 682 dmas = <&dmac0 0x2f>, <&dmac0 0x30>, 683 <&dmac1 0x2f>, <&dmac1 0x30>; 684 dma-names = "tx", "rx", "tx", "rx"; 685 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 686 resets = <&cpg 718>; 687 status = "disabled"; 688 }; 689 690 scif4: serial@e6ee0000 { 691 compatible = "renesas,scif-r8a77470", 692 "renesas,rcar-gen2-scif", "renesas,scif"; 693 reg = <0 0xe6ee0000 0 0x40>; 694 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 695 clocks = <&cpg CPG_MOD 715>, 696 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 697 clock-names = "fck", "brg_int", "scif_clk"; 698 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, 699 <&dmac1 0xfb>, <&dmac1 0xfc>; 700 dma-names = "tx", "rx", "tx", "rx"; 701 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 702 resets = <&cpg 715>; 703 status = "disabled"; 704 }; 705 706 scif5: serial@e6ee8000 { 707 compatible = "renesas,scif-r8a77470", 708 "renesas,rcar-gen2-scif", "renesas,scif"; 709 reg = <0 0xe6ee8000 0 0x40>; 710 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 711 clocks = <&cpg CPG_MOD 714>, 712 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 713 clock-names = "fck", "brg_int", "scif_clk"; 714 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, 715 <&dmac1 0xfd>, <&dmac1 0xfe>; 716 dma-names = "tx", "rx", "tx", "rx"; 717 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 718 resets = <&cpg 714>; 719 status = "disabled"; 720 }; 721 722 hscif0: serial@e62c0000 { 723 compatible = "renesas,hscif-r8a77470", 724 "renesas,rcar-gen2-hscif", "renesas,hscif"; 725 reg = <0 0xe62c0000 0 0x60>; 726 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 727 clocks = <&cpg CPG_MOD 717>, 728 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 729 clock-names = "fck", "brg_int", "scif_clk"; 730 dmas = <&dmac0 0x39>, <&dmac0 0x3a>, 731 <&dmac1 0x39>, <&dmac1 0x3a>; 732 dma-names = "tx", "rx", "tx", "rx"; 733 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 734 resets = <&cpg 717>; 735 status = "disabled"; 736 }; 737 738 hscif1: serial@e62c8000 { 739 compatible = "renesas,hscif-r8a77470", 740 "renesas,rcar-gen2-hscif", "renesas,hscif"; 741 reg = <0 0xe62c8000 0 0x60>; 742 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 743 clocks = <&cpg CPG_MOD 716>, 744 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 745 clock-names = "fck", "brg_int", "scif_clk"; 746 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, 747 <&dmac1 0x4d>, <&dmac1 0x4e>; 748 dma-names = "tx", "rx", "tx", "rx"; 749 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 750 resets = <&cpg 716>; 751 status = "disabled"; 752 }; 753 754 hscif2: serial@e62d0000 { 755 compatible = "renesas,hscif-r8a77470", 756 "renesas,rcar-gen2-hscif", "renesas,hscif"; 757 reg = <0 0xe62d0000 0 0x60>; 758 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 759 clocks = <&cpg CPG_MOD 713>, 760 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 761 clock-names = "fck", "brg_int", "scif_clk"; 762 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, 763 <&dmac1 0x3b>, <&dmac1 0x3c>; 764 dma-names = "tx", "rx", "tx", "rx"; 765 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 766 resets = <&cpg 713>; 767 status = "disabled"; 768 }; 769 770 pwm0: pwm@e6e30000 { 771 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; 772 reg = <0 0xe6e30000 0 0x8>; 773 clocks = <&cpg CPG_MOD 523>; 774 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 775 resets = <&cpg 523>; 776 #pwm-cells = <2>; 777 status = "disabled"; 778 }; 779 780 pwm1: pwm@e6e31000 { 781 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; 782 reg = <0 0xe6e31000 0 0x8>; 783 clocks = <&cpg CPG_MOD 523>; 784 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 785 resets = <&cpg 523>; 786 #pwm-cells = <2>; 787 status = "disabled"; 788 }; 789 790 pwm2: pwm@e6e32000 { 791 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; 792 reg = <0 0xe6e32000 0 0x8>; 793 clocks = <&cpg CPG_MOD 523>; 794 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 795 resets = <&cpg 523>; 796 #pwm-cells = <2>; 797 status = "disabled"; 798 }; 799 800 pwm3: pwm@e6e33000 { 801 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; 802 reg = <0 0xe6e33000 0 0x8>; 803 clocks = <&cpg CPG_MOD 523>; 804 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 805 resets = <&cpg 523>; 806 #pwm-cells = <2>; 807 status = "disabled"; 808 }; 809 810 pwm4: pwm@e6e34000 { 811 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; 812 reg = <0 0xe6e34000 0 0x8>; 813 clocks = <&cpg CPG_MOD 523>; 814 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 815 resets = <&cpg 523>; 816 #pwm-cells = <2>; 817 status = "disabled"; 818 }; 819 820 pwm5: pwm@e6e35000 { 821 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; 822 reg = <0 0xe6e35000 0 0x8>; 823 clocks = <&cpg CPG_MOD 523>; 824 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 825 resets = <&cpg 523>; 826 #pwm-cells = <2>; 827 status = "disabled"; 828 }; 829 830 pwm6: pwm@e6e36000 { 831 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; 832 reg = <0 0xe6e36000 0 0x8>; 833 clocks = <&cpg CPG_MOD 523>; 834 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 835 resets = <&cpg 523>; 836 #pwm-cells = <2>; 837 status = "disabled"; 838 }; 839 840 vin0: video@e6ef0000 { 841 compatible = "renesas,vin-r8a77470", 842 "renesas,rcar-gen2-vin"; 843 reg = <0 0xe6ef0000 0 0x1000>; 844 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 845 clocks = <&cpg CPG_MOD 811>; 846 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 847 resets = <&cpg 811>; 848 status = "disabled"; 849 }; 850 851 vin1: video@e6ef1000 { 852 compatible = "renesas,vin-r8a77470", 853 "renesas,rcar-gen2-vin"; 854 reg = <0 0xe6ef1000 0 0x1000>; 855 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 856 clocks = <&cpg CPG_MOD 810>; 857 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 858 resets = <&cpg 810>; 859 status = "disabled"; 860 }; 861 862 ohci0: usb@ee080000 { 863 compatible = "generic-ohci"; 864 reg = <0 0xee080000 0 0x100>; 865 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 866 clocks = <&cpg CPG_MOD 703>; 867 phys = <&usb0 0>, <&usb2_phy0>; 868 phy-names = "usb"; 869 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 870 resets = <&cpg 703>; 871 status = "disabled"; 872 }; 873 874 ehci0: usb@ee080100 { 875 compatible = "generic-ehci"; 876 reg = <0 0xee080100 0 0x100>; 877 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 878 clocks = <&cpg CPG_MOD 703>; 879 phys = <&usb0 0>, <&usb2_phy0>; 880 phy-names = "usb"; 881 companion = <&ohci0>; 882 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 883 resets = <&cpg 703>; 884 status = "disabled"; 885 }; 886 887 usb2_phy0: usb-phy@ee080200 { 888 compatible = "renesas,usb2-phy-r8a77470"; 889 reg = <0 0xee080200 0 0x700>; 890 clocks = <&cpg CPG_MOD 703>; 891 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 892 resets = <&cpg 703>; 893 #phy-cells = <0>; 894 status = "disabled"; 895 }; 896 897 ohci1: usb@ee0c0000 { 898 compatible = "generic-ohci"; 899 reg = <0 0xee0c0000 0 0x100>; 900 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 901 clocks = <&cpg CPG_MOD 705>; 902 phys = <&usb0 1>, <&usb2_phy1>, <&usb1 0>; 903 phy-names = "usb"; 904 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 905 resets = <&cpg 705>; 906 status = "disabled"; 907 }; 908 909 ehci1: usb@ee0c0100 { 910 compatible = "generic-ehci"; 911 reg = <0 0xee0c0100 0 0x100>; 912 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 913 clocks = <&cpg CPG_MOD 705>; 914 phys = <&usb0 1>, <&usb2_phy1>, <&usb1 0>; 915 phy-names = "usb"; 916 companion = <&ohci1>; 917 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 918 resets = <&cpg 705>; 919 status = "disabled"; 920 }; 921 922 usb2_phy1: usb-phy@ee0c0200 { 923 compatible = "renesas,usb2-phy-r8a77470"; 924 reg = <0 0xee0c0200 0 0x700>; 925 clocks = <&cpg CPG_MOD 705>; 926 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 927 resets = <&cpg 705>; 928 #phy-cells = <0>; 929 status = "disabled"; 930 }; 931 932 sdhi0: mmc@ee100000 { 933 compatible = "renesas,sdhi-r8a77470", 934 "renesas,rcar-gen2-sdhi"; 935 reg = <0 0xee100000 0 0x328>; 936 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 937 clocks = <&cpg CPG_MOD 314>; 938 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, 939 <&dmac1 0xcd>, <&dmac1 0xce>; 940 dma-names = "tx", "rx", "tx", "rx"; 941 max-frequency = <156000000>; 942 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 943 resets = <&cpg 314>; 944 status = "disabled"; 945 }; 946 947 sdhi1: mmc@ee300000 { 948 compatible = "renesas,sdhi-mmc-r8a77470"; 949 reg = <0 0xee300000 0 0x2000>; 950 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 951 clocks = <&cpg CPG_MOD 313>; 952 max-frequency = <156000000>; 953 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 954 resets = <&cpg 313>; 955 status = "disabled"; 956 }; 957 958 sdhi2: mmc@ee160000 { 959 compatible = "renesas,sdhi-r8a77470", 960 "renesas,rcar-gen2-sdhi"; 961 reg = <0 0xee160000 0 0x328>; 962 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 963 clocks = <&cpg CPG_MOD 312>; 964 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, 965 <&dmac1 0xd3>, <&dmac1 0xd4>; 966 dma-names = "tx", "rx", "tx", "rx"; 967 max-frequency = <78000000>; 968 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 969 resets = <&cpg 312>; 970 status = "disabled"; 971 }; 972 973 gic: interrupt-controller@f1001000 { 974 compatible = "arm,gic-400"; 975 #interrupt-cells = <3>; 976 #address-cells = <0>; 977 interrupt-controller; 978 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>, 979 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; 980 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 981 clocks = <&cpg CPG_MOD 408>; 982 clock-names = "clk"; 983 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 984 resets = <&cpg 408>; 985 }; 986 987 du: display@feb00000 { 988 compatible = "renesas,du-r8a77470"; 989 reg = <0 0xfeb00000 0 0x40000>; 990 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 991 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 992 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; 993 clock-names = "du.0", "du.1"; 994 resets = <&cpg 724>; 995 reset-names = "du.0"; 996 status = "disabled"; 997 998 ports { 999 #address-cells = <1>; 1000 #size-cells = <0>; 1001 1002 port@0 { 1003 reg = <0>; 1004 du_out_rgb0: endpoint { 1005 }; 1006 }; 1007 port@1 { 1008 reg = <1>; 1009 du_out_rgb1: endpoint { 1010 }; 1011 }; 1012 port@2 { 1013 reg = <2>; 1014 du_out_lvds0: endpoint { 1015 }; 1016 }; 1017 }; 1018 }; 1019 1020 prr: chipid@ff000044 { 1021 compatible = "renesas,prr"; 1022 reg = <0 0xff000044 0 4>; 1023 }; 1024 1025 cmt0: timer@ffca0000 { 1026 compatible = "renesas,r8a77470-cmt0", 1027 "renesas,rcar-gen2-cmt0"; 1028 reg = <0 0xffca0000 0 0x1004>; 1029 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 1030 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 1031 clocks = <&cpg CPG_MOD 124>; 1032 clock-names = "fck"; 1033 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 1034 resets = <&cpg 124>; 1035 status = "disabled"; 1036 }; 1037 1038 cmt1: timer@e6130000 { 1039 compatible = "renesas,r8a77470-cmt1", 1040 "renesas,rcar-gen2-cmt1"; 1041 reg = <0 0xe6130000 0 0x1004>; 1042 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 1043 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 1044 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 1045 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 1046 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 1047 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 1048 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 1049 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 1050 clocks = <&cpg CPG_MOD 329>; 1051 clock-names = "fck"; 1052 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 1053 resets = <&cpg 329>; 1054 status = "disabled"; 1055 }; 1056 }; 1057 1058 timer { 1059 compatible = "arm,armv7-timer"; 1060 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1061 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1062 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1063 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1064 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; 1065 }; 1066 1067 /* External USB clock - can be overridden by the board */ 1068 usb_extal_clk: usb_extal { 1069 compatible = "fixed-clock"; 1070 #clock-cells = <0>; 1071 clock-frequency = <48000000>; 1072 }; 1073}; 1074