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/freebsd/sys/contrib/device-tree/Bindings/media/i2c/
H A Dst,st-mipid02.txt1 STMicroelectronics MIPID02 CSI-2 to PARALLEL bridge
3 MIPID02 has two CSI-2 input ports, only one of those ports can be active at a
4 time. Active port input stream will be de-serialized and its content outputted
6 CSI-2 first input port is a dual lane 800Mbps per lane whereas CSI-2 second
7 input port is a single lane 800Mbps. Both ports support clock and data lane
8 polarity swap. First port also supports data lane swap.
11 YUV420 8-bit, YUV422 8-bit and YUV420 10-bit.
14 - compatible: shall be "st,st-mipid02"
15 - clocks: reference to the xclk input clock.
16 - clock-names: shall be "xclk".
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H A Dst,st-mipid02.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/i2c/st,st-mipid0
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/freebsd/sys/contrib/device-tree/Bindings/display/msm/
H A Ddsi.txt5 - compatible:
6 * "qcom,mdss-dsi-ctrl"
7 - reg: Physical base address and length of the registers of controller
8 - reg-names: The names of register regions. The following regions are required:
10 - interrupts: The interrupt signal from the DSI block.
11 - power-domains: Should be <&mmcc MDSS_GDSC>.
12 - clocks: Phandles to device clocks.
13 - clock-names: the following clocks are required:
25 - assigned-clocks: Parents of "byte" and "pixel" for the given platform.
26 - assigned-clock-parents: The Byte clock and Pixel clock PLL outputs provided
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/freebsd/sys/contrib/device-tree/Bindings/display/bridge/
H A Dtoshiba,tc358775.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinay Simha BN <simhavcs@gmail.com>
15 MIPI DSI-RX Data 4-lane, CLK 1-lane with data rates up to 800 Mbps/lane.
17 Up to 1600x1200 24-bit/pixel resolution for single-link LVDS display panel
19 Up to WUXGA (1920x1200 24-bit pixels) resolution for dual-link LVDS display
25 - toshiba,tc358765
26 - toshiba,tc358775
32 vdd-supply:
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H A Dti,sn65dsi83.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Vasut <marex@denx.de>
13 Texas Instruments SN65DSI83 1x Single-link MIPI DSI
14 to 1x Single-link LVDS
16 Texas Instruments SN65DSI84 1x Single-link MIPI DSI
17 to 1x Dual-link or 2x Single-link LVDS
23 - ti,sn65dsi83
24 - ti,sn65dsi84
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/freebsd/sys/contrib/device-tree/Bindings/connector/
H A Dusb-connector.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/connector/usb-connector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ro
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/freebsd/sys/dev/sfxge/common/
H A Def10_tlv_layout.h1 /*-
2 * Copyright (c) 2012-2016 Solarflare Communications Inc.
48 * systems which are little-endian and do not do strange things with structure
49 * padding. (Big-endian host systems will require some byte-swapping.)
51 * -----
53 * Please refer to SF-108797-SW for a general overview of the TLV partition
56 * -----
62 * - L is a location, indicating where this tag is expected to be found:
69 * - TTT is a type, which is just a unique value. The same type value
73 * - NNNN is an index of some form. Some item types are per-port, some
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/freebsd/share/misc/
H A Dpci_vendors5 # Date: 2024-11-25 03:15:02
8 # the PCI ID Project at https://pci-ids.ucw.cz/.
14 # (version 2 or higher) or the 3-clause BSD License.
25 # device device_name <-- single tab
26 # subvendor subdevice subsystem_name <-- two tabs
30 # This is a relabelled RTL-8139
31 8139 AT-2500TX V3 Ethernet
41 7a09 PCI-to-PCI Bridge
50 7a19 PCI-to-PCI Bridge
55 7a29 PCI-to-PCI Bridge
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/freebsd/sys/contrib/device-tree/Bindings/display/mediatek/
H A Dmediatek,dsi.txt5 drive up to 4-lane MIPI DSI output. Two DSIs can be synchronized for dual-
9 - compatible: "mediatek,<chip>-dsi"
10 - the supported chips are mt2701, mt7623, mt8167, mt8173 and mt8183.
11 - reg: Physical base address and length of the controller's registers
12 - interrupts: The interrupt signal from the function block.
13 - clocks: device clocks
14 See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
15 - clock-names: must contain "engine", "digital", and "hs"
16 - phys: phandle link to the MIPI D-PHY controller.
17 - phy-names: must contain "dphy"
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H A Dmediatek,dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
12 - Jitao Shi <jitao.shi@mediatek.com>
16 drive up to 4-lane MIPI DSI output. Two DSIs can be synchronized for dual-
20 - $ref: /schemas/display/dsi-controller.yaml#
25 - enum:
26 - mediatek,mt2701-dsi
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/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dintel,combo-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/intel,combo-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dilip Kota <eswara.kota@linux.intel.com>
18 pattern: "combophy(@.*|-([0-9]|[1-9][0-9]+))?$"
22 - const: intel,combophy-lgm
23 - const: intel,combo-phy
30 - description: ComboPhy core registers
31 - description: PCIe app core control registers
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/freebsd/sys/contrib/device-tree/Bindings/
H A Dtrivial-devices.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/trivial-devices.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
27 spi-max-frequency: true
32 - enum:
34 - acbel,fsg032
35 … # SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin
36 - ad,ad7414 # Deprecated, use adi,ad7414
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/freebsd/sys/contrib/device-tree/src/arm/nxp/lpc/
H A Dlpc4350-hitex-eval.dts6 * This code is released using a dual license strategy: BSD/GPL
9 * Released under the terms of 3-clause BSD License
13 /dts-v1/;
18 #include "dt-bindings/input/input.h"
19 #include "dt-bindings/gpio/gpio.h"
23 compatible = "hitex,lpc4350-eval-board", "nxp,lpc4350";
33 stdout-path = &uart0;
42 compatible = "gpio-keys-polled";
43 poll-interval = <100>;
97 compatible = "gpio-leds";
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H A Dlpc4357-ea4357-devkit.dts6 * This code is released using a dual license strategy: BSD/GPL
9 * Released under the terms of 3-clause BSD License
13 /dts-v1/;
18 #include "dt-bindings/input/input.h"
19 #include "dt-bindings/gpio/gpio.h"
23 compatible = "ea,lpc4357-developers-kit", "nxp,lpc4357", "nxp,lpc4350";
33 stdout-path = &uart0;
42 compatible = "regulator-fixed";
43 regulator-name = "3v3-supply";
44 regulator-min-microvolt = <3300000>;
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.h1 //===- ARMISelLowering.h - ARM DAG Lowering Interface -----------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
60 Wrapper, // Wrapper - A wrapper node for TargetConstantPool,
62 WrapperPIC, // WrapperPIC - A wrapper node for TargetGlobalAddress in
64 WrapperJT, // WrapperJT - A wrapper node for TargetJumpTable
71 CALL_NOLINK, // Function call with branch not branch-and-link.
72 tSECALL, // CMSE non-secure function call.
76 BR2_JT, // Jumptable branch (2 level - jumptable entry is a jump).
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H A DARMScheduleSwift.td1 //=- ARMScheduleSwift.td - Swift Scheduling Definitions -*- tablegen -*----===//
5 // SPDX-Licens
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/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3588-friendlyelec-cm3588-nas.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/pinctrl/rockchip.h>
14 #include <dt-bindings/usb/pd.h>
15 #include "rk3588-friendlyelec-cm3588.dtsi"
19 compatible = "friendlyarm,cm3588-nas", "friendlyarm,cm3588", "rockchip,rk3588";
21 adc_key_recovery: adc-key-recovery {
22 compatible = "adc-keys";
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H A Drk3588s-indiedroid-nova.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/linux-event-codes.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
8 #include <dt-bindings/usb/pd.h>
15 adc-keys-0 {
16 compatible = "adc-keys";
17 io-channel-names = "buttons";
18 io-channels = <&saradc 0>;
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx93-tqma9352-mba93xxla.dts1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright (c) 2022-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
4 * D-82229 Seefeld, Germany.
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/net/ti-dp83867.h>
13 #include <dt-bindings/pwm/pwm.h>
14 #include <dt-bindings/usb/pd.h>
15 #include "imx93-tqma9352.dtsi"
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H A Dimx93-tqma9352-mba93xxca.dts1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright (c) 2022-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
4 * D-82229 Seefeld, Germany.
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/net/ti-dp83867.h>
13 #include <dt-bindings/pwm/pwm.h>
15 #include "imx93-tqma9352.dtsi"
18 model = "TQ-Systems i.MX93 TQMa93xxLA/TQMa93xxCA on MBa93xxCA starter kit";
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H A Dimx8mp-tqma8mpql-mba8mpxl.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2021-2022 TQ-Systems GmbH
4 * Author: Alexander Stein <alexander.stein@tq-group.com>
7 /dts-v1/;
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/net/ti-dp83867.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
12 #include <dt-bindings/pwm/pwm.h>
13 #include "imx8mp-tqma8mpql.dtsi"
16 model = "TQ-Systems i.MX8MPlus TQMa8MPxL on MBa8MPxL";
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/freebsd/sys/dev/bxe/
H A Dbxe_elink.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2007-2017 QLogic Corporation. All rights reserved.
508 /* When this pin is active high during reset, 10GBASE-T core is power
509 * down, When it is active low the 10GBASE-T is power up
774 #define I2C_WA_PWR_ITER (I2C_WA_RETRY_CNT - 1)
936 (_phy)->def_md_devad, \
942 (_phy)->def_md_devad, \
970 * elink_check_lfa - This function checks if link reinitialization is required,
982 struct bxe_softc *sc = params->sc; in elink_check_lfa()
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/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dnvidia,tegra194-pcie.txt4 and thus inherits all the common properties defined in snps,dw-pcie.yaml and
5 snps,dw-pcie-ep.yaml.
6 Some of the controller instances are dual mode where in they can work either
10 - power-domains: A phandle to the node that controls power to the respective
20 "include/dt-bindings/power/tegra194-powergate.h" file.
21 - reg: A list of physical base address and length pairs for each set of
22 controller registers. Must contain an entry for each entry in the reg-names
24 - reg-names: Must include the following entries:
26 "config": As per the definition in snps,dw-pcie.yaml
32 - interrupts: A list of interrupt outputs of the controller. Must contain an
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetRegisterInfo.h1 //==- CodeGen/TargetRegisterInfo.h - Target Register Information -*- C++ -*-==//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
13 //===----------------------------------------------------------------------===//
74 unsigned getID() const { return MC->getID(); } in getID()
76 /// begin/end - Return all of the registers in this class.
78 iterator begin() const { return MC->begin(); } in begin()
79 iterator end() const { return MC->end(); } in end()
82 unsigned getNumRegs() const { return MC->getNumRegs(); } in getNumRegs()
90 return MC->getRegister(i); in getRegister()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp1 //===- ARMAsmParser.cpp - Parse ARM assembly to MCInst instructions -------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
71 #define DEBUG_TYPE "asm-parser"
81 "arm-implicit-it", cl::init(ImplicitItModeTy::ARMOnly),
92 static cl::opt<bool> AddBuildAttributes("arm-add-build-attributes",
101 // of Mask, and so on downwards. So (5 - Position) will shift the in extractITMaskBit()
102 // right bit down to bit 0, including the always-0 bit at bit 4 for in extractITMaskBit()
104 return (Mask >> (5 - Position) & 1); in extractITMaskBit()
159 if (PI != PE && (PII == PIE || PI->getPointer() < PII->getPointer())) in emitPersonalityLocNotes()
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