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/freebsd/sys/contrib/device-tree/Bindings/remoteproc/
H A Dfsl,imx-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX Co-Processor
10 This binding provides support for ARM Cortex M4 Co-processor found on some NXP iMX SoCs.
13 - Peng Fan <peng.fan@nxp.com>
18 - fsl,imx6sx-cm4
19 - fsl,imx7d-cm4
20 - fsl,imx7ulp-cm4
[all …]
H A Dqcom,wcnss-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,wcnss-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
21 - items:
22 - enum:
23 - qcom,pronto-v1-pil
24 - qcom,pronto-v2-pil
25 - qcom,pronto-v3-pil
[all …]
/freebsd/sys/contrib/device-tree/Bindings/bus/
H A Dbaikal,bt1-apb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/bus/baikal,bt1-apb.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Baikal-T1 APB-bus
11 - Serge Semin <fancer.lancer@gmail.com>
14 Baikal-T1 CPU or DMAC MMIO requests are handled by the AMBA 3 AXI Interconnect
15 which routes them to the AXI-APB bridge. This interface is a single master
22 - $ref: /schemas/simple-bus.yaml#
27 const: baikal,bt1-apb
[all …]
H A Dbaikal,bt1-axi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/bus/baikal,bt1-axi.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Baikal-T1 AXI-bus
11 - Serge Semin <fancer.lancer@gmail.com>
14 AXI3-bus is the main communication bus of Baikal-T1 SoC connecting all
15 high-speed peripheral IP-cores with RAM controller and with MIPS P5600
23 accessible by means of the Baikal-T1 System Controller.
26 - $ref: /schemas/simple-bus.yaml#
[all …]
/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dqcom,pcie-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
15 - enum:
16 - qcom,sa8775p-pcie-ep
17 - qcom,sdx55-pcie-ep
18 - qcom,sm8450-pcie-ep
19 - items:
[all …]
H A Dmvebu-pci.txt5 - compatible: one of the following values:
6 marvell,armada-370-pcie
7 marvell,armada-xp-pcie
8 marvell,dove-pcie
9 marvell,kirkwood-pcie
10 - #address-cells, set to <3>
11 - #size-cells, set to <2>
12 - #interrupt-cells, set to <1>
13 - bus-range: PCI bus numbers covered
14 - device_type, set to "pci"
[all …]
/freebsd/sys/contrib/device-tree/Bindings/mux/
H A Dreg-mux.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mux/reg-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic register bitfield-based multiplexer controller
10 - Peter Rosin <peda@axentia.se>
19 - reg-mux # parent device of mux controller is not syscon device
20 - mmio-mux # parent device of mux controller is syscon device
24 '#mux-control-cells':
27 mux-reg-masks:
[all …]
/freebsd/sys/contrib/device-tree/Bindings/soc/qcom/
H A Dqcom,wcnss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
21 firmware-name:
27 qcom,mmio:
32 - qcom,riva"
33 - qcom,pronto"
35 qcom,smd-channels:
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/freebsd/sys/contrib/device-tree/src/arm64/apple/
H A Dt6001.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
15 #include "multi-die-cpp.h"
17 #include "t600x-common.dtsi"
20 compatible = "apple,t6001", "apple,arm-platform";
23 compatible = "simple-bus";
24 #address-cells = <2>;
[all …]
H A Dt6002.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
15 #include "multi-die-cpp.h"
17 #include "t600x-common.dtsi"
20 compatible = "apple,t6002", "apple,arm-platform";
22 #address-cells = <2>;
23 #size-cells = <2>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/socionext/
H A Dmilbeaut-m10v.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/interrupt-controller/irq.h>
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 interrupt-parent = <&gic>;
10 #address-cells = <1>;
11 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/iommu/
H A Darm,smmu-v3.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/iommu/arm,smmu-v3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Will Deacon <will@kernel.org>
11 - Robin Murphy <Robin.Murphy@arm.com>
15 revisions, replacing the MMIO register interface with in-memory command
21 pattern: "^iommu@[0-9a-f]*"
23 const: arm,smmu-v3
32 interrupt-names:
[all …]
/freebsd/sys/contrib/device-tree/Bindings/firmware/
H A Dnvidia,tegra186-bpmp.txt11 - compatible
14 - "nvidia,tegra186-bpmp"
15 - mboxes : The phandle of mailbox controller and the mailbox specifier.
16 - shmem : List of the phandle of the TX and RX shared memory area that
18 - #clock-cells : Should be 1.
19 - #power-domain-cells : Should be 1.
20 - #reset-cells : Should be 1.
26 - .../mailbox/mailbox.txt
27 - .../mailbox/nvidia,tegra186-hsp.txt
33 - .../clock/clock-bindings.txt
[all …]
H A Dnvidia,tegra186-bpmp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/nvidia,tegra186-bpm
[all...]
/freebsd/sys/contrib/device-tree/Bindings/misc/
H A Dqemu,vcpu-stall-detector.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/misc/qemu,vcpu-stall-detector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 which is accessed through MMIO.
14 - Sebastian Ene <sebastianene@google.com>
19 - qemu,vcpu-stall-detector
24 clock-frequency:
35 timeout-sec:
43 - compatible
[all …]
/freebsd/sys/contrib/device-tree/Bindings/hwmon/
H A Dbaikal,bt1-pvt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/hwmon/baikal,bt1-pvt.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Baikal-T1 PVT Sensor
11 - Serge Semin <fancer.lancer@gmail.com>
14 Baikal-T1 SoC provides an embedded process, voltage and temperature
17 which may cause the system instability and even damages. The IP-block
19 control wrapper, which provides a MMIO registers-based access to the
20 sensor core functionality (APB3-bus based) and exposes an additional
[all …]
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dnxp,imx95-display-master-csr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/nxp,imx95-display-master-csr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peng Fan <peng.fan@nxp.com>
15 - const: nxp,imx95-display-master-csr
16 - const: syscon
21 power-domains:
27 '#clock-cells':
32 include/dt-bindings/clock/nxp,imx95-clock.h
[all …]
/freebsd/sys/contrib/device-tree/Bindings/
H A Dwriting-bindings.rst1 .. SPDX-License-Identifier: GPL-2.0
11 Documentation/devicetree/bindings/submitting-patches.rst
17 - DO attempt to make bindings complete even if a driver doesn't support some
21 - DON'T refer to Linux or "device driver" in bindings. Bindings should be
24 - DO use node names matching the class of the device. Many standard names are
25 defined in the DT Spec. If there isn't one, consider adding it.
27 - DO check that the example matches the documentation especially after making
30 - DON'T create nodes just for the sake of instantiating drivers. Multi-function
31 devices only need child nodes when the child nodes have their own DT
34 - DON'T use 'syscon' alone without a specific compatible string. A 'syscon'
[all …]
/freebsd/sys/contrib/device-tree/src/arm/sigmastar/
H A Dmstar-v7.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/mstar-msc313-mpll.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
14 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a7";
[all …]
/freebsd/sys/contrib/device-tree/Bindings/mailbox/
H A Dfsl,mu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dong Aisheng <aisheng.dong@nxp.com>
22 registers (Processor A-facing, Processor B-facing).
27 - const: fsl,imx6sx-mu
28 - const: fsl,imx7ulp-mu
29 - const: fsl,imx8ulp-mu
30 - const: fsl,imx8-mu-scu
31 - const: fsl,imx8-mu-seco
[all …]
/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/
H A Dintel,ixp4xx-expansion-bus-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 memory-mapped expansion bus on the Intel IXP4xx family of system on chips,
15 - Linus Walleij <linus.walleij@linaro.org>
19 pattern: '^bus@[0-9a-f]+$'
23 - enum:
24 - intel,ixp42x-expansion-bus-controller
25 - intel,ixp43x-expansion-bus-controller
[all …]
/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Darm,pl18x.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Ulf Hansson <ulf.hansson@linaro.org>
20 - $ref: /schemas/arm/primecell.yaml#
21 - $ref: mmc-controller.yaml#
29 - arm,pl180
30 - arm,pl181
31 - arm,pl18x
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx1.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 #include "imx1-pinfunc.h"
7 #include <dt-bindings/clock/imx1-clock.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
34 aitc: aitc-interrupt-controller@223000 {
35 compatible = "fsl,imx1-aitc", "fsl,avic";
[all …]
/freebsd/sys/contrib/device-tree/src/arm/allwinner/
H A Dsun5i.dtsi2 * Copyright 2012-2015 Maxime Ripard
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/clock/sun5i-ccu.h>
46 #include <dt-bindings/dma/sun4i-a10.h>
47 #include <dt-bindings/reset/sun5i-ccu.h>
50 interrupt-parent = <&intc>;
51 #address-cells = <1>;
52 #size-cells = <1>;
55 #address-cells = <1>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Darmada-38x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
32 compatible = "arm,cortex-a9-pmu";
33 interrupts-extended = <&mpic 3>;
37 compatible = "marvell,armada380-mbus", "simple-bus";
[all …]

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