| /freebsd/sys/contrib/device-tree/Bindings/remoteproc/ |
| H A D | ti,keystone-rproc.txt | 1 TI Keystone DSP devices
4 The TI Keystone 2 family of SoCs usually have one or more (upto 8) TI DSP Core
5 sub-systems that are used to offload some of the processor-intensive tasks or
8 These processor sub-systems usually contain additional sub-modules like L1
10 a dedicated local power/sleep controller etc. The DSP processor core in
13 DSP Device Node:
15 Each DSP Core sub-system is represented as a single DT node, and should also
22 --------------------
25 - compatible: Should be one of the following,
26 "ti,k2hk-dsp" for DSPs on Keystone 2 66AK2H/K SoCs
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| H A D | ti,k3-dsp-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-dsp-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI K3 DSP devices
10 - Suman Anna <s-anna@ti.com>
13 The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems
14 that are used to offload some of the processor-intensive tasks or algorithms,
17 These processor sub-systems usually contain additional sub-modules like
19 controller, a dedicated local power/sleep controller etc. The DSP processor
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| H A D | ti,omap-remoteproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,omap-remotepro
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| /freebsd/sys/contrib/device-tree/src/arm/ti/keystone/ |
| H A D | keystone-k2hk.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/reset/ti-syscon.h>
15 #address-cells = <1>;
16 #size-cells = <0>;
18 interrupt-parent = <&gic>;
21 compatible = "arm,cortex-a15";
27 compatible = "arm,cortex-a15";
33 compatible = "arm,cortex-a15";
39 compatible = "arm,cortex-a15";
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| H A D | keystone-k2l.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2017 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/reset/ti-syscon.h>
15 #address-cells = <1>;
16 #size-cells = <0>;
18 interrupt-parent = <&gic>;
21 compatible = "arm,cortex-a15";
27 compatible = "arm,cortex-a15";
42 /include/ "keystone-k2l-clocks.dtsi"
45 compatible = "ti,da830-uart", "ns16550a";
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| H A D | keystone-k2e.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/reset/ti-syscon.h>
15 #address-cells = <1>;
16 #size-cells = <0>;
18 interrupt-parent = <&gic>;
21 compatible = "arm,cortex-a15";
27 compatible = "arm,cortex-a15";
33 compatible = "arm,cortex-a15";
39 compatible = "arm,cortex-a15";
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| /freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
| H A D | cirrus,lochnagar.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
15 Logic devices on mini-cards, as well as allowing connection of various
26 [2] Pinctrl: ../pinctrl/pinctrl-bindings.txt
29 [3] include/dt-bindings/pinctrl/lochnagar.h
37 - cirrus,lochnagar-pinctrl
39 gpio-controller: true
41 '#gpio-cells':
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| /freebsd/sys/contrib/device-tree/Bindings/clock/ti/davinci/ |
| H A D | psc.txt | 3 The PSC provides power management, clock gating and reset functionality. It is
7 - compatible: shall be one of:
8 - "ti,da850-psc0" for PSC0 on DA850/OMAP-L138/AM18XX
9 - "ti,da850-psc1" for PSC1 on DA850/OMAP-L138/AM18XX
10 - reg: physical base address and size of the controller's register area
11 - #clock-cells: from common clock binding; shall be set to 1
12 - #power-domain-cells: from generic power domain binding; shall be set to 1.
13 - clocks: phandles to clocks corresponding to the clock-names property
14 - clock-names: list of parent clock names - depends on compatible value
15 - for "ti,da850-psc0", shall be "pll0_sysclk1", "pll0_sysclk2",
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| /freebsd/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | stericsson,db8500-prcmu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/stericsson,db8500-prcmu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ST-Ericsson DB8500 PRCMU - Power Reset and Control Management Unit
10 - Linus Walleij <linus.walleij@linaro.org>
13 The DB8500 Power Reset and Control Management Unit is an XP70 8-bit
14 microprocessor that is embedded in the always-on power domain of the
16 of the silicon, and controlling reset of different IP blocks.
20 pattern: '^prcmu@[0-9a-f]+$'
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| /freebsd/sys/contrib/device-tree/Bindings/reset/ |
| H A D | ti,sci-reset.txt | 1 Texas Instruments System Control Interface (TI-SCI) Reset Controller
8 through a protocol called TI System Control Interface (TI-SCI protocol).
12 TI-SCI Reset Controller Node
14 This reset controller node uses the TI SCI protocol to perform the reset
16 node of the associated TI-SCI system controller node.
19 --------------------
20 - compatible : Should be "ti,sci-reset"
21 - #reset-cells : Should be 2. Please see the reset consumer node below for
24 TI-SCI Reset Consumer Nodes
26 Each of the reset consumer nodes should have the following properties,
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| H A D | ti-syscon-reset.txt | 1 TI SysCon Reset Controller
4 Almost all SoCs have hardware modules that require reset control in addition
5 to clock and power control for their functionality. The reset control is
6 typically provided by means of memory-mapped I/O registers. These registers are
12 A SysCon Reset Controller node defines a device that uses a syscon node
13 and provides reset management functionality for various hardware modules
16 SysCon Reset Controller Node
18 Each of the reset provider/controller nodes should be a child of a syscon
22 --
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| /freebsd/cddl/contrib/opensolaris/lib/libdtrace/common/ |
| H A D | dt_decl.c | 45 if (ddp->dd_kind == CTF_K_UNKNOWN) in dt_decl_check()
48 if (ddp->dd_name != NULL && strcmp(ddp->dd_name, "char") == 0 && in dt_decl_check()
49 (ddp->dd_attr & (DT_DA_SHORT | DT_DA_LONG | DT_DA_LONGLONG))) { in dt_decl_check()
54 if (ddp->dd_name != NULL && strcmp(ddp->dd_name, "void") == 0 && in dt_decl_check()
55 (ddp->dd_attr & (DT_DA_SHORT | DT_DA_LONG | DT_DA_LONGLONG | in dt_decl_check()
61 if (ddp->dd_kind != CTF_K_INTEGER && in dt_decl_check()
62 (ddp->dd_attr & (DT_DA_SIGNED | DT_DA_UNSIGNED))) { in dt_decl_check()
67 if (ddp->dd_kind != CTF_K_INTEGER && ddp->dd_kind != CTF_K_FLOAT && in dt_decl_check()
68 (ddp->dd_attr & (DT_DA_LONG | DT_DA_LONGLONG))) { in dt_decl_check()
71 "floating-point type\n"); in dt_decl_check()
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| /freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
| H A D | dra74x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
16 compatible = "arm,cortex-a15";
18 operating-points-v2 = <&cpu0_opp_table>;
21 clock-names = "cpu";
23 clock-latency = <300000>; /* From omap-cpufreq driver */
26 #cooling-cells = <2>; /* min followed by max */
28 vbb-supply = <&abb_mpu>;
40 compatible = "arm,cortex-a15-pmu";
41 interrupt-parent = <&wakeupgen>;
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| H A D | omap5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/omap.h>
12 #include <dt-bindings/clock/omap5.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
19 interrupt-parent = <&wakeupgen>;
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| H A D | omap4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
6 #include <dt-bindings/bus/ti-sysc.h>
7 #include <dt-bindings/clock/omap4.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/pinctrl/omap.h>
11 #include <dt-bindings/clock/omap4.h>
15 interrupt-parent = <&wakeupgen>;
16 #address-cells = <1>;
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| /freebsd/sys/contrib/device-tree/src/arm64/ti/ |
| H A D | k3-j722s-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-ti.h>
12 serdes_refclk: clk-0 {
13 compatible = "fixed-clock";
14 #clock-cells = <0>;
15 clock-frequency = <0>;
21 compatible = "ti,am64-wiz-10g";
23 #address-cells = <1>;
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| /freebsd/sys/contrib/device-tree/Bindings/media/ |
| H A D | si4713.txt | 4 supporting 76-108 MHz. It includes an RDS encoder and has both, a stereo-analog
5 and a digital interface, which supports I2S, left-justified and a custom
6 DSP-mode format. It is programmable through an I2C interface.
9 - compatible: Should contain "silabs,si4713"
10 - reg: the I2C address of the device
13 - interrupts-extended: Interrupt specifier for the chips interrupt
14 - reset-gpios: GPIO specifier for the chips reset line
15 - vdd-supply: phandle for Vdd regulator
16 - vio-supply: phandle for Vio regulator
25 interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSubtarget.cpp | 1 //===-- MipsSubtarget.cpp - Mips Subtarget Information --------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
30 #define DEBUG_TYPE "mips-subtarget"
39 Mixed16_32("mips-mixed-16-32", cl::init(false),
44 static cl::opt<bool> Mips_Os16("mips-os16", cl::init(false),
49 static cl::opt<bool> Mips16HardFloat("mips16-hard-float", cl::NotHidden,
54 Mips16ConstantIslands("mips16-constant-islands", cl::NotHidden,
60 cl::desc("Enable gp-relative addressing of mips small data items"));
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| /freebsd/sys/contrib/device-tree/Bindings/input/ |
| H A D | cirrus,cs40l50.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - James Ogletree <jogletre@opensource.cirrus.com>
14 integrated DSP, and closed-loop algorithms.
19 - cirrus,cs40l50
27 reset-gpios:
30 vdd-a-supply:
33 vdd-p-supply:
34 description: Power supply for always-on circuits.
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| /freebsd/sys/contrib/device-tree/Bindings/sound/ |
| H A D | nvidia,tegra20-i2s.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra20-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 Justified Mode, Right Justified Mode, and DSP mode formats.
15 - Thierry Reding <treding@nvidia.com>
16 - Jon Hunter <jonathanh@nvidia.com>
20 const: nvidia,tegra20-i2s
28 reset-names:
40 dma-names:
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| H A D | zl38060.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 which consists of a Digital Signal Processor (DSP), several Digital
15 - Jaroslav Kysela <perex@perex.cz>
16 - Takashi Iwai <tiwai@suse.com>
19 - $ref: dai-common.yaml#
30 spi-max-frequency:
33 reset-gpios:
35 A GPIO line handling reset of the chip. As the line is active low,
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| H A D | mscc,zl38060.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 which consists of a Digital Signal Processor (DSP), several Digital
15 - Jaroslav Kysela <perex@perex.cz>
16 - Takashi Iwai <tiwai@suse.com>
19 - $ref: dai-common.yaml#
30 spi-max-frequency:
33 reset-gpios:
35 A GPIO line handling reset of the chip. As the line is active low,
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| H A D | infineon,peb2466.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Herve Codina <herve.codina@bootlin.com>
13 The Infineon PEB2466 codec is a programmable DSP-based four channels codec
16 The time-slots used by the codec must be set and so, the properties
17 'dai-tdm-slot-num', 'dai-tdm-slot-width', 'dai-tdm-slot-tx-mask' and
18 'dai-tdm-slot-rx-mask' must be present in the sound card node for sub-nodes
19 that involve the codec. The codec uses one 8bit time-slot per channel.
20 'dai-tdm-tdm-slot-with' must be set to 8.
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| H A D | st,stm32-sai.txt | 4 as I2S standards, LSB or MSB-justified, PCM/DSP, TDM, and AC'97.
5 The SAI contains two independent audio sub-blocks. Each sub-block has
9 - compatible: Should be "st,stm32f4-sai" or "st,stm32h7-sai"
10 - reg: Base address and size of SAI common register set.
11 - clocks: Must contain phandle and clock specifier pairs for each entry
12 in clock-names.
13 - clock-names: Must contain "pclk" "x8k" and "x11k"
15 Mandatory for "st,stm32h7-sai" compatible.
16 Not used for "st,stm32f4-sai" compatible.
19 - interrupts: cpu DAI interrupt line shared by SAI sub-blocks
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| H A D | ti,tas2781.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2022 - 2023 Texas Instruments Incorporated
4 ---
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