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/freebsd/sys/contrib/device-tree/Bindings/remoteproc/
H A Dti,keystone-rproc.txt1 TI Keystone DSP devices
4 The TI Keystone 2 family of SoCs usually have one or more (upto 8) TI DSP Core
5 sub-systems that are used to offload some of the processor-intensive tasks or
8 These processor sub-systems usually contain additional sub-modules like L1
10 a dedicated local power/sleep controller etc. The DSP processor core in
13 DSP Device Node:
15 Each DSP Core sub-system is represented as a single DT node, and should also
22 --------------------
25 - compatible: Should be one of the following,
26 "ti,k2hk-dsp" for DSPs on Keystone 2 66AK2H/K SoCs
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H A Dti,k3-dsp-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-ds
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H A Dti,omap-remoteproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,omap-remotepro
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/freebsd/sys/contrib/device-tree/src/arm/ti/keystone/
H A Dkeystone-k2hk.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
8 #include <dt-bindings/reset/ti-syscon.h>
15 #address-cells = <1>;
16 #size-cells = <0>;
18 interrupt-parent = <&gic>;
21 compatible = "arm,cortex-a15";
27 compatible = "arm,cortex-a15";
33 compatible = "arm,cortex-a15";
39 compatible = "arm,cortex-a15";
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H A Dkeystone-k2l.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2017 Texas Instruments Incorporated - http://www.ti.com/
8 #include <dt-bindings/reset/ti-syscon.h>
15 #address-cells = <1>;
16 #size-cell
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H A Dkeystone-k2e.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
8 #include <dt-bindings/reset/ti-syscon.h>
15 #address-cells = <1>;
16 #size-cells = <0>;
18 interrupt-parent = <&gic>;
21 compatible = "arm,cortex-a15";
27 compatible = "arm,cortex-a15";
33 compatible = "arm,cortex-a15";
39 compatible = "arm,cortex-a15";
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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dcirrus,lochnagar.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
15 Logic devices on mini-cards, as well as allowing connection of various
26 [2] Pinctrl: ../pinctrl/pinctrl-bindings.txt
29 [3] include/dt-bindings/pinctrl/lochnagar.h
37 - cirrus,lochnagar-pinctrl
39 gpio-controller: true
41 '#gpio-cells':
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/freebsd/sys/contrib/device-tree/Bindings/clock/ti/davinci/
H A Dpsc.txt3 The PSC provides power management, clock gating and reset functionality. It is
7 - compatible: shall be one of:
8 - "ti,da850-psc0" for PSC0 on DA850/OMAP-L138/AM18XX
9 - "ti,da850-psc1" for PSC1 on DA850/OMAP-L138/AM18XX
10 - reg: physical base address and size of the controller's register area
11 - #clock-cells: from common clock binding; shall be set to 1
12 - #power-domain-cells: from generic power domain binding; shall be set to 1.
13 - clocks: phandles to clocks corresponding to the clock-names property
14 - clock-names: list of parent clock names - depends on compatible value
15 - for "ti,da850-psc0", shall be "pll0_sysclk1", "pll0_sysclk2",
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/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Dstericsson,db8500-prcmu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/stericsson,db8500-prcmu.yaml#
5 $schema: http://devicetree.org/meta-schema
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/freebsd/sys/contrib/device-tree/Bindings/reset/
H A Dti,sci-reset.txt1 Texas Instruments System Control Interface (TI-SCI) Reset Controller
8 through a protocol called TI System Control Interface (TI-SCI protocol).
12 TI-SCI Reset Controller Node
14 This reset controller node uses the TI SCI protocol to perform the reset
16 node of the associated TI-SCI system controller node.
19 --------------------
20 - compatible : Should be "ti,sci-reset"
21 - #reset-cells : Should be 2. Please see the reset consumer node below for
24 TI-SCI Reset Consumer Nodes
26 Each of the reset consumer nodes should have the following properties,
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H A Dti-syscon-reset.txt1 TI SysCon Reset Controller
4 Almost all SoCs have hardware modules that require reset control in addition
5 to clock and power control for their functionality. The reset control is
6 typically provided by means of memory-mapped I/O registers. These registers are
12 A SysCon Reset Controller node defines a device that uses a syscon node
13 and provides reset management functionality for various hardware modules
16 SysCon Reset Controller Node
18 Each of the reset provider/controller nodes should be a child of a syscon
22 --
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/freebsd/cddl/contrib/opensolaris/lib/libdtrace/common/
H A Ddt_decl.c45 if (ddp->dd_kind == CTF_K_UNKNOWN) in dt_decl_check()
48 if (ddp->dd_name != NULL && strcmp(ddp->dd_name, "char") == 0 && in dt_decl_check()
49 (ddp->dd_attr & (DT_DA_SHORT | DT_DA_LONG | DT_DA_LONGLONG))) { in dt_decl_check()
54 if (ddp->dd_name != NULL && strcmp(ddp->dd_name, "void") == 0 && in dt_decl_check()
55 (ddp->dd_attr & (DT_DA_SHORT | DT_DA_LONG | DT_DA_LONGLONG | in dt_decl_check()
61 if (ddp->dd_kind != CTF_K_INTEGER && in dt_decl_check()
62 (ddp->dd_attr & (DT_DA_SIGNED | DT_DA_UNSIGNED))) { in dt_decl_check()
67 if (ddp->dd_kind != CTF_K_INTEGER && ddp->dd_kind != CTF_K_FLOAT && in dt_decl_check()
68 (ddp->dd_attr & (DT_DA_LONG | DT_DA_LONGLONG))) { in dt_decl_check()
71 "floating-point type\n"); in dt_decl_check()
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/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Ddra74x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
16 compatible = "arm,cortex-a15";
18 operating-points-v2 = <&cpu0_opp_table>;
21 clock-names = "cpu";
23 clock-latency = <300000>; /* From omap-cpufreq driver */
26 #cooling-cells = <2>; /* min followed by max */
28 vbb-supply = <&abb_mpu>;
40 compatible = "arm,cortex-a15-pmu";
41 interrupt-parent = <&wakeupgen>;
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H A Domap5.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/omap.h>
12 #include <dt-bindings/clock/omap5.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
19 interrupt-parent = <&wakeupgen>;
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H A Domap4.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
6 #include <dt-bindings/bus/ti-sysc.h>
7 #include <dt-bindings/clock/omap4.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/pinctrl/omap.h>
11 #include <dt-bindings/clock/omap4.h>
15 interrupt-parent = <&wakeupgen>;
16 #address-cells = <1>;
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/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dsi4713.txt4 supporting 76-108 MHz. It includes an RDS encoder and has both, a stereo-analog
5 and a digital interface, which supports I2S, left-justified and a custom
6 DSP-mode format. It is programmable through an I2C interface.
9 - compatible: Should contain "silabs,si4713"
10 - reg: the I2C address of the device
13 - interrupts-extended: Interrupt specifier for the chips interrupt
14 - reset-gpios: GPIO specifier for the chips reset line
15 - vdd-supply: phandle for Vdd regulator
16 - vio-supply: phandle for Vio regulator
25 interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
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/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dnvidia,tegra20-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra20-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 Justified Mode, Right Justified Mode, and DSP mode formats.
15 - Thierry Reding <treding@nvidia.com>
16 - Jon Hunter <jonathanh@nvidia.com>
20 const: nvidia,tegra20-i2s
28 reset-names:
40 dma-names:
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H A Dzl38060.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 which consists of a Digital Signal Processor (DSP), several Digital
15 - Jaroslav Kysela <perex@perex.cz>
16 - Takashi Iwai <tiwai@suse.com>
19 - $ref: dai-common.yaml#
30 spi-max-frequency:
33 reset-gpios:
35 A GPIO line handling reset of the chip. As the line is active low,
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H A Dinfineon,peb2466.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Herve Codina <herve.codina@bootlin.com>
13 The Infineon PEB2466 codec is a programmable DSP-based four channels codec
16 The time-slots used by the codec must be set and so, the properties
17 'dai-tdm-slot-num', 'dai-tdm-slot-width', 'dai-tdm-slot-tx-mask' and
18 'dai-tdm-slot-rx-mask' must be present in the sound card node for sub-nodes
19 that involve the codec. The codec uses one 8bit time-slot per channel.
20 'dai-tdm-tdm-slot-with' must be set to 8.
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H A Dti,tas2781.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2022 - 2023 Texas Instruments Incorporated
4 ---
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H A Dst,stm32-sai.txt4 as I2S standards, LSB or MSB-justified, PCM/DSP, TDM, and AC'97.
5 The SAI contains two independent audio sub-blocks. Each sub-block has
9 - compatible: Should be "st,stm32f4-sai" or "st,stm32h7-sai"
10 - reg: Base address and size of SAI common register set.
11 - clocks: Must contain phandle and clock specifier pairs for each entry
12 in clock-names.
13 - clock-names: Must contain "pclk" "x8k" and "x11k"
15 Mandatory for "st,stm32h7-sai" compatible.
16 Not used for "st,stm32f4-sai" compatible.
19 - interrupts: cpu DAI interrupt line shared by SAI sub-blocks
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H A Damlogic,axg-pdm.txt4 - compatible: 'amlogic,axg-pdm' or
5 'amlogic,g12a-pdm' or
6 'amlogic,sm1-pdm'
7 - reg: physical base address of the controller and length of memory
9 - clocks: list of clock phandle, one for each entry clock-names.
10 - clock-names: should contain the following:
13 * "sysclk" : dsp system clock
14 - #sound-dai-cells: must be 0.
17 - resets: phandle to the dedicated reset line of the pdm input.
21 pdm: audio-controller@ff632000 {
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H A Dti,tlv320aic3x.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 TLV320AIC3x are a series of low-power stereo audio codecs with stereo
13 single-ended or fully differential configurations.
16 data bus is programmable for I2S, left/right-justified, DSP, or TDM modes.
44 - Jai Luthra <j-luthra@ti.com>
49 - ti,tlv320aic3x
50 - ti,tlv320aic33
51 - ti,tlv320aic3007
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSubtarget.cpp1 //===-- MipsSubtarget.cpp - Mips Subtarget Information --------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
30 #define DEBUG_TYPE "mips-subtarget"
39 Mixed16_32("mips-mixed-16-32", cl::init(false),
44 static cl::opt<bool> Mips_Os16("mips-os16", cl::init(false),
49 static cl::opt<bool> Mips16HardFloat("mips16-hard-float", cl::NotHidden,
54 Mips16ConstantIslands("mips16-constant-islands", cl::NotHidden,
60 cl::desc("Enable gp-relative addressing of mips small data items"));
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/freebsd/share/man/man4/
H A Dpcm.42 .\" Copyright (c) 2009-2011 Joel Dahl <joel@FreeBSD.org>
39 .Bd -ragged -offset indent
60 driver are: multichannel audio, per-application
74 .Bl -bullet -compact
118 .Xr snd_uaudio 4 (auto-loaded on device plug)
145 .Bl -tag -width ".Va snd_driver_load" -offse
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