Searched full:dsi2 (Results 1 – 10 of 10) sorted by relevance
| /linux/drivers/gpu/drm/rockchip/ |
| H A D | dw-mipi-dsi2-rockchip.c | 83 static void grf_field_write(struct dw_mipi_dsi2_rockchip *dsi2, enum grf_reg_fields index, in grf_field_write() argument 86 const struct dsigrf_reg *field = &dsi2->cdata->grf_regs[index]; in grf_field_write() 91 regmap_write(dsi2->grf_regmap, field->offset, in grf_field_write() 102 struct dw_mipi_dsi2_rockchip *dsi2 = priv_data; in dw_mipi_dsi2_phy_power_on() local 105 ret = phy_set_mode(dsi2->phy, PHY_MODE_MIPI_DPHY); in dw_mipi_dsi2_phy_power_on() 107 dev_err(dsi2->dev, "Failed to set phy mode: %d\n", ret); in dw_mipi_dsi2_phy_power_on() 111 phy_configure(dsi2->phy, &dsi2->phy_opts); in dw_mipi_dsi2_phy_power_on() 112 phy_power_on(dsi2->phy); in dw_mipi_dsi2_phy_power_on() 117 struct dw_mipi_dsi2_rockchip *dsi2 = priv_data; in dw_mipi_dsi2_phy_power_off() local 119 phy_power_off(dsi2->phy); in dw_mipi_dsi2_phy_power_off() [all …]
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| /linux/include/drm/bridge/ |
| H A D | dw_mipi_dsi2.h | 91 void dw_mipi_dsi2_remove(struct dw_mipi_dsi2 *dsi2); 92 int dw_mipi_dsi2_bind(struct dw_mipi_dsi2 *dsi2, struct drm_encoder *encoder); 93 void dw_mipi_dsi2_unbind(struct dw_mipi_dsi2 *dsi2);
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| /linux/Documentation/devicetree/bindings/display/ |
| H A D | ste,mcde.yaml | 75 the high speed clock is not present on the third (dsi2) block, so it 156 dsi2: dsi@a0353000 {
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| /linux/Documentation/devicetree/bindings/soc/imx/ |
| H A D | fsl,imx8mp-media-blk-ctrl.yaml | 49 - const: mipi-dsi2 118 "mipi-csi2", "lcdif2", "isp", "dwe", "mipi-dsi2";
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| /linux/arch/arm/boot/dts/ti/omap/ |
| H A D | omap4-var-dvk-om44.dts | 65 &dsi2 {
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| H A D | omap4-panda-common.dtsi | 613 &dsi2 {
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| H A D | omap5.dtsi | 601 dsi2: encoder@0 { label
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| H A D | omap4.dtsi | 673 dsi2: encoder@0 { label
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| /linux/drivers/pmdomain/imx/ |
| H A D | imx8m-blk-ctrl.c | 841 .gpc_name = "mipi-dsi2",
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| /linux/drivers/video/fbdev/mmp/hw/ |
| H A D | mmp_ctrl.h | 1018 /* DSI2 - 3 Lane Controller base */
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