/linux/drivers/gpu/drm/mediatek/ |
H A D | mtk_dsi.c | 238 static void mtk_dsi_mask(struct mtk_dsi *dsi, u32 offset, u32 mask, u32 data) in mtk_dsi_mask() argument 240 u32 temp = readl(dsi->regs + offset); in mtk_dsi_mask() 242 writel((temp & ~mask) | (data & mask), dsi->regs + offset); in mtk_dsi_mask() 245 static void mtk_dsi_phy_timconfig(struct mtk_dsi *dsi) in mtk_dsi_phy_timconfig() argument 248 u32 data_rate_mhz = DIV_ROUND_UP(dsi->data_rate, HZ_PER_MHZ); in mtk_dsi_phy_timconfig() 249 struct mtk_phy_timing *timing = &dsi->phy_timing; in mtk_dsi_phy_timconfig() 286 writel(timcon0, dsi->regs + DSI_PHY_TIMECON0); in mtk_dsi_phy_timconfig() 287 writel(timcon1, dsi->regs + DSI_PHY_TIMECON1); in mtk_dsi_phy_timconfig() 288 writel(timcon2, dsi->regs + DSI_PHY_TIMECON2); in mtk_dsi_phy_timconfig() 289 writel(timcon3, dsi->regs + DSI_PHY_TIMECON3); in mtk_dsi_phy_timconfig() [all …]
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/linux/drivers/gpu/drm/rockchip/ |
H A D | dw-mipi-dsi-rockchip.c | 368 static inline void dsi_write(struct dw_mipi_dsi_rockchip *dsi, u32 reg, u32 val) in dsi_write() argument 370 writel(val, dsi->base + reg); in dsi_write() 373 static void dw_mipi_dsi_phy_write(struct dw_mipi_dsi_rockchip *dsi, in dw_mipi_dsi_phy_write() argument 382 dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLK | PHY_UNTESTCLR); in dw_mipi_dsi_phy_write() 384 dsi_write(dsi, DSI_PHY_TST_CTRL1, PHY_TESTEN | PHY_TESTDOUT(0) | in dw_mipi_dsi_phy_write() 387 dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_UNTESTCLK | PHY_UNTESTCLR); in dw_mipi_dsi_phy_write() 389 dsi_write(dsi, DSI_PHY_TST_CTRL1, PHY_UNTESTEN | PHY_TESTDOUT(0) | in dw_mipi_dsi_phy_write() 392 dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLK | PHY_UNTESTCLR); in dw_mipi_dsi_phy_write() 398 static inline unsigned int ns2bc(struct dw_mipi_dsi_rockchip *dsi, int ns) in ns2bc() argument 400 return DIV_ROUND_UP(ns * dsi->lane_mbps / 8, 1000); in ns2bc() [all …]
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/linux/drivers/gpu/drm/ |
H A D | drm_mipi_dsi.c | 2 * MIPI DSI Bus 45 * DOC: dsi helpers 47 * These functions contain some common logic and helpers to deal with MIPI DSI 50 * Helpers are provided for a number of standard MIPI DSI command as well as a 56 struct mipi_dsi_device *dsi = to_mipi_dsi_device(dev); in mipi_dsi_device_match() local 62 /* compare DSI device and driver names */ in mipi_dsi_device_match() 63 if (!strcmp(dsi->name, drv->name)) in mipi_dsi_device_match() 71 const struct mipi_dsi_device *dsi = to_mipi_dsi_device(dev); in mipi_dsi_uevent() local 79 dsi->name); in mipi_dsi_uevent() 96 .name = "mipi-dsi", [all …]
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/linux/drivers/gpu/drm/sun4i/ |
H A D | sun6i_mipi_dsi.c | 291 static void sun6i_dsi_inst_abort(struct sun6i_dsi *dsi) in sun6i_dsi_inst_abort() argument 293 regmap_update_bits(dsi->regs, SUN6I_DSI_BASIC_CTL0_REG, in sun6i_dsi_inst_abort() 297 static void sun6i_dsi_inst_commit(struct sun6i_dsi *dsi) in sun6i_dsi_inst_commit() argument 299 regmap_update_bits(dsi->regs, SUN6I_DSI_BASIC_CTL0_REG, in sun6i_dsi_inst_commit() 304 static int sun6i_dsi_inst_wait_for_completion(struct sun6i_dsi *dsi) in sun6i_dsi_inst_wait_for_completion() argument 308 return regmap_read_poll_timeout(dsi->regs, SUN6I_DSI_BASIC_CTL0_REG, in sun6i_dsi_inst_wait_for_completion() 314 static void sun6i_dsi_inst_setup(struct sun6i_dsi *dsi, in sun6i_dsi_inst_setup() argument 321 regmap_write(dsi->regs, SUN6I_DSI_INST_FUNC_REG(id), in sun6i_dsi_inst_setup() 329 static void sun6i_dsi_inst_init(struct sun6i_dsi *dsi, in sun6i_dsi_inst_init() argument 334 sun6i_dsi_inst_setup(dsi, DSI_INST_ID_LP11, DSI_INST_MODE_STOP, in sun6i_dsi_inst_init() [all …]
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/linux/drivers/gpu/drm/bridge/ |
H A D | samsung-dsim.c | 535 static inline void samsung_dsim_write(struct samsung_dsim *dsi, in samsung_dsim_write() argument 538 writel(val, dsi->reg_base + dsi->driver_data->reg_ofs[idx]); in samsung_dsim_write() 541 static inline u32 samsung_dsim_read(struct samsung_dsim *dsi, enum reg_idx idx) in samsung_dsim_read() argument 543 return readl(dsi->reg_base + dsi->driver_data->reg_ofs[idx]); in samsung_dsim_read() 546 static void samsung_dsim_wait_for_reset(struct samsung_dsim *dsi) in samsung_dsim_wait_for_reset() argument 548 if (wait_for_completion_timeout(&dsi->completed, msecs_to_jiffies(300))) in samsung_dsim_wait_for_reset() 551 dev_err(dsi->dev, "timeout waiting for reset\n"); in samsung_dsim_wait_for_reset() 554 static void samsung_dsim_reset(struct samsung_dsim *dsi) in samsung_dsim_reset() argument 556 u32 reset_val = dsi->driver_data->reg_values[RESET_TYPE]; in samsung_dsim_reset() 558 reinit_completion(&dsi->completed); in samsung_dsim_reset() [all …]
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/linux/drivers/gpu/drm/stm/ |
H A D | dw_mipi_dsi-stm.c | 28 /* DSI digital registers & bit definitions */ 32 /* DSI wrapper registers & bit definitions */ 35 #define WCFGR_DSIM BIT(0) /* DSI Mode */ 39 #define WCR_DSIEN BIT(3) /* DSI ENable */ 63 /* dsi color format coding according to the datasheet */ 86 struct dw_mipi_dsi *dsi; member 94 static inline void dsi_write(struct dw_mipi_dsi_stm *dsi, u32 reg, u32 val) in dsi_write() argument 96 writel(val, dsi->base + reg); in dsi_write() 99 static inline u32 dsi_read(struct dw_mipi_dsi_stm *dsi, u32 reg) in dsi_read() argument 101 return readl(dsi->base + reg); in dsi_read() [all …]
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/linux/include/drm/ |
H A D | drm_mipi_dsi.h | 3 * MIPI DSI Bus 25 * struct mipi_dsi_msg - read/write DSI buffer 50 * struct mipi_dsi_packet - represents a MIPI DSI packet in protocol format 68 * struct mipi_dsi_host_ops - DSI bus operations 69 * @attach: attach DSI device to DSI host 70 * @detach: detach DSI device from DSI host 71 * @transfer: transmit a DSI packet 73 * DSI packets transmitted by .transfer() are passed in as mipi_dsi_msg 81 * Note that typically DSI packet transmission is atomic, so the .transfer() 92 struct mipi_dsi_device *dsi); [all …]
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/linux/drivers/gpu/drm/bridge/imx/ |
H A D | imx93-mipi-dsi.c | 203 static void dphy_pll_write(struct imx93_dsi *dsi, unsigned int reg, u32 value) in dphy_pll_write() argument 207 ret = regmap_write(dsi->regmap, reg, value); in dphy_pll_write() 209 dev_err(dsi->dev, "failed to write 0x%08x to pll reg 0x%x: %d\n", in dphy_pll_write() 220 dphy_pll_get_configure_from_opts(struct imx93_dsi *dsi, in dphy_pll_get_configure_from_opts() argument 224 struct device *dev = dsi->dev; in dphy_pll_get_configure_from_opts() 225 unsigned long fin = dsi->ref_clk_rate; in dphy_pll_get_configure_from_opts() 296 static void dphy_pll_clear_shadow(struct imx93_dsi *dsi) in dphy_pll_clear_shadow() argument 300 dphy_pll_write(dsi, DSI_REG, CLKSEL_GEN); in dphy_pll_clear_shadow() 304 dphy_pll_write(dsi, DSI_REG, CLKSEL_GEN | SHADOW_CLR); in dphy_pll_clear_shadow() 308 dphy_pll_write(dsi, DSI_REG, CLKSEL_GEN); in dphy_pll_clear_shadow() [all …]
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/linux/Documentation/devicetree/bindings/display/ |
H A D | mipi-dsi-bus.txt | 1 MIPI DSI (Display Serial Interface) busses 6 define the syntax used to represent a DSI bus in a device tree. 8 This document describes DSI bus-specific properties only or defines existing 9 standard properties in the context of the DSI bus. 11 Each DSI host provides a DSI bus. The DSI host controller's node contains a 15 The following assumes that only a single peripheral is connected to a DSI 18 DSI host 22 a DSI host, the following properties apply to a node representing a DSI host. 26 bus. DSI peripherals are addressed using a 2-bit virtual channel number, so 34 conjunction with another DSI host to drive the same peripheral. Hardware [all …]
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H A D | allwinner,sun6i-a31-mipi-dsi.yaml | 4 $id: http://devicetree.org/schemas/display/allwinner,sun6i-a31-mipi-dsi.yaml# 7 title: Allwinner A31 MIPI-DSI Controller 17 - allwinner,sun6i-a31-mipi-dsi 18 - allwinner,sun50i-a64-mipi-dsi 19 - allwinner,sun50i-a100-mipi-dsi 21 - const: allwinner,sun20i-d1-mipi-dsi 22 - const: allwinner,sun50i-a100-mipi-dsi 44 vcc-dsi-supply: 45 description: VCC-DSI power supply of the DSI encoder 70 - $ref: dsi-controller.yaml# [all …]
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H A D | dsi-controller.yaml | 4 $id: http://devicetree.org/schemas/display/dsi-controller.yaml# 7 title: Common Properties for DSI Display Panels 13 This document defines device tree properties common to DSI, Display 22 Notice: this binding concerns DSI panels connected directly to a master 23 without any intermediate port graph to the panel. Each DSI master 31 pattern: "^dsi(@.*)?$" 37 another DSI host to drive the same peripheral. Hardware supporting 39 to be driven by the same clock. Only the DSI host instance 50 description: Panels connected to the DSI link 58 The virtual channel number of a DSI peripheral. Must be in the range [all …]
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/linux/drivers/video/fbdev/omap2/omapfb/dss/ |
H A D | dsi.c | 3 * linux/drivers/video/omap2/dss/dsi.c 9 #define DSS_SUBSYS_NAME "DSI" 47 /* DSI Protocol Engine */ 213 /* DSI PLL HSDIV indices */ 435 struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); in dsi_write_reg() local 439 case DSI_PROTO: base = dsi->proto_base; break; in dsi_write_reg() 440 case DSI_PHY: base = dsi->phy_base; break; in dsi_write_reg() 441 case DSI_PLL: base = dsi->pll_base; break; in dsi_write_reg() 451 struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); in dsi_read_reg() local 455 case DSI_PROTO: base = dsi->proto_base; break; in dsi_read_reg() [all …]
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/linux/drivers/gpu/drm/panel/ |
H A D | panel-jdi-lt070me05000.c | 31 struct mipi_dsi_device *dsi; member 50 struct mipi_dsi_device *dsi = jdi->dsi; in jdi_panel_init() local 51 struct device *dev = &jdi->dsi->dev; in jdi_panel_init() 54 dsi->mode_flags |= MIPI_DSI_MODE_LPM; in jdi_panel_init() 56 ret = mipi_dsi_dcs_soft_reset(dsi); in jdi_panel_init() 62 ret = mipi_dsi_dcs_set_pixel_format(dsi, MIPI_DCS_PIXEL_FMT_24BIT << 4); in jdi_panel_init() 68 ret = mipi_dsi_dcs_set_column_address(dsi, 0, jdi->mode->hdisplay - 1); in jdi_panel_init() 74 ret = mipi_dsi_dcs_set_page_address(dsi, 0, jdi->mode->vdisplay - 1); in jdi_panel_init() 86 ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, in jdi_panel_init() 94 ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_WRITE_POWER_SAVE, in jdi_panel_init() [all …]
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H A D | panel-startek-kd070fhfid015.c | 43 struct mipi_dsi_device *dsi; member 54 struct mipi_dsi_device *dsi = stk->dsi; in stk_panel_init() local 55 struct mipi_dsi_multi_context dsi_ctx = {.dsi = dsi}; in stk_panel_init() 83 struct mipi_dsi_device *dsi = stk->dsi; in stk_panel_on() local 84 struct mipi_dsi_multi_context dsi_ctx = {.dsi = dsi}; in stk_panel_on() 95 struct mipi_dsi_device *dsi = stk->dsi; in stk_panel_off() local 96 struct mipi_dsi_multi_context dsi_ctx = {.dsi = dsi}; in stk_panel_off() 98 dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; in stk_panel_off() 195 struct mipi_dsi_device *dsi = bl_get_data(bl); in dsi_dcs_bl_get_brightness() local 199 dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; in dsi_dcs_bl_get_brightness() [all …]
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H A D | Kconfig | 56 uses 24 bit RGB per pixel. It provides a MIPI DSI interface to 57 the host and backlight is controlled through DSI commands. 67 24 bit RGB per pixel. It provides a MIPI DSI interface to 71 tristate "BOE TD4320 DSI panel" 87 resolution and uses 24 bit RGB per pixel. It provides a MIPI DSI 97 45NA WUXGA PANEL DSI Video Mode panel 106 WUXGA PANEL DSI Video Mode panel 116 The panel has a resolution of 1080x2246. It provides a MIPI DSI 126 KD35T133 controller for 320x480 LCD panels with MIPI-DSI 136 4-lane 800x1280 MIPI DSI panel. [all …]
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H A D | panel-novatek-nt37801.c | 22 struct mipi_dsi_device *dsi; member 57 struct mipi_dsi_device *dsi = ctx->dsi; in novatek_nt37801_on() local 58 struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; in novatek_nt37801_on() 60 dsi->mode_flags |= MIPI_DSI_MODE_LPM; in novatek_nt37801_on() 114 struct mipi_dsi_device *dsi = ctx->dsi; in novatek_nt37801_off() local 115 struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; in novatek_nt37801_off() 117 dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; in novatek_nt37801_off() 131 struct device *dev = &ctx->dsi->dev; in novatek_nt37801_prepare() 148 ret = mipi_dsi_picture_parameter_set(ctx->dsi, &pps); in novatek_nt37801_prepare() 154 ret = mipi_dsi_compression_mode(ctx->dsi, true); in novatek_nt37801_prepare() [all …]
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H A D | panel-samsung-s6e63m0-dsi.c | 3 * DSI interface to the Samsung S6E63M0 panel. 22 struct mipi_dsi_device *dsi = to_mipi_dsi_device(dev); in s6e63m0_dsi_dcs_read() local 25 ret = mipi_dsi_dcs_read(dsi, cmd, data, 1); in s6e63m0_dsi_dcs_read() 31 dev_dbg(dev, "DSI read CMD %02x = %02x\n", cmd, *data); in s6e63m0_dsi_dcs_read() 39 struct mipi_dsi_device *dsi = to_mipi_dsi_device(dev); in s6e63m0_dsi_dcs_write() local 47 dev_dbg(dev, "DSI writing dcs seq: %*ph\n", (int)len, data); in s6e63m0_dsi_dcs_write() 59 ret = mipi_dsi_dcs_write(dsi, cmd, seqp, chunk); in s6e63m0_dsi_dcs_write() 71 ret = mipi_dsi_dcs_write(dsi, MCS_GLOBAL_PARAM, &cmdwritten, 1); in s6e63m0_dsi_dcs_write() 77 ret = mipi_dsi_dcs_write(dsi, cmd, seqp, chunk); in s6e63m0_dsi_dcs_write() 92 static int s6e63m0_dsi_probe(struct mipi_dsi_device *dsi) in s6e63m0_dsi_probe() argument [all …]
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H A D | panel-osd-osd101t2587-53ts.c | 20 struct mipi_dsi_device *dsi; member 37 ret = mipi_dsi_shutdown_peripheral(osd101t2587->dsi); in osd101t2587_panel_disable() 63 ret = mipi_dsi_turn_on_peripheral(osd101t2587->dsi); in osd101t2587_panel_enable() 128 struct device *dev = &osd101t2587->dsi->dev; in osd101t2587_panel_add() 144 static int osd101t2587_panel_probe(struct mipi_dsi_device *dsi) in osd101t2587_panel_probe() argument 150 id = of_match_node(osd101t2587_of_match, dsi->dev.of_node); in osd101t2587_panel_probe() 154 dsi->lanes = 4; in osd101t2587_panel_probe() 155 dsi->format = MIPI_DSI_FMT_RGB888; in osd101t2587_panel_probe() 156 dsi->mode_flags = MIPI_DSI_MODE_VIDEO | in osd101t2587_panel_probe() 161 osd101t2587 = devm_drm_panel_alloc(&dsi->dev, __typeof(*osd101t2587), base, in osd101t2587_panel_probe() [all …]
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/linux/Documentation/devicetree/bindings/display/tegra/ |
H A D | nvidia,tegra20-dsi.yaml | 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dsi.yaml# 17 - nvidia,tegra20-dsi 18 - nvidia,tegra30-dsi 19 - nvidia,tegra114-dsi 20 - nvidia,tegra124-dsi 21 - nvidia,tegra210-dsi 22 - nvidia,tegra186-dsi 25 - const: nvidia,tegra132-dsi 26 - const: nvidia,tegra124-dsi 48 - const: dsi [all …]
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/linux/Documentation/devicetree/bindings/display/bridge/ |
H A D | renesas,dsi.yaml | 4 $id: http://devicetree.org/schemas/display/bridge/renesas,dsi.yaml# 7 title: Renesas RZ/G2L MIPI DSI Encoder 13 This binding describes the MIPI DSI encoder embedded in the Renesas 14 RZ/G2L alike family of SoC's. The encoder can operate in DSI mode, with 18 - $ref: /schemas/display/dsi-controller.yaml# 24 - renesas,r9a07g044-mipi-dsi # RZ/G2{L,LC} 25 - renesas,r9a07g054-mipi-dsi # RZ/V2L 26 - const: renesas,rzg2l-mipi-dsi 36 - description: DSI Packet Receive interrupt 37 - description: DSI Fatal Error interrupt [all …]
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/linux/Documentation/devicetree/bindings/display/rockchip/ |
H A D | rockchip,dw-mipi-dsi.yaml | 4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-mipi-dsi.yaml# 7 title: Rockchip specific extensions to the Synopsys Designware MIPI DSI 17 - rockchip,px30-mipi-dsi 18 - rockchip,rk3128-mipi-dsi 19 - rockchip,rk3288-mipi-dsi 20 - rockchip,rk3399-mipi-dsi 21 - rockchip,rk3568-mipi-dsi 22 - rockchip,rv1126-mipi-dsi 23 - const: snps,dw-mipi-dsi 68 - $ref: /schemas/display/bridge/snps,dw-mipi-dsi.yaml# [all …]
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/linux/drivers/gpu/drm/exynos/ |
H A D | exynos_drm_dsi.c | 27 struct exynos_dsi *dsi = dsim->priv; in exynos_dsi_te_irq_handler() local 28 struct drm_encoder *encoder = &dsi->encoder; in exynos_dsi_te_irq_handler() 39 struct exynos_dsi *dsi = dsim->priv; in exynos_dsi_host_attach() local 40 struct drm_encoder *encoder = &dsi->encoder; in exynos_dsi_host_attach() 67 struct exynos_dsi *dsi = dsim->priv; in exynos_dsi_host_detach() local 68 struct drm_device *drm = dsi->encoder.dev; in exynos_dsi_host_detach() 77 struct exynos_dsi *dsi = dsim->priv; in exynos_dsi_bind() local 78 struct drm_encoder *encoder = &dsi->encoder; in exynos_dsi_bind() 107 struct exynos_dsi *dsi; in exynos_dsi_register_host() local 109 dsi = devm_kzalloc(dsim->dev, sizeof(*dsi), GFP_KERNEL); in exynos_dsi_register_host() [all …]
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/linux/Documentation/devicetree/bindings/display/msm/ |
H A D | dsi-phy-14nm.yaml | 4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-14nm.yaml# 7 title: Qualcomm Display DSI 14nm PHY 13 - $ref: dsi-phy-common.yaml# 18 - qcom,dsi-phy-14nm 19 - qcom,dsi-phy-14nm-2290 20 - qcom,dsi-phy-14nm-660 21 - qcom,dsi-phy-14nm-8953 22 - qcom,sm6125-dsi-phy-14nm 23 - qcom,sm6150-dsi-phy-14nm 27 - description: dsi phy register set [all …]
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/linux/drivers/video/fbdev/omap2/omapfb/displays/ |
H A D | panel-dsi-cm.c | 3 * Generic DSI Command Mode panel driver 28 /* DSI Virtual channel. Hardcoded for now. */ 112 r = in->ops.dsi->dcs_read(in, ddata->channel, dcs_cmd, buf, 1); in dsicm_dcs_read_1() 125 return in->ops.dsi->dcs_write(in, ddata->channel, &dcs_cmd, 1); in dsicm_dcs_write_0() 133 return in->ops.dsi->dcs_write(in, ddata->channel, buf, 2); in dsicm_dcs_write_1() 146 r = in->ops.dsi->dcs_write_nosync(in, ddata->channel, &cmd, 1); in dsicm_sleep_in() 208 r = in->ops.dsi->dcs_write_nosync(in, ddata->channel, buf, sizeof(buf)); in dsicm_set_update_window() 218 r = in->ops.dsi->dcs_write_nosync(in, ddata->channel, buf, sizeof(buf)); in dsicm_set_update_window() 222 in->ops.dsi->bta_sync(in, ddata->channel); in dsicm_set_update_window() 256 in->ops.dsi->disable(in, false, true); in dsicm_enter_ulps() [all …]
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/linux/drivers/gpu/drm/bridge/cadence/ |
H A D | cdns-dsi-j721e.c | 3 * TI j721e Cadence DSI wrapper 12 #include "cdns-dsi-j721e.h" 23 static int cdns_dsi_j721e_init(struct cdns_dsi *dsi) in cdns_dsi_j721e_init() argument 25 struct platform_device *pdev = to_platform_device(dsi->base.dev); in cdns_dsi_j721e_init() 27 dsi->j721e_regs = devm_platform_ioremap_resource(pdev, 1); in cdns_dsi_j721e_init() 28 return PTR_ERR_OR_ZERO(dsi->j721e_regs); in cdns_dsi_j721e_init() 31 static void cdns_dsi_j721e_enable(struct cdns_dsi *dsi) in cdns_dsi_j721e_enable() argument 35 * to DSI DPI0. This is the only supported configuration on in cdns_dsi_j721e_enable() 38 writel(DSI_WRAP_DPI_0_EN, dsi->j721e_regs + DSI_WRAP_DPI_CONTROL); in cdns_dsi_j721e_enable() 41 static void cdns_dsi_j721e_disable(struct cdns_dsi *dsi) in cdns_dsi_j721e_disable() argument [all …]
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