Searched +full:dsi +full:- +full:phy +full:- +full:10 +full:nm +full:- +full:8998 (Results 1 – 4 of 4) sorted by relevance
| /freebsd/sys/contrib/device-tree/Bindings/display/msm/ |
| H A D | qcom,msm8998-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,msm8998-mds
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| H A D | dsi-phy-10nm.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-10nm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DSI 10nm PHY
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
13 - $ref: dsi-phy-common.yaml#
18 - qcom,dsi-phy-10nm
19 - qcom,dsi-phy-10nm-8998
23 - description: dsi phy register set
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| H A D | dsi.txt | 1 Qualcomm Technologies Inc. adreno/snapdragon DSI output
3 DSI Controller:
5 - compatible:
6 * "qcom,mdss-dsi-ctrl"
7 - reg: Physical base address and length of the registers of controller
8 - reg-names: The names of register regions. The following regions are required:
10 - interrupts: The interrupt signal from the DSI block.
11 - power-domains: Should be <&mmcc MDSS_GDSC>.
12 - clocks: Phandles to device clocks.
13 - clock-names: the following clocks are required:
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| /freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
| H A D | msm8998.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
7 #include <dt-bindings/clock/qcom,gpucc-msm8998.h>
8 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/firmware/qcom,scm.h>
11 #include <dt-bindings/power/qcom-rpmpd.h>
12 #include <dt-bindings/gpio/gpio.h>
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