1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra234-pinmux-aon.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: NVIDIA Tegra234 AON Pinmux Controller 8 9maintainers: 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 12 13$ref: nvidia,tegra234-pinmux-common.yaml 14 15properties: 16 compatible: 17 const: nvidia,tegra234-pinmux-aon 18 19patternProperties: 20 "^pinmux(-[a-z0-9-]+)?$": 21 type: object 22 23 # pin groups 24 additionalProperties: 25 properties: 26 nvidia,pins: 27 items: 28 enum: [ can0_dout_paa0, can0_din_paa1, can1_dout_paa2, 29 can1_din_paa3, can0_stb_paa4, can0_en_paa5, 30 soc_gpio49_paa6, can0_err_paa7, can1_stb_pbb0, 31 can1_en_pbb1, soc_gpio50_pbb2, can1_err_pbb3, 32 spi2_sck_pcc0, spi2_miso_pcc1, spi2_mosi_pcc2, 33 spi2_cs0_pcc3, touch_clk_pcc4, uart3_tx_pcc5, 34 uart3_rx_pcc6, gen2_i2c_scl_pcc7, gen2_i2c_sda_pdd0, 35 gen8_i2c_scl_pdd1, gen8_i2c_sda_pdd2, 36 sce_error_pee0, vcomp_alert_pee1, 37 ao_retention_n_pee2, batt_oc_pee3, power_on_pee4, 38 soc_gpio26_pee5, soc_gpio27_pee6, bootv_ctl_n_pee7, 39 hdmi_cec_pgg0, 40 # drive groups 41 drive_touch_clk_pcc4, drive_uart3_rx_pcc6, 42 drive_uart3_tx_pcc5, drive_gen8_i2c_sda_pdd2, 43 drive_gen8_i2c_scl_pdd1, drive_spi2_mosi_pcc2, 44 drive_gen2_i2c_scl_pcc7, drive_spi2_cs0_pcc3, 45 drive_gen2_i2c_sda_pdd0, drive_spi2_sck_pcc0, 46 drive_spi2_miso_pcc1, drive_can1_dout_paa2, 47 drive_can1_din_paa3, drive_can0_dout_paa0, 48 drive_can0_din_paa1, drive_can0_stb_paa4, 49 drive_can0_en_paa5, drive_soc_gpio49_paa6, 50 drive_can0_err_paa7, drive_can1_stb_pbb0, 51 drive_can1_en_pbb1, drive_soc_gpio50_pbb2, 52 drive_can1_err_pbb3, drive_sce_error_pee0, 53 drive_batt_oc_pee3, drive_bootv_ctl_n_pee7, 54 drive_power_on_pee4, drive_soc_gpio26_pee5, 55 drive_soc_gpio27_pee6, drive_ao_retention_n_pee2, 56 drive_vcomp_alert_pee1, drive_hdmi_cec_pgg0 ] 57 58unevaluatedProperties: false 59 60examples: 61 - | 62 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 63 64 pinmux@c300000 { 65 compatible = "nvidia,tegra234-pinmux-aon"; 66 reg = <0xc300000 0x4000>; 67 68 pinctrl-names = "cec"; 69 pinctrl-0 = <&cec_state>; 70 71 cec_state: pinmux-cec { 72 cec { 73 nvidia,pins = "hdmi_cec_pgg0"; 74 nvidia,function = "gp"; 75 }; 76 }; 77 }; 78... 79