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/linux/Documentation/devicetree/bindings/sound/
H A Dmt8195-mt6359.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/mt8195-mt6359.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Trevor Wu <trevor.wu@mediatek.com>
16 - $ref: sound-card-common.yaml#
21 - mediatek,mt8195_mt6359_rt1019_rt5682
22 - mediatek,mt8195_mt6359_rt1011_rt5682
23 - mediatek,mt8195_mt6359_max98390_rt5682
29 audio-routing:
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/linux/sound/soc/mediatek/mt8188/
H A Dmt8188-mt6359.c1 // SPDX-License-Identifier: GPL-2.0
3 * mt8188-mt6359.c -- MT8188-MT6359 ALSA SoC machine driver
17 #include "mt8188-afe-common.h"
21 #include "../common/mtk-afe-platform-driver.h"
22 #include "../common/mtk-soundcard-driver.h"
23 #include "../common/mtk-dsp-sof-common.h"
24 #include "../common/mtk-soc-card.h"
42 #define MAX98390_CODEC_DAI "max98390-aif1"
43 #define MAX98390_DEV0_NAME "max98390.0-0038" /* rear right */
44 #define MAX98390_DEV1_NAME "max98390.0-0039" /* rear left */
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/linux/drivers/gpu/drm/rockchip/
H A Dcdn-dp-core.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Chris Zhong <zyw@rock-chips.com>
16 #include <sound/hdmi-codec.h>
25 #include "cdn-dp-core.h"
26 #include "cdn-dp-reg.h"
49 #define CDN_DP_FIRMWARE "rockchip/dptx.bin"
61 { .compatible = "rockchip,rk3399-cdn-dp",
73 ret = clk_prepare_enable(dp->grf_clk); in cdn_dp_grf_write()
75 DRM_DEV_ERROR(dp->dev, "Failed to prepare_enable grf clock\n"); in cdn_dp_grf_write()
79 ret = regmap_write(dp->grf, reg, val); in cdn_dp_grf_write()
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/linux/drivers/gpu/drm/mediatek/
H A Dmtk_dp.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2019-2022 MediaTek Inc.
18 #include <linux/arm-smccc.h>
23 #include <linux/media-bus-format.h>
24 #include <linux/nvmem-consumer.h>
33 #include <sound/hdmi-codec.h>
402 .name = "mtk-dp-registers",
415 ret = regmap_read(mtk_dp->regs, offset, &read_val); in mtk_dp_read()
417 dev_err(mtk_dp->dev, "Failed to read register 0x%x: %d\n", in mtk_dp_read()
427 int ret = regmap_write(mtk_dp->regs, offset, val); in mtk_dp_write()
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/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-base.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3399-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3399-power.h>
12 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
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