Searched full:dpclk (Results 1 – 3 of 3) sorted by relevance
51 dpclk: clock-display@f1f0000 {
236 data->hw.init = CLK_HW_INIT_PARENTS_DATA("dpclk", in plldig_clk_probe()
440 GATE_CLK(SCU0_CLK_GATE_DP, CLK_GATE_ASPEED, "dpclk-gate", -1,