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Searched full:dp_phy (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/phy/mediatek/
H A Dphy-mtk-dp.c87 struct mtk_dp_phy *dp_phy = phy_get_drvdata(phy); in mtk_dp_phy_init() local
97 regmap_bulk_write(dp_phy->regs, MTK_DP_LANE0_DRIVING_PARAM_3, in mtk_dp_phy_init()
99 regmap_bulk_write(dp_phy->regs, MTK_DP_LANE1_DRIVING_PARAM_3, in mtk_dp_phy_init()
101 regmap_bulk_write(dp_phy->regs, MTK_DP_LANE2_DRIVING_PARAM_3, in mtk_dp_phy_init()
103 regmap_bulk_write(dp_phy->regs, MTK_DP_LANE3_DRIVING_PARAM_3, in mtk_dp_phy_init()
111 struct mtk_dp_phy *dp_phy = phy_get_drvdata(phy); in mtk_dp_phy_configure() local
134 regmap_write(dp_phy->regs, MTK_DP_PHY_DIG_BIT_RATE, val); in mtk_dp_phy_configure()
137 regmap_update_bits(dp_phy->regs, MTK_DP_PHY_DIG_PLL_CTL_1, in mtk_dp_phy_configure()
145 struct mtk_dp_phy *dp_phy = phy_get_drvdata(phy); in mtk_dp_phy_reset() local
147 regmap_update_bits(dp_phy->regs, MTK_DP_PHY_DIG_SW_RST, in mtk_dp_phy_reset()
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/linux/drivers/gpu/drm/msm/dp/
H A Ddp_ctrl.c1311 enum drm_dp_phy dp_phy) in msm_dp_ctrl_update_phy_vx_px() argument
1354 if (dp_phy == DP_PHY_DPRX) in msm_dp_ctrl_update_phy_vx_px()
1357 reg = DP_TRAINING_LANE0_SET_PHY_REPEATER(dp_phy); in msm_dp_ctrl_update_phy_vx_px()
1367 u8 pattern, enum drm_dp_phy dp_phy) in msm_dp_ctrl_train_pattern_set() argument
1380 if (dp_phy == DP_PHY_DPRX) in msm_dp_ctrl_train_pattern_set()
1383 reg = DP_TRAINING_PATTERN_SET_PHY_REPEATER(dp_phy); in msm_dp_ctrl_train_pattern_set()
1414 int *training_step, enum drm_dp_phy dp_phy) in msm_dp_ctrl_link_train_1() argument
1422 ctrl->panel->dpcd, dp_phy, false); in msm_dp_ctrl_link_train_1()
1432 DP_LINK_SCRAMBLING_DISABLE, dp_phy); in msm_dp_ctrl_link_train_1()
1435 ret = msm_dp_ctrl_update_phy_vx_px(ctrl, dp_phy); in msm_dp_ctrl_link_train_1()
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/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,dispcc-sm8x50.yaml108 <&dp_phy 0>,
109 <&dp_phy 1>;
/linux/Documentation/devicetree/bindings/display/msm/
H A Ddp-controller.yaml342 assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>;
344 phys = <&dp_phy>;
H A Dqcom,sc7180-mdss.yaml272 assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>;
273 phys = <&dp_phy>;
/linux/include/drm/display/
H A Ddrm_dp_helper.h49 enum drm_dp_phy dp_phy, bool uhbr);
51 enum drm_dp_phy dp_phy, bool uhbr);
73 const char *drm_dp_phy_name(enum drm_dp_phy dp_phy);
696 enum drm_dp_phy dp_phy,
760 enum drm_dp_phy dp_phy,
800 int drm_dp_dump_lttpr_desc(struct drm_dp_aux *aux, enum drm_dp_phy dp_phy);
/linux/Documentation/devicetree/bindings/display/bridge/
H A Dcdns,mhdp8546.yaml140 phys = <&dp_phy>;
/linux/Documentation/devicetree/bindings/display/samsung/
H A Dsamsung,exynos5-dp.yaml144 phys = <&dp_phy>;
/linux/drivers/phy/qualcomm/
H A Dphy-qcom-qmp-combo.c1876 struct phy *dp_phy; member
3935 * Note that only tx/tx2 and pcs (dp_phy) are used by the DP in qmp_combo_parse_dt_legacy_dp()
4097 return qmp->dp_phy; in qmp_combo_phy_xlate()
4296 qmp->dp_phy = devm_phy_create(dev, dp_np, &qmp_combo_dp_phy_ops); in qmp_combo_probe()
4297 if (IS_ERR(qmp->dp_phy)) { in qmp_combo_probe()
4298 ret = PTR_ERR(qmp->dp_phy); in qmp_combo_probe()
4303 phy_set_drvdata(qmp->dp_phy, qmp); in qmp_combo_probe()
/linux/arch/arm/boot/dts/samsung/
H A Dexynos5420.dtsi933 dp_phy: dp-phy { label
1213 phys = <&dp_phy>;