| /linux/drivers/phy/mediatek/ |
| H A D | phy-mtk-dp.c | 87 struct mtk_dp_phy *dp_phy = phy_get_drvdata(phy); in mtk_dp_phy_init() local
97 regmap_bulk_write(dp_phy->regs, MTK_DP_LANE0_DRIVING_PARAM_3, in mtk_dp_phy_init()
99 regmap_bulk_write(dp_phy->regs, MTK_DP_LANE1_DRIVING_PARAM_3, in mtk_dp_phy_init()
101 regmap_bulk_write(dp_phy->regs, MTK_DP_LANE2_DRIVING_PARAM_3, in mtk_dp_phy_init()
103 regmap_bulk_write(dp_phy->regs, MTK_DP_LANE3_DRIVING_PARAM_3, in mtk_dp_phy_init()
111 struct mtk_dp_phy *dp_phy = phy_get_drvdata(phy); in mtk_dp_phy_configure() local
134 regmap_write(dp_phy->regs, MTK_DP_PHY_DIG_BIT_RATE, val); in mtk_dp_phy_configure()
137 regmap_update_bits(dp_phy->regs, MTK_DP_PHY_DIG_PLL_CTL_1, in mtk_dp_phy_configure()
145 struct mtk_dp_phy *dp_phy = phy_get_drvdata(phy); in mtk_dp_phy_reset() local
147 regmap_update_bits(dp_phy->regs, MTK_DP_PHY_DIG_SW_RST, in mtk_dp_phy_reset()
[all …]
|
| /linux/include/drm/display/ |
| H A D | drm_dp.h | 1542 #define DP_LTTPR_BASE(dp_phy) \
1544 ((dp_phy) - DP_PHY_LTTPR1))
1546 #define DP_LTTPR_REG(dp_phy, lttpr1_reg) \
1547 (DP_LTTPR_BASE(dp_phy) - DP_LTTPR_BASE(DP_PHY_LTTPR1) + (lttpr1_reg))
1550 #define DP_TRAINING_PATTERN_SET_PHY_REPEATER(dp_phy) \
1551 DP_LTTPR_REG(dp_phy, DP_TRAINING_PATTERN_SET_PHY_REPEATER1)
1554 #define DP_TRAINING_LANE0_SET_PHY_REPEATER(dp_phy) \
1555 DP_LTTPR_REG(dp_phy, DP_TRAINING_LANE0_SET_PHY_REPEATER1)
1561 #define DP_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER(dp_phy) \
1562 DP_LTTPR_REG(dp_phy, DP_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER
1537 DP_LTTPR_BASE(dp_phy) global() argument
1541 DP_LTTPR_REG(dp_phy,lttpr1_reg) global() argument
1545 DP_TRAINING_PATTERN_SET_PHY_REPEATER(dp_phy) global() argument
1549 DP_TRAINING_LANE0_SET_PHY_REPEATER(dp_phy) global() argument
1556 DP_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER(dp_phy) global() argument
1564 DP_128B132B_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER(dp_phy) global() argument
1569 DP_LANE0_1_STATUS_PHY_REPEATER(dp_phy) global() argument
1583 DP_OUI_PHY_REPEATER(dp_phy) global() argument
1588 DP_FEC_BASE(dp_phy) global() argument
1592 DP_FEC_REG(dp_phy,fec1_reg) global() argument
1596 DP_FEC_STATUS_PHY_REPEATER(dp_phy) global() argument
[all...] |
| H A D | drm_dp_helper.h | 49 enum drm_dp_phy dp_phy, bool uhbr);
51 enum drm_dp_phy dp_phy, bool uhbr);
73 const char *drm_dp_phy_name(enum drm_dp_phy dp_phy);
700 enum drm_dp_phy dp_phy,
764 enum drm_dp_phy dp_phy,
804 int drm_dp_dump_lttpr_desc(struct drm_dp_aux *aux, enum drm_dp_phy dp_phy);
|
| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | qcom,dispcc-sm8x50.yaml | 108 <&dp_phy 0>,
109 <&dp_phy 1>;
|
| /linux/Documentation/devicetree/bindings/display/msm/ |
| H A D | qcom,sc7180-mdss.yaml | 272 assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>;
273 phys = <&dp_phy>;
|
| H A D | dp-controller.yaml | 380 assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>;
382 phys = <&dp_phy>;
|
| /linux/Documentation/devicetree/bindings/display/bridge/ |
| H A D | cdns,mhdp8546.yaml | 140 phys = <&dp_phy>;
|
| /linux/Documentation/devicetree/bindings/display/samsung/ |
| H A D | samsung,exynos5-dp.yaml | 144 phys = <&dp_phy>;
|
| /linux/drivers/phy/qualcomm/ |
| H A D | phy-qcom-qmp-usbc.c | 468 struct phy *dp_phy; member
516 "phy_phy", "dp_phy",
1909 return qmp->dp_phy ?: ERR_PTR(-ENODEV); in qmp_usbc_phy_xlate()
1986 qmp->dp_phy = devm_phy_create(dev, np, &qmp_usbc_dp_phy_ops); in qmp_usbc_probe()
1987 if (IS_ERR(qmp->dp_phy)) { in qmp_usbc_probe()
1988 ret = PTR_ERR(qmp->dp_phy); in qmp_usbc_probe()
1992 phy_set_drvdata(qmp->dp_phy, qmp); in qmp_usbc_probe()
|
| /linux/arch/arm/boot/dts/samsung/ |
| H A D | exynos5420.dtsi | 933 dp_phy: dp-phy { label
1213 phys = <&dp_phy>;
|