Searched full:doubler (Results 1 – 8 of 8) sorted by relevance
210 u8 doubler, divide_by_2; in admv4420_calc_pfd_ref() local212 doubler = st->ref_block.doubler_en ? 2 : 1; in admv4420_calc_pfd_ref()214 tmp = ADMV4420_REF_FREQ_HZ * doubler; in admv4420_calc_pfd_ref()
525 pdata->ref_doubler_en = device_property_read_bool(dev, "adi,reference-doubler-enable"); in adf4350_parse_dt()
57 adi,reference-doubler-enable:59 description: Enables reference doubler.
235 /* Enable voltage doubler */
49 #define FE_DBLR (1<<4) /* Clock doubler present */269 #define DBLEN 0x08 /* clock doubler running */270 #define DBLSEL 0x04 /* clock doubler selected */
279 * do not have a clock doubler and so are provided with a 280 * 80 MHz clock. All other fast20 boards incorporate a doubler 399 OUTB(np, nc_stest1, 0); /* make sure doubler is OFF */ in sym_getclock()5615 * STEST1 that is used to probe for the clock doubler.
140 /* chip has PFD requency doubler */1056 /* Register frequency doubler */ in vc5_probe()
74 #define REG_SYNT_CAL 0x371 /* RW Oscillator and Doubler Configuration */