double\-soc (full) in projects: freebsd

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Searched +full:double +full:- +full:soc (Results 1 – 25 of 56) sorted by relevance

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/freebsd/sys/contrib/device-tree/Bindings/power/supply/
H A D	max17040_battery.txt	5 - compatible : "maxim,max17040", "maxim,max17041", "maxim,max17043", 7 "maxim,max17058", "maxim,max17059" or "maxim,max77836-battery" 8 - reg: i2c slave address 11 - maxim,alert-low-soc-level : The alert threshold that sets the state of 16 - maxim,double-soc : Certain devices return double the capacity. 19 SOC == State of Charge == Capacity. 20 - maxim,rcomp : A value to compensate readings for various 25 - interrupts : Interrupt line see Documentation/devicetree/ 26 bindings/interrupt-controller/interrupts.txt 27 - wakeup-source : This device has wakeup capabilities. Use this [all …]
H A D	maxim,max17040.yaml	`1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sebastian Reichel <sre@kernel.org> 13 - $ref: power-suppl [all...]`
/freebsd/lib/libpmc/pmu-events/arch/x86/icelakex/
H A D	icx-metrics.json	3 …Total pipeline cost of branch related instructions (used for program control-flow including functi… 4 … 3 * BR_INST_RETIRED.NEAR_CALL + (BR_INST_RETIRED.NEAR_TAKEN - BR_INST_RETIRED.COND_TAKEN - 2 * BR… 9 …of instruction fetch related bottlenecks by large code footprint programs (i-side cache; TLB and B… 10 …- INT_MISC.UOP_DROPPING ) / TOPDOWN.SLOTS) * ( (ICACHE_64B.IFTAG_STALL / CPU_CLK_UNHALTED.THREAD) … 39 … "BriefDescription": "Per-Logical Processor actual clocks when the Logical Processor is active.", 45 …"BriefDescription": "Total issue-pipeline slots (per-Physical Core till ICL; per-Logical Processor… 51 … "BriefDescription": "Fraction of Physical Core issue-slots utilized by this Logical Processor", 57 "BriefDescription": "The ratio of Executed- by Issued-Uops", 61 …"PublicDescription": "The ratio of Executed- by Issued-Uops. Ratio > 1 suggests high rate of uop m… 64 "BriefDescription": "Instructions Per Cycle across hyper-threads (per physical core)", [all …]
/freebsd/sys/contrib/device-tree/Bindings/edac/
H A D	aspeed-sdram-edac.txt	`1 Aspeed BMC SoC EDAC node 3 The Aspeed BMC SoC supports DDR3 and DDR4 memory with and without ECC (error 6 The memory controller supports SECDED (single bit error correction, double bit 14 - compatible: should be one of 15 - "aspeed,ast2400-sdram-edac" 16 - "aspeed,ast2500-sdram-edac" 17 - "aspeed,ast2600-sdram-edac" 18 - reg: sdram controller register set should be <0x1e6e0000 0x174> 19 - interrupts: should be AVIC interrupt #0 25 compatible = "aspeed,ast2500-sdram-edac";`
H A D	socfpga-eccmgr.txt	4 double bit errors which are uncorrectable. 8 - compatible : Should be "altr,socfpga-ecc-manager" 9 - #address-cells: must be 1 10 - #size-cells: must be 1 11 - ranges : standard definition, should translate from local addresses 17 - compatible : Should be "altr,socfpga-l2-ecc" 18 - reg : Address and size for ECC error interrupt clear registers. 19 - interrupts : Should be single bit error interrupt, then double bit error 24 - compatible : Should be "altr,socfpga-ocram-ecc" 25 - reg : Address and size for ECC error interrupt clear registers. [all …]
/freebsd/sys/contrib/device-tree/Bindings/usb/
H A D	nvidia,tegra20-ehci.txt	1 Tegra SOC USB controllers 4 SOC is as described in the document "Open Firmware Recommended 9 - compatible : For Tegra20, must contain "nvidia,tegra20-ehci". 10 For Tegra30, must contain "nvidia,tegra30-ehci". Otherwise, must contain 11 "nvidia,<chip>-ehci" plus at least one of the above, where <chip> is 13 - nvidia,phy : phandle of the PHY that the controller is connected to. 14 - clocks : Must contain one entry, for the module clock. 15 See ../clocks/clock-bindings.txt for details. 16 - resets : Must contain an entry for each entry in reset-names. 18 - reset-names : Must include the following entries: [all …]
/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A D	exynos-dw-mshc.txt	5 a SoC with storage medium such as eMMC or SD/MMC cards. This file documents 7 by synopsys-dw-mshc.txt and the properties used by the Samsung Exynos specific 13 - "samsung,exynos4210-dw-mshc": for controllers with Samsung Exynos4210 15 - "samsung,exynos4412-dw-mshc": for controllers with Samsung Exynos4412 17 - "samsung,exynos5250-dw-mshc": for controllers with Samsung Exynos5250 19 - "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420 21 - "samsung,exynos7-dw-mshc": for controllers with Samsung Exynos7 23 - "samsung,exynos7-dw-mshc-smu": for controllers with Samsung Exynos7 25 - "axis,artpec8-dw-mshc": for controllers with ARTPEC-8 specific 28 * samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface [all …]
H A D	samsung,exynos-dw-mshc.yaml	`1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mmc/samsung,exynos-d [all...]`
/freebsd/sys/contrib/device-tree/Bindings/spi/
H A D	brcm,spi-bcm-qspi.yaml	`1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/spi/brcm,spi-bc [all...]`
H A D	brcm,spi-bcm-qspi.txt	8 for flash reads and be configured to do single, double, quad lane 9 io with 3-byte and 4-byte addressing support. 18 - #address-cells: 21 - #size-cells: 24 - compatible: 26 "brcm,spi-brcmstb-qspi", "brcm,spi-bcm-qspi" : MSPI+BSPI on BRCMSTB SoCs 27 "brcm,spi-brcmstb-mspi", "brcm,spi-bcm-qspi" : Second Instance of MSPI 29 "brcm,spi-bcm7425-qspi", "brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI 31 "brcm,spi-bcm7429-qspi", "brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI 33 "brcm,spi-bcm7435-qspi", "brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/broadwellde/
H A D	bdwde-metrics.json	7 …-lines are fetched from the memory subsystem; parsed into instructions; and lastly decoded into mi… 14 …-lines are fetched from the memory subsystem; parsed into instructions; and lastly decoded into mi… 18 …"MetricExpr": "( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4… 21 …s for which the issue-pipeline was blocked due to recovery from earlier incorrect speculation. For… 25 …"MetricExpr": "( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * ( INT_MISC.RECOVERY_CYCLES_ANY … 28 …s for which the issue-pipeline was blocked due to recovery from earlier incorrect speculation. For… 33 …"MetricExpr": "1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * CPU_CLK_UNHALTED.THREAD)) + (( UOPS_ISSUE… 36 …-of-order scheduler dispatches ready uops into their respective execution units; and once complete… 40 …- ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED… 43 …-of-order scheduler dispatches ready uops into their respective execution units; and once complete… [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/broadwellx/
H A D	bdx-metrics.json	7 …-lines are fetched from the memory subsystem; parsed into instructions; and lastly decoded into mi… 14 …-lines are fetched from the memory subsystem; parsed into instructions; and lastly decoded into mi… 18 …"MetricExpr": "( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4… 21 …s for which the issue-pipeline was blocked due to recovery from earlier incorrect speculation. For… 25 …"MetricExpr": "( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * ( INT_MISC.RECOVERY_CYCLES_ANY … 28 …s for which the issue-pipeline was blocked due to recovery from earlier incorrect speculation. For… 33 …"MetricExpr": "1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * CPU_CLK_UNHALTED.THREAD)) + (( UOPS_ISSUE… 36 …-of-order scheduler dispatches ready uops into their respective execution units; and once complete… 40 …- ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED… 43 …-of-order scheduler dispatches ready uops into their respective execution units; and once complete… [all …]
/freebsd/sys/contrib/device-tree/Bindings/soc/fsl/cpm_qe/
H A D	fsl,cpm1-tsa.yaml	`1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: PowerQUICC CPM Time-slot assigner (TSA) controller 10 - Herve Codina <herve.codina@bootlin.com> 13 The TSA is the time-slot assigner that can be found on some PowerQUICC SoC. 14 Its purpose is to route some TDM time-slots to other internal serial 20 - enum: 21 - fsl,mpc885-tsa [all …]`
H A D	fsl,qe-tsa.yaml	`1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,qe-tsa.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: PowerQUICC QE Time-slot assigner (TSA) controller 10 - Herve Codina <herve.codina@bootlin.com> 13 The TSA is the time-slot assigner that can be found on some PowerQUICC SoC. 14 Its purpose is to route some TDM time-slots to other internal serial 20 - enum: 21 - fsl,mpc8321-tsa [all …]`
/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A D	armada-39x.dtsi	`1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 16 #address-cells = <1>; 17 #size-cells = <1>; 18 model = "Marvell Armada 39x family SoC"; 31 #address-cells = <1>; 32 #size-cells = <0>; 33 enable-method = "marvell,armada-390-smp"; [all …]`
H A D	armada-38x.dtsi	`1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 * Gregory CLEMENT <gregory.clement@free-electrons.com> 9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 18 #address-cells = <1>; 19 #size-cells = <1>; 21 model = "Marvell Armada 38x family SoC"; 32 compatible = "arm,cortex-a9-pmu"; 33 interrupts-extended = <&mpic 3>; [all …]`
H A D	armada-375.dtsi	`1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for Marvell Armada 375 family SoC 7 * Gregory CLEMENT <gregory.clement@free-electrons.com> 8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/phy/phy.h> 18 #address-cells = <1>; 19 #size-cells = <1>; 21 model = "Marvell Armada 375 family SoC"; [all …]`
/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/
H A D	nuvoton,npcm-memory-controller.yaml	1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/nuvoton,npcm-memory-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Marvin Lin <kflin@nuvoton.com> 11 - Stanley Chu <yschu@nuvoton.com> 14 The Nuvoton BMC SoC supports DDR4 memory with or without ECC (error correction 17 The memory controller supports single bit error correction, double bit error 18 detection (in-line ECC in which a section (1/8th) of the memory device used to 26 - nuvoton,npcm750-memory-controller [all …]
H A D	nvidia,tegra186-mc.yaml	1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra186-mc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NVIDIA Tegra186 (and later) SoC Memory Controller 10 - Jon Hunter <jonathanh@nvidia.com> 11 - Thierry Reding <thierry.reding@gmail.com> 14 The NVIDIA Tegra186 SoC features a 128 bit memory controller that is split 16 handles memory requests for 40-bit virtual addresses from internal clients 22 automotive safety applications (single bit error correction and double bit [all …]
/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A D	exynos4x12.dtsi	`1 // SPDX-License-Identifier: GPL-2.0 3 * Samsung's Exynos4412 SoC device tree source 8 * Samsung's Exynos4x12 SoC series device nodes are listed in this file. 19 #include "exynos4-cpu-thermal.dtsi" 27 fimc-lite0 = &fimc_lite_0; 28 fimc-lite1 = &fimc_lite_1; 31 bus_acp: bus-ac 207 soc: soc { global() label [all...]`
/freebsd/lib/libpmc/pmu-events/arch/x86/broadwell/
H A D	bdw-metrics.json	7 …-lines are fetched from the memory subsystem; parsed into instructions; and lastly decoded into mi… 14 …-lines are fetched from the memory subsystem; parsed into instructions; and lastly decoded into mi… 18 …"MetricExpr": "( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4… 21 …s for which the issue-pipeline was blocked due to recovery from earlier incorrect speculation. For… 25 …"MetricExpr": "( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * ( INT_MISC.RECOVERY_CYCLES_ANY … 28 …s for which the issue-pipeline was blocked due to recovery from earlier incorrect speculation. For… 33 …"MetricExpr": "1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * CPU_CLK_UNHALTED.THREAD)) + (( UOPS_ISSUE… 36 …-of-order scheduler dispatches ready uops into their respective execution units; and once complete… 40 …- ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED… 43 …-of-order scheduler dispatches ready uops into their respective execution units; and once complete… [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/skylakex/
H A D	skx-metrics.json	7 …-lines are fetched from the memory subsystem; parsed into instructions; and lastly decoded into mi… 14 …-lines are fetched from the memory subsystem; parsed into instructions; and lastly decoded into mi… 18 …"MetricExpr": "( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4… 21 …s for which the issue-pipeline was blocked due to recovery from earlier incorrect speculation. For… 25 …"MetricExpr": "( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * ( INT_MISC.RECOVERY_CYCLES_ANY … 28 …s for which the issue-pipeline was blocked due to recovery from earlier incorrect speculation. For… 33 …"MetricExpr": "1 - (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * CPU_CLK_UNHALTED.THREAD)) - ( UOPS_ISSUED.A… 36 …-of-order scheduler dispatches ready uops into their respective execution units; and once complete… 40 … - (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.… 43 …-of-order scheduler dispatches ready uops into their respective execution units; and once complete… [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/alderlake/
H A D	adl-metrics.json	3 …Total pipeline cost of branch related instructions (used for program control-flow including functi… 4 … 3 * BR_INST_RETIRED.NEAR_CALL + (BR_INST_RETIRED.NEAR_TAKEN - BR_INST_RETIRED.COND_TAKEN - 2 * BR… 24 … "BriefDescription": "Per-Logical Processor actual clocks when the Logical Processor is active.", 31 …"BriefDescription": "Total issue-pipeline slots (per-Physical Core till ICL; per-Logical Processor… 38 … "BriefDescription": "Fraction of Physical Core issue-slots utilized by this Logical Processor", 45 "BriefDescription": "The ratio of Executed- by Issued-Uops", 49 …"PublicDescription": "The ratio of Executed- by Issued-Uops. Ratio > 1 suggests high rate of uop m… 53 "BriefDescription": "Instructions Per Cycle across hyper-threads (per physical core)", 67 …"BriefDescription": "Actual per-core usage of the Floating Point execution units (regardless of th… 71 …on": "Actual per-core usage of the Floating Point execution units (regardless of the vector width)… [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/cascadelakex/
H A D	clx-metrics.json	7 …-lines are fetched from the memory subsystem; parsed into instructions; and lastly decoded into mi… 14 …-lines are fetched from the memory subsystem; parsed into instructions; and lastly decoded into mi… 18 …"MetricExpr": "( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4… 21 …s for which the issue-pipeline was blocked due to recovery from earlier incorrect speculation. For… 25 …"MetricExpr": "( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * ( INT_MISC.RECOVERY_CYCLES_ANY … 28 …s for which the issue-pipeline was blocked due to recovery from earlier incorrect speculation. For… 33 …"MetricExpr": "1 - (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * CPU_CLK_UNHALTED.THREAD)) - ( UOPS_ISSUED.A… 36 …-of-order scheduler dispatches ready uops into their respective execution units; and once complete… 40 … - (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.… 43 …-of-order scheduler dispatches ready uops into their respective execution units; and once complete… [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/icelake/
H A D	icl-metrics.json	3 …Total pipeline cost of branch related instructions (used for program control-flow including functi… 4 … 3 * BR_INST_RETIRED.NEAR_CALL + (BR_INST_RETIRED.NEAR_TAKEN - BR_INST_RETIRED.COND_TAKEN - 2 * BR… 9 …of instruction fetch related bottlenecks by large code footprint programs (i-side cache; TLB and B… 10 …- INT_MISC.UOP_DROPPING ) / TOPDOWN.SLOTS) * ( (ICACHE_64B.IFTAG_STALL / CPU_CLK_UNHALTED.THREAD) … 27 … "BriefDescription": "Per-Logical Processor actual clocks when the Logical Processor is active.", 33 …"BriefDescription": "Total issue-pipeline slots (per-Physical Core till ICL; per-Logical Processor… 39 … "BriefDescription": "Fraction of Physical Core issue-slots utilized by this Logical Processor", 45 "BriefDescription": "The ratio of Executed- by Issued-Uops", 49 …"PublicDescription": "The ratio of Executed- by Issued-Uops. Ratio > 1 suggests high rate of uop m… 52 "BriefDescription": "Instructions Per Cycle across hyper-threads (per physical core)", [all …]

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