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/linux/Documentation/devicetree/bindings/power/
H A Dpower-domain.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/power-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rafael J. Wysocki <rjw@rjwysocki.net>
11 - Kevin Hilman <khilman@kernel.org>
12 - Ulf Hansson <ulf.hansson@linaro.org>
20 This device tree binding can be used to bind PM domain consumer devices with
21 their PM domains provided by PM domain providers. A PM domain provider can be
24 phandle arguments (so called PM domain specifiers) of length specified by the
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H A Ddomain-idle-state.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/domain-idle-state.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PM Domain Idle States
10 - Ulf Hansson <ulf.hansson@linaro.org>
13 A domain idle state node represents the state parameters that will be used to
14 select the state when there are no active components in the PM domain.
18 const: domain-idle-states
21 "^(cpu|cluster|domain)-":
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/linux/Documentation/devicetree/bindings/arm/
H A Dpsci.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
15 processors") can be used by Linux to initiate various CPU-centric power
25 r0 => 32-bit Function ID / return value
26 {r1 - r3} => Parameters
40 - description:
44 - description:
52 - const: arm,psci-0.2
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/linux/arch/arm64/boot/dts/qcom/
H A Dsc7180-firmware-tfa.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
4 * Devices that use SC7180 with TrustedFirmware-A
10 /delete-property/ power-domains;
11 /delete-property/ power-domain-names;
13 cpu-idle-states = <&LITTLE_CPU_SLEEP_0
19 /delete-property/ power-domains;
20 /delete-property/ power-domain-names;
22 cpu-idle-states = <&LITTLE_CPU_SLEEP_0
28 /delete-property/ power-domains;
29 /delete-property/ power-domain-names;
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H A Dsm4450.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm4450-camcc.h>
8 #include <dt-bindings/clock/qcom,sm4450-dispcc.h>
9 #include <dt-bindings/clock/qcom,sm4450-gcc.h>
10 #include <dt-bindings/clock/qcom,sm4450-gpucc.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
16 interrupt-parent = <&intc>;
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H A Dsdm845-cheza.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
25 stdout-path = "serial0:115200n8";
29 compatible = "pwm-backlight";
31 enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
32 power-supply = <&ppvar_sys>;
33 pinctrl-names = "default";
34 pinctrl-0 = <&ap_edp_bklten>;
37 /* FIXED REGULATORS - parents above children */
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H A Dsm6375.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmcc.h>
7 #include <dt-bindings/clock/qcom,sm6375-gcc.h>
8 #include <dt-bindings/clock/qcom,sm6375-gpucc.h>
9 #include <dt-bindings/dma/qcom-gpi.h>
10 #include <dt-bindings/firmware/qcom,scm.h>
11 #include <dt-bindings/interconnect/qcom,osm-l3.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/mailbox/qcom-ipcc.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
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H A Dsdm670.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,rpmh.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interconnect/qcom,osm-l3.h>
15 #include <dt-bindings/interconnect/qcom,sdm670-rpmh.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 #include <dt-bindings/phy/phy-qcom-qusb2.h>
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H A Dsc7280-chrome-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
20 /delete-node/ &cdsp_mem;
21 /delete-node/ &domain_idle_states;
22 /delete-node/ &gpu_zap_mem;
23 /delete-node/ &gpu_zap_shader;
24 /delete-node/ &hyp_mem;
25 /delete-node/ &xbl_mem;
26 /delete-node/ &reserved_xbl_uefi_log;
27 /delete-node/ &sec_apps_mem;
31 domain_idle_states: domain-idle-states {
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H A Dsm6115.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
7 #include <dt-bindings/clock/qcom,sm6115-dispcc.h>
8 #include <dt-bindings/clock/qcom,sm6115-gpucc.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/dma/qcom-gpi.h>
11 #include <dt-bindings/firmware/qcom,scm.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interconnect/qcom,rpm-icc.h>
14 #include <dt-bindings/interconnect/qcom,sm6115.h>
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/linux/drivers/cpuidle/
H A Dcpuidle-riscv-sbi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * RISC-V SBI CPU idle driver.
9 #define pr_fmt(fmt) "cpuidle-riscv-sbi: " fmt
33 u32 *states; member
52 data->available = true; in sbi_set_domain_state()
53 data->state = state; in sbi_set_domain_state()
60 return data->state; in sbi_get_domain_state()
67 data->available = false; in sbi_clear_domain_state()
74 return data->available; in sbi_is_domain_state_available()
80 u32 *states = __this_cpu_read(sbi_cpuidle_data.states); in sbi_cpuidle_enter_state() local
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H A Ddt_idle_genpd.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #define pr_fmt(fmt) "dt-idle-genpd: " fmt
26 struct genpd_power_state *states, int state_count) in pd_parse_state_nodes() argument
32 ret = parse_state(to_of_node(states[i].fwnode), &state); in pd_parse_state_nodes()
38 ret = -ENOMEM; in pd_parse_state_nodes()
42 states[i].data = state_buf; in pd_parse_state_nodes()
48 i--; in pd_parse_state_nodes()
49 for (; i >= 0; i--) in pd_parse_state_nodes()
50 kfree(states[i].data); in pd_parse_state_nodes()
56 struct genpd_power_state **states, in pd_parse_states() argument
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H A Dcpuidle-psci.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * PSCI CPU idle driver.
29 #include "cpuidle-psci.h"
58 u32 *states = data->psci_states; in __psci_enter_domain_idle_state() local
59 struct device *pd_dev = data->dev; in __psci_enter_domain_idle_state()
65 return -1; in __psci_enter_domain_idle_state()
75 state = states[idx]; in __psci_enter_domain_idle_state()
77 ret = psci_cpu_suspend_enter(state) ? -1 : idx; in __psci_enter_domain_idle_state()
86 /* Clear the domain state to start fresh when back from idle. */ in __psci_enter_domain_idle_state()
120 /* Clear domain state to start fresh at next online. */ in psci_idle_cpuhp_down()
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H A DKconfig.arm1 # SPDX-License-Identifier: GPL-2.0-only
3 # ARM CPU Idle drivers
6 bool "Generic ARM CPU idle Driver"
12 It provides a generic idle driver whose idle states are configured
13 at run-time through DT nodes. The CPUidle suspend backend is
14 initialized by calling the CPU operations init idle hook
18 bool "PSCI CPU idle Driver"
24 It provides an idle driver that is capable of detecting and
25 managing idle states through the PSCI firmware interface.
28 - If the idle states are described with the non-hierarchical layout,
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H A Dcpuidle-psci-domain.c1 // SPDX-License-Identifier: GPL-2.0
3 * PM domains for CPUs via genpd - managed by cpuidle-psci.
22 #include "cpuidle-psci.h"
35 struct genpd_power_state *state = &pd->states[pd->state_idx]; in psci_pd_power_off()
38 if (!state->data) in psci_pd_power_off()
42 return -EBUSY; in psci_pd_power_off()
44 /* OSI mode is enabled, set the corresponding domain state. */ in psci_pd_power_off()
45 pd_state = state->data; in psci_pd_power_off()
56 int ret = -ENOMEM; in psci_pd_init()
66 pd->flags |= GENPD_FLAG_IRQ_SAFE | GENPD_FLAG_CPU_DOMAIN; in psci_pd_init()
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/linux/Documentation/trace/coresight/
H A Dcoresight-cpu-debug.rst9 ------------
11 Coresight CPU debug module is defined in ARMv8-a architecture reference manual
13 debug module and it is mainly used for two modes: self-hosted debug and
16 explore debugging method which rely on self-hosted debug mode, this document
19 The debug module provides sample-based profiling extension, which can be used
21 every CPU has one dedicated debug module to be connected. Based on self-hosted
29 --------------
31 - During driver registration, it uses EDDEVID and EDDEVID1 - two device ID
32 registers to decide if sample-based profiling is implemented or not. On some
36 - At the time this documentation was written, the debug driver mainly relies on
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/linux/Documentation/devicetree/bindings/cpufreq/
H A Dqcom-cpufreq-nvmem.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/cpufreq/qcom-cpufreq-nvmem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ilia Lin <ilia.lin@kernel.org>
16 CPR provides a power domain with multiple levels that are selected depending
17 on the CPU OPP in use. The CPUFreq driver sets the CPR power domain level
28 - qcom,apq8064
29 - qcom,apq8096
30 - qcom,ipq5332
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/linux/arch/arm/mach-omap2/
H A Dpm33xx-core.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
18 #include <linux/platform_data/gpio-omap.h>
33 #include "omap-secure.h"
52 return -ENOMEM; in am43xx_map_scu()
60 pr_warn("WARNING: This platform does not support off-mode, entering DeepSleep suspend.\n"); in am33xx_check_off_mode_enable()
69 * Check for am437x-gp-evm which has the right Hardware design to in am43xx_check_off_mode_enable()
72 if (of_machine_is_compatible("ti,am437x-gp-evm") && enable_off_mode) in am43xx_check_off_mode_enable()
75 pr_warn("WARNING: This platform does not support off-mode, entering DeepSleep suspend.\n"); in am43xx_check_off_mode_enable()
80 static int amx3_common_init(int (*idle)(u32 wfi_flags)) in amx3_common_init()
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/linux/drivers/of/
H A Dcpu.c1 // SPDX-License-Identifier: GPL-2.0
7 * of_get_cpu_hwid - Get the hardware ID from a CPU device node
29 * arch_match_cpu_phys_id - Match the given logical CPU and physical id
79 * arch_find_n_match_cpu_physical_id - See if the given device node is
81 * else false. If 'thread' is non-NULL, the local thread number within the
87 /* Check for non-standard "ibm,ppc-interrupt-server#s" property in arch_find_n_match_cpu_physical_id()
93 "ibm,ppc-interrupt-server#s", in arch_find_n_match_cpu_physical_id()
101 * of_get_cpu_node - Get device node associated with the given logical CPU
146 return of_node_get(cpu_dev->of_node); in of_cpu_device_node_get()
155 * Return: The logical CPU number of the given CPU device_node or -ENODEV if the
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/linux/drivers/pmdomain/
H A Dgovernor.c1 // SPDX-License-Identifier: GPL-2.0
3 * drivers/base/power/domain_governor.c - Governors for device PM domains.
20 if (dev->power.subsys_data && dev->power.subsys_data->domain_data) { in dev_update_qos_constraint()
21 struct gpd_timing_data *td = dev_gpd_data(dev)->td; in dev_update_qos_constraint()
24 * Only take suspend-time QoS constraints of devices into in dev_update_qos_constraint()
30 constraint_ns = td ? td->effective_constraint_ns : in dev_update_qos_constraint()
34 * The child is not in a domain and there's no info on its in dev_update_qos_constraint()
50 * default_suspend_ok - Default PM domain governor routine to suspend devices.
57 struct gpd_timing_data *td = dev_gpd_data(dev)->td; in default_suspend_ok()
63 spin_lock_irqsave(&dev->power.lock, flags); in default_suspend_ok()
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/linux/Documentation/trace/
H A Devents-power.rst8 - Power state switch which reports events related to suspend (S-states),
9 cpuidle (C-states) and cpufreq (P-states)
10 - System clock related changes
11 - Power domains related changes and transitions
22 -----------------
24 A 'cpu' event class gathers the CPU-related events: cpuidle and
39 Note: the value of '-1' or '4294967295' for state means an exit from the current state,
41 enters the idle state 4, while trace_cpu_idle(PWR_EVENT_EXIT, smp_processor_id())
42 means that the system exits the previous idle state.
46 correctly draw the states diagrams and to calculate accurate statistics etc.
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/linux/Documentation/devicetree/bindings/opp/
H A Dopp-v2-kryo-cpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2-kryo-cpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ilia Lin <ilia.lin@kernel.org>
13 - $ref: opp-v2-base.yaml#
22 The qcom-cpufreq-nvmem driver reads the efuse value from the SoC to provide
25 operating-points-v2 table when it is parsed by the OPP framework.
30 - operating-points-v2-krait-cpu
31 - operating-points-v2-kryo-cpu
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/linux/include/linux/
H A Dpm_domain.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * pm_domain.h - Definitions and headers related to device power domains.
25 * PD_FLAG_NO_DEV_LINK: As the default behaviour creates a device-link
26 * for every PM domain that gets attached, this
29 * PD_FLAG_DEV_LINK_ON: Add the DL_FLAG_RPM_ACTIVE to power-on the
30 * supplier and its PM domain when creating the
31 * device-links.
60 * ->power_on|off(), doesn't sleep. Hence, these
62 * enables genpd to power on/off the PM domain,
68 * GENPD_FLAG_ALWAYS_ON: Instructs genpd to always keep the PM domain
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/linux/Documentation/devicetree/bindings/mmc/
H A Dti-omap-hsmmc.txt10 --------------------
11 - compatible:
12 Should be "ti,omap2-hsmmc", for OMAP2 controllers
13 Should be "ti,omap3-hsmmc", for OMAP3 controllers
14 Should be "ti,omap3-pre-es3-hsmmc" for OMAP3 controllers pre ES3.0
15 Should be "ti,omap4-hsmmc", for OMAP4 controllers
16 Should be "ti,am33xx-hsmmc", for AM335x controllers
17 Should be "ti,k2g-hsmmc", "ti,omap4-hsmmc" for 66AK2G controllers.
20 ---------------------------------
22 - ti,hwmods: Must be "mmc<n>", n is controller instance starting 1.
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/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8188.dtsi1 // SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
8 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/mailbox/mediatek,mt8188-gce.h>
12 #include <dt-bindings/phy/phy.h>
13 #include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h>
14 #include <dt-bindings/power/mediatek,mt8188-power.h>
15 #include <dt-bindings/reset/mt8188-resets.h>
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