Searched +full:dmic +full:- +full:slew +full:- +full:rate (Results 1 – 5 of 5) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Seven Lee <wtli@nuvoton.com>13 - $ref: dai-common.yaml#25 nuvoton,jkdet-enable:29 nuvoton,jkdet-pull-enable:30 description: Enable JKDET pin pull. If set - pin pull enabled,34 nuvoton,jkdet-pull-up:35 description: Pull-up JKDET pin. If set then JKDET pin is pull up,[all …]
1 // SPDX-License-Identifier: BSD-3-Clause9 /* BOARD-SPECIFIC TOP LEVEL NODES */11 compatible = "google,sc7280-herobrine";12 model = "sc7280-wcd938x-max98360a-1mic";14 audio-routing =35 #address-cells = <1>;36 #size-cells = <0>;38 dai-link@0 {39 link-name = "MAX98360A";43 sound-dai = <&lpass_cpu MI2S_SECONDARY>;[all …]
1 // SPDX-License-Identifier: BSD-3-Clause8 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>9 #include <dt-bindings/input/linux-event-codes.h>15 #include "sc7280-chrome-common.dtsi"16 #include "sc7280-herobrine-lte-sku.dtsi"25 max98360a: audio-codec-0 {27 pinctrl-names = "default";28 pinctrl-0 = <&_en>;29 sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;30 #sound-dai-cells = <0>;[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Samsung Exynos7885 SoC pin-mux and pin-config device tree source8 * Samsung's Exynos7885 SoC pin-mux and pin-config options are listed as12 #include <dt-bindings/interrupt-controller/arm-gic.h>13 #include "exynos-pinctrl.h"16 etc0: etc0-gpio-bank {17 gpio-controller;18 #gpio-cells = <2>;20 interrupt-controller;21 #interrupt-cells = <2>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)3 * Google Gru-Chromebook shared properties8 #include "rk3399-gru.dtsi"11 pp900_ap: pp900-ap {12 compatible = "regulator-fixed";13 regulator-name = "pp900_ap";16 regulator-always-o[all...]