Home
last modified time | relevance | path

Searched full:dma (Results 1 – 25 of 4283) sorted by relevance

12345678910>>...172

/linux/arch/arm/kernel/
H A Ddma.c3 * linux/arch/arm/kernel/dma.c
7 * Front-end to the DMA handling. This handles the allocation/freeing
8 * of DMA channels, and provides a unified interface to the machines
9 * DMA facilities.
19 #include <asm/dma.h>
21 #include <asm/mach/dma.h>
36 int __init isa_dma_add(unsigned int chan, dma_t *dma) in isa_dma_add() argument
38 if (!dma->d_ops) in isa_dma_add()
41 sg_init_table(&dma->buf, 1); in isa_dma_add()
45 dma_chan[chan] = dma; in isa_dma_add()
[all …]
/linux/drivers/tty/serial/8250/
H A D8250_dma.c3 * 8250_dma.c - DMA Engine API support for 8250.c
10 #include <linux/dma-mapping.h>
17 struct uart_8250_dma *dma = p->dma; in __dma_tx_complete() local
22 dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr, in __dma_tx_complete()
27 dma->tx_running = 0; in __dma_tx_complete()
29 uart_xmit_advance(&p->port, dma->tx_size); in __dma_tx_complete()
35 if (ret || !dma->tx_running) in __dma_tx_complete()
43 struct uart_8250_dma *dma = p->dma; in __dma_rx_complete() local
50 * New DMA Rx can be started during the completion handler before it in __dma_rx_complete()
54 dma_status = dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state); in __dma_rx_complete()
[all …]
/linux/drivers/i2c/busses/
H A Di2c-stm32.c11 /* Functions for DMA support */
17 struct stm32_i2c_dma *dma; in stm32_i2c_dma_request() local
21 dma = devm_kzalloc(dev, sizeof(*dma), GFP_KERNEL); in stm32_i2c_dma_request()
22 if (!dma) in stm32_i2c_dma_request()
25 /* Request and configure I2C TX dma channel */ in stm32_i2c_dma_request()
26 dma->chan_tx = dma_request_chan(dev, "tx"); in stm32_i2c_dma_request()
27 if (IS_ERR(dma->chan_tx)) { in stm32_i2c_dma_request()
28 ret = PTR_ERR(dma->chan_tx); in stm32_i2c_dma_request()
30 dev_err_probe(dev, ret, "can't request DMA tx channel\n"); in stm32_i2c_dma_request()
40 ret = dmaengine_slave_config(dma->chan_tx, &dma_sconfig); in stm32_i2c_dma_request()
[all …]
/linux/sound/core/
H A Disadma.c3 * ISA DMA support functions
9 * ISA DMA controllers.
15 #include <linux/isa-dma.h>
19 * snd_dma_program - program an ISA DMA transfer
20 * @dma: the dma number
22 * @size: the DMA transfer size
23 * @mode: the DMA transfer mode, DMA_MODE_XXX
25 * Programs an ISA DMA transfer for the given buffer.
27 void snd_dma_program(unsigned long dma, in snd_dma_program() argument
34 disable_dma(dma); in snd_dma_program()
[all …]
/linux/drivers/comedi/drivers/
H A Dcomedi_isadma.c3 * COMEDI ISA DMA support functions
10 #include <linux/dma-mapping.h>
11 #include <linux/isa-dma.h>
16 * comedi_isadma_program - program and enable an ISA DMA transfer
17 * @desc: the ISA DMA cookie to program and enable
34 * comedi_isadma_disable - disable the ISA DMA channel
35 * @dma_chan: the DMA channel to disable
37 * Returns the residue (remaining bytes) left in the DMA transfer.
54 * comedi_isadma_disable_on_sample - disable the ISA DMA channel
55 * @dma_chan: the DMA channel to disable
[all …]
/linux/Documentation/devicetree/bindings/dma/
H A Dti-dma-crossbar.txt1 Texas Instruments DMA Crossbar (DMA request router)
4 - compatible: "ti,dra7-dma-crossbar" for DRA7xx DMA crossbar
7 - #dma-cells: Should be set to match with the DMA controller's dma-cells
8 for ti,dra7-dma-crossbar and <3> for ti,am335x-edma-crossbar.
9 - dma-requests: Number of DMA requests the crossbar can receive
10 - dma-masters: phandle pointing to the DMA controller
12 The DMA controller node need to have the following poroperties:
13 - dma-requests: Number of DMA requests the controller can handle
16 - ti,dma-safe-map: Safe routing value for unused request lines
17 - ti,reserved-dma-request-ranges: DMA request ranges which should not be used
[all …]
H A Dfsl,mxs-dma.yaml4 $id: http://devicetree.org/schemas/dma/fsl,mxs-dma.yaml#
7 title: Freescale Direct Memory Access (DMA) Controller from i.MX23/i.MX28
13 - $ref: dma-controller.yaml#
18 const: fsl,imx8qxp-dma-apbh
30 const: fsl,imx23-dma-apbx
60 - fsl,imx6q-dma-apbh
61 - fsl,imx6sx-dma-apbh
62 - fsl,imx7d-dma-apbh
63 - fsl,imx8dxl-dma-apbh
64 - fsl,imx8mm-dma-apbh
[all …]
H A Dintel,ldma.yaml4 $id: http://devicetree.org/schemas/dma/intel,ldma.yaml#
7 title: Lightning Mountain centralized DMA controllers.
14 - $ref: dma-controller.yaml#
31 "#dma-cells":
34 The first cell is the peripheral's DMA request line.
38 dma-channels:
42 dma-channel-mask:
58 intel,dma-poll-cnt:
61 DMA descriptor polling counter is used to control the poling mechanism
64 intel,dma-byte-en:
[all …]
H A Dsprd,sc9860-dma.yaml4 $id: http://devicetree.org/schemas/dma/sprd,sc9860-dma.yaml#
7 title: Spreadtrum SC9860 DMA controller
10 There are three DMA controllers: AP DMA, AON DMA and AGCP DMA. For AGCP
11 DMA controller, it can or do not request the IRQ, which will save
12 system power without resuming system by DMA interrupts if AGCP DMA
22 const: sprd,sc9860-dma
33 - description: DMA enable clock
34 - description: optional ashb_eb clock, only for the AGCP DMA controller
42 '#dma-cells':
45 dma-channels:
[all …]
H A Dallwinner,sun50i-a64-dma.yaml4 $id: http://devicetree.org/schemas/dma/allwinner,sun50i-a64-dma.yaml#
7 title: Allwinner A64 DMA Controller
14 - $ref: dma-controller.yaml#
17 "#dma-cells":
24 - allwinner,sun20i-d1-dma
25 - allwinner,sun50i-a64-dma
26 - allwinner,sun50i-a100-dma
27 - allwinner,sun50i-h6-dma
29 - const: allwinner,sun8i-r40-dma
30 - const: allwinner,sun50i-a64-dma
[all …]
H A Dowl-dma.yaml4 $id: http://devicetree.org/schemas/dma/owl-dma.yaml#
7 title: Actions Semi Owl SoCs DMA controller
10 The OWL DMA is a general-purpose direct memory access controller capable of
11 supporting 10 independent DMA channels for the Actions Semi S700 SoC and 12
12 independent DMA channels for the S500 and S900 SoC variants.
18 - $ref: dma-controller.yaml#
23 - actions,s500-dma
24 - actions,s700-dma
25 - actions,s900-dma
33 DMA channels.
[all …]
H A Dingenic,dma.yaml4 $id: http://devicetree.org/schemas/dma/ingenic,dma.yaml#
7 title: Ingenic SoCs DMA Controller
13 - $ref: dma-controller.yaml#
19 - ingenic,jz4740-dma
20 - ingenic,jz4725b-dma
21 - ingenic,jz4755-dma
22 - ingenic,jz4760-dma
25 - ingenic,jz4760b-dma
28 - ingenic,jz4770-dma
29 - ingenic,jz4780-dma
[all …]
/linux/drivers/misc/bcm-vk/
H A Dbcm_vk_sg.c5 #include <linux/dma-mapping.h>
27 struct bcm_vk_dma *dma,
30 static int bcm_vk_dma_free(struct device *dev, struct bcm_vk_dma *dma);
36 struct bcm_vk_dma *dma, in bcm_vk_dma_alloc() argument
60 dma->nr_pages = last - first + 1; in bcm_vk_dma_alloc()
62 /* Allocate DMA pages */ in bcm_vk_dma_alloc()
63 dma->pages = kmalloc_objs(struct page *, dma->nr_pages); in bcm_vk_dma_alloc()
64 if (!dma->pages) in bcm_vk_dma_alloc()
67 dev_dbg(dev, "Alloc DMA Pages [0x%llx+0x%x => %d pages]\n", in bcm_vk_dma_alloc()
68 data, vkdata->size, dma->nr_pages); in bcm_vk_dma_alloc()
[all …]
/linux/drivers/media/pci/netup_unidvb/
H A Dnetup_unidvb_core.c58 /* DMA base address */
61 /* 8 DMA blocks * 128 packets * 188 bytes*/
64 /* DMA status bits */
70 * struct netup_dma_regs - the map of DMA module registers
73 * @start_addr_lo: DMA ring buffer start address, lower part
74 * @start_addr_hi: DMA ring buffer start address, higher part
75 * @size: DMA ring buffer size register
76 * * Bits [0-7]: DMA packet size, 188 bytes
79 * @timeout: DMA timeout in units of 8ns
112 static void netup_unidvb_queue_cleanup(struct netup_dma *dma);
[all …]
/linux/arch/arm/mach-rpc/
H A Ddma.c3 * linux/arch/arm/mach-rpc/dma.c
7 * DMA functions specific to RiscPC architecture
12 #include <linux/dma-mapping.h>
16 #include <asm/dma.h>
22 #include <asm/mach/dma.h>
26 struct dma_struct dma; member
58 if (idma->dma.sg) { in iomd_get_next_sg()
76 if (idma->dma.sgcount > 1) { in iomd_get_next_sg()
77 idma->dma.sg = sg_next(idma->dma.sg); in iomd_get_next_sg()
78 idma->dma_addr = idma->dma.sg->dma_address; in iomd_get_next_sg()
[all …]
/linux/drivers/thunderbolt/
H A Ddma_port.c3 * Thunderbolt DMA configuration based mailbox support
48 * struct tb_dma_port - DMA control port
49 * @sw: Switch the DMA port belongs to
50 * @port: Switch port number where DMA capability is found
174 * The DMA (NHI) port is either 3, 5 or 7 depending on the in dma_find_port()
191 * dma_port_alloc() - Finds DMA control port from a switch pointed by route
192 * @sw: Switch from where find the DMA port
194 * Function checks if the switch NHI port supports DMA configuration
196 * DMA port structure. Returns %NULL if the capabity was not found.
198 * The DMA control port is functional also when the switch is in safe
[all …]
/linux/Documentation/devicetree/bindings/soc/ti/
H A Dkeystone-navigator-dma.txt1 Keystone Navigator DMA Controller
3 This document explains the device tree bindings for the packet dma
4 on keystone devices. The Keystone Navigator DMA driver sets up the dma
8 CRYPTO Engines etc has its own instance of dma hardware. QMSS has also
9 an internal packet DMA module which is used as an infrastructure DMA
12 Navigator DMA cloud layout:
17 |-> DMA instance #0
19 |-> DMA instance #1
23 |-> DMA instance #n
25 Navigator DMA properties:
[all …]
/linux/drivers/dma-buf/
H A Ddma-buf-mapping.c3 * DMA BUF Mapping Helpers
6 #include <linux/dma-buf-mapping.h>
7 #include <linux/dma-resv.h>
21 * that does not have any CPU list, only the DMA list. in fill_sg_entry()
23 * importers can't use it. The phys_addr based DMA API in fill_sg_entry()
58 * struct dma_buf_dma - holds DMA mapping information
60 * @state: DMA IOVA state relevant in IOMMU-based DMA
61 * @size: Total size of DMA transfer
78 * @dir: [in] direction of DMA transfer
83 * On success, the DMA addresses and lengths in the returned scatterlist are
[all …]
/linux/drivers/gpu/drm/exynos/
H A Dregs-fimc.h24 /* Y 1st frame start address for output DMA */
26 /* Y 2nd frame start address for output DMA */
28 /* Y 3rd frame start address for output DMA */
30 /* Y 4th frame start address for output DMA */
32 /* Cb 1st frame start address for output DMA */
34 /* Cb 2nd frame start address for output DMA */
36 /* Cb 3rd frame start address for output DMA */
38 /* Cb 4th frame start address for output DMA */
40 /* Cr 1st frame start address for output DMA */
42 /* Cr 2nd frame start address for output DMA */
[all …]
/linux/drivers/crypto/qce/
H A Ddma.c10 #include "dma.h"
14 struct qce_dma_data *dma = data; in qce_dma_release() local
16 dma_release_channel(dma->txchan); in qce_dma_release()
17 dma_release_channel(dma->rxchan); in qce_dma_release()
18 kfree(dma->result_buf); in qce_dma_release()
21 int devm_qce_dma_request(struct device *dev, struct qce_dma_data *dma) in devm_qce_dma_request() argument
25 dma->txchan = dma_request_chan(dev, "tx"); in devm_qce_dma_request()
26 if (IS_ERR(dma->txchan)) in devm_qce_dma_request()
27 return dev_err_probe(dev, PTR_ERR(dma->txchan), in devm_qce_dma_request()
28 "Failed to get TX DMA channel\n"); in devm_qce_dma_request()
[all …]
/linux/Documentation/driver-api/dmaengine/
H A Dclient.rst2 DMA Engine API Guide
7 .. note:: For DMA Engine usage in async_tx please see:
11 Below is a guide to device driver writers on how to use the Slave-DMA API of the
12 DMA Engine. This is applicable only for slave DMA usage only.
14 DMA usage
17 The slave DMA usage consists of following steps:
19 - Allocate a DMA slave channel
31 1. Allocate a DMA slave channel
33 Channel allocation is slightly different in the slave DMA context,
34 client drivers typically need a channel from a particular DMA
[all …]
/linux/Documentation/core-api/
H A Ddma-isa-lpc.rst2 DMA with ISA and LPC devices
7 This document describes how to do DMA transfers using the old ISA DMA
9 uses the same DMA system so it will be around for quite some time.
14 To do ISA style DMA you need to include two headers::
16 #include <linux/dma-mapping.h>
17 #include <asm/dma.h>
19 The first is the generic DMA API used to convert virtual addresses to
20 bus addresses (see Documentation/core-api/dma-api.rst for details).
22 The second contains the routines specific to ISA DMA transfers. Since
30 The ISA DMA controller has some very strict requirements on which
[all …]
/linux/drivers/vfio/
H A Dvfio_iommu_type1.c3 * VFIO: IOMMU DMA mapping support for Type1 IOMMU
63 "Maximum number of user DMA mappings per container (65535).");
126 * Guest RAM pinning working set or DMA target
163 * into DMA'ble space using the IOMMU
174 struct vfio_dma *dma = rb_entry(node, struct vfio_dma, node); in vfio_find_dma() local
176 if (start + size - 1 < dma->iova) in vfio_find_dma()
178 else if (start > dma->iova + dma->size - 1) in vfio_find_dma()
181 return dma; in vfio_find_dma()
198 struct vfio_dma *dma = rb_entry(node, struct vfio_dma, node); in vfio_find_dma_first_node() local
200 if (start <= dma->iova + dma->size - 1) { in vfio_find_dma_first_node()
[all …]
/linux/drivers/dma/
H A Dof-dma.c3 * Device tree helpers for DMA request / controller
24 * of_dma_find_controller - Get a DMA controller in DT DMA helpers list
25 * @dma_spec: pointer to DMA specifier as found in the device tree
27 * Finds a DMA controller with matching device node and number for dma cells
28 * in a list of registered DMA controllers. If a match is found a valid pointer
29 * to the DMA data stored is returned. A NULL pointer is returned if no match is
40 pr_debug("%s: can't find DMA controller %pOF\n", __func__, in of_dma_find_controller()
48 * @dma_spec: pointer to DMA specifier as found in the device tree
49 * @ofdma: pointer to DMA controller data (router information)
53 * to request channel from the real DMA controller.
[all …]
/linux/Documentation/driver-api/usb/
H A Ddma.rst1 USB DMA
5 over how DMA may be used to perform I/O operations. The APIs are detailed
11 The big picture is that USB drivers can continue to ignore most DMA issues,
12 though they still must provide DMA-ready buffers (see
13 Documentation/core-api/dma-api-howto.rst). That's how they've worked through
14 the 2.4 (and earlier) kernels, or they can now be DMA-aware.
16 DMA-aware usb drivers:
18 - New calls enable DMA-aware drivers, letting them allocate dma buffers and
19 manage dma mappings for existing dma-ready buffers (see below).
25 - "usbcore" will map this DMA address, if a DMA-aware driver didn't do
[all …]

12345678910>>...172