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/linux/Documentation/devicetree/bindings/dma/
H A Dti-dma-crossbar.txt1 Texas Instruments DMA Crossbar (DMA request router)
4 - compatible: "ti,dra7-dma-crossbar" for DRA7xx DMA crossbar
5 "ti,am335x-edma-crossbar" for AM335x and AM437x
6 - reg: Memory map for accessing module
7 - #dma-cells: Should be set to match with the DMA controller's dma-cells
8 for ti,dra7-dma-crossbar and <3> for ti,am335x-edma-crossbar.
9 - dma-requests: Number of DMA requests the crossbar can receive
10 - dma-masters: phandle pointing to the DMA controller
12 The DMA controller node need to have the following poroperties:
13 - dma-requests: Number of DMA requests the controller can handle
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/linux/lib/
H A Dgenalloc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * kmalloc/kfree interface. Uses for this includes on-device special
8 * It is safe to use the allocator in NMI handlers and other special
21 * On architectures that don't have NMI-safe cmpxchg implementation,
26 * Copyright 2005 (C) Jes Sorensen <jes@trained-monkey.org>
42 return chunk->end_addr - chunk->start_addr + 1; in chunk_size()
52 return -EBUSY; in set_bits_ll()
66 return -EBUSY; in clear_bits_ll()
74 * bitmap_set_ll - set the specified number of bits at the specified position
75 * @map: pointer to a bitmap
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/linux/include/linux/
H A Dgenalloc.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * kmalloc/kfree interface. Uses for this includes on-device special
8 * It is safe to use the allocator in NMI handlers and other special
21 * On architectures that don't have NMI-safe cmpxchg implementation,
41 * @map: Pointer to bitmap
48 typedef unsigned long (*genpool_algo_t)(unsigned long *map,
108 * gen_pool_add - add a new chunk of special memory to the pool
113 * allocated on, or -1
117 * Returns 0 on success or a -ve errno on failure.
122 return gen_pool_add_virt(pool, addr, -1, size, nid); in gen_pool_add()
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H A Ddmaengine.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
18 * typedef dma_cookie_t - an opaque DMA cookie
20 * if dma_cookie_t is >0 it's a DMA request cookie, <0 it's an error code
31 * enum dma_status - DMA transaction status
46 * enum dma_transaction_type - DMA transaction types/indexes
49 * automatically set as dma devices are registered.
73 * enum dma_transfer_direction - dma transfer mode and direction indicator
89 * ----------------------------
91 * The gap(in bytes) between two chunks is called inter-chunk-gap(ICG).
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H A Dvirtio_pci_modern.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 * struct virtio_pci_modern_device - info for modern PCI virtio
13 * @device: Device-specific data (non-legacy mode)
14 * @notify_base: Base of vq notifications (non-legacy mode)
17 * @notify_len: So we can sanity-check accesses
18 * @device_len: So we can sanity-check accesses
19 * @notify_map_cap: Capability for when we need to map notifications per-vq
21 * (non-legacy mode).
29 * for vendor devices with DMA space address limitations
55 * Type-safe wrappers for io accesses.
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/linux/Documentation/devicetree/bindings/pci/
H A Dbrcm,stb-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jim Quinlan <james.quinlan@broadcom.com>
15 - enum:
16 - brcm,bcm2711-pcie # The Raspberry Pi 4
17 - brcm,bcm2712-pcie # Raspberry Pi 5
18 - brcm,bcm4908-pcie
19 - brcm,bcm7211-pcie # Broadcom STB version of RPi4
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/linux/drivers/gpu/drm/i915/
H A Di915_mm.c26 #include <linux/io-mapping.h>
41 #define use_dma(io) ((io) != -1)
45 if (use_dma(r->iobase)) in sgt_pfn()
46 return (r->sgt.dma + r->sgt.curr + r->iobase) >> PAGE_SHIFT; in sgt_pfn()
48 return r->sgt.pfn + (r->sgt.curr >> PAGE_SHIFT); in sgt_pfn()
55 if (GEM_WARN_ON(!r->sgt.sgp)) in remap_sg()
56 return -EINVAL; in remap_sg()
59 set_pte_at(r->mm, addr, pte, in remap_sg()
60 pte_mkspecial(pfn_pte(sgt_pfn(r), r->prot))); in remap_sg()
61 r->pfn++; /* track insertions in case we need to unwind later */ in remap_sg()
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/linux/drivers/dma/ti/
H A Ddma-crossbar.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com
25 .compatible = "ti,dra7-dma-crossbar",
29 .compatible = "ti,am335x-edma-crossbar",
44 u32 dma_requests; /* number of DMA requests on eDMA */
60 writeb_relaxed(val, iomem + (63 - event % 4)); in ti_am335x_xbar_write()
68 struct ti_am335x_xbar_map *map = route_data; in ti_am335x_xbar_free() local
71 map->mux_val, map->dma_line); in ti_am335x_xbar_free()
73 ti_am335x_xbar_write(xbar->iomem, map->dma_line, 0); in ti_am335x_xbar_free()
74 kfree(map); in ti_am335x_xbar_free()
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/linux/drivers/gpu/drm/
H A Ddrm_gpuvm.c1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
48 * The GPU VA manager internally uses a rb-tree to manage the
63 * entries from within dma-fence signalling critical sections it is enough to
64 * pre-allocate the &drm_gpuva structures.
89 * lists are maintained in order to accelerate locking of dma-resv locks and
108 * sequence of operations to satisfy a given map or unmap request.
113 * implement Vulkan 'Sparse Memory Bindings' - drivers UAPIs often refer to this
117 * containing map, unmap and remap operations for a given newly requested
124 * of unmap operations, a maximum of two remap operations and a single map
128 * The single map operation represents the original map operation requested by
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/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
8 #include <dt-bindings/power/tegra194-powergate.h>
9 #include <dt-bindings/reset/tegra194-reset.h>
10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
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/linux/include/net/page_pool/
H A Dtypes.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 #include <linux/dma-direction.h>
12 #define PP_FLAG_DMA_MAP BIT(0) /* Should page_pool do the DMA
13 * map/unmap
17 * DMA-synced-for-device according to
20 * Please note DMA-sync-for-CPU is still
37 /* Index limit to stay within PP_DMA_INDEX_BITS for DMA indices */
38 #define PP_DMA_INDEX_LIMIT XA_LIMIT(1, BIT(PP_DMA_INDEX_BITS) - 1)
44 * use-case. The NAPI budget is 64 packets. After a NAPI poll the RX
48 * Keeping room for more objects, is due to XDP_DROP use-case. As
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/linux/drivers/pci/
H A Dp2pdma.c1 // SPDX-License-Identifier: GPL-2.0
3 * PCI Peer 2 Peer DMA support.
5 * Copyright (c) 2016-2018, Logan Gunthorpe
6 * Copyright (c) 2016-2017, Microsemi Corporation
11 #define pr_fmt(fmt) "pci-p2pdma: " fmt
13 #include <linux/dma-map-ops.h>
14 #include <linux/pci-p2pdma.h>
19 #include <linux/percpu-refcount.h>
49 p2pdma = rcu_dereference(pdev->p2pdma); in size_show()
50 if (p2pdma && p2pdma->pool) in size_show()
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/linux/sound/soc/fsl/
H A Dfsl_ssi.c1 // SPDX-License-Identifier: GPL-2.0
7 // Copyright 2007-2010 Freescale Semiconductor, Inc.
9 // Some notes why imx-pcm-fiq is used instead of DMA on some boards:
16 // we receive in our (PCM-) data stream. The only chance we have is to
43 #include <linux/dma/imx-dma.h>
53 #include "imx-pcm.h"
55 /* Define RX and TX to index ssi->regvals array; Can be 0 or 1 only */
66 * (bit-endianness must match byte-endianness). Processors typically write
68 * written in. So if the host CPU is big-endian, then only big-endian
91 * - SSI inputs external bit clock and outputs frame sync clock -- CBM_CFS
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/linux/drivers/mtd/spi-nor/
H A Dsfdp.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/mtd/spi-nor.h>
14 #define SFDP_PARAM_HEADER_ID(p) (((p)->id_msb << 8) | (p)->id_lsb)
16 (((p)->parameter_table_pointer[2] << 16) | \
17 ((p)->parameter_table_pointer[1] << 8) | \
18 ((p)->parameter_table_pointer[0] << 0))
19 #define SFDP_PARAM_HEADER_PARAM_LEN(p) ((p)->length * 4)
22 #define SFDP_SECTOR_MAP_ID 0xff81 /* Sector Map Table */
23 #define SFDP_4BAIT_ID 0xff84 /* 4-byte Address Instruction Table */
27 * Register Map.
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/linux/Documentation/admin-guide/
H A Dpstore-blk.rst1 .. SPDX-License-Identifier: GPL-2.0
7 ------------
10 block device and non-block device before the system crashes. You can get
13 mount -t pstore pstore /sys/fs/pstore
17 ---------------------
27 Configurations for driver are all about block device and non-block device,
31 -----------------------
51 #. /dev/<disk_name><decimal> represents the device number of partition - device
53 #. /dev/<disk_name>p<decimal> - same as the above; this form is used when disk
60 #. PARTUUID=00112233-4455-6677-8899-AABBCCDDEEFF represents the unique id of
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/linux/net/core/
H A Dpage_pool.c1 /* SPDX-License-Identifier: GPL-2.0
8 #include <linux/error-injection.h>
20 #include <linux/dma-direction.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/page-flags.h>
46 #define alloc_stat_inc(pool, __stat) (pool->alloc_stats.__stat++)
47 /* recycle_stat_inc is safe to use when preemption is possible. */
50 struct page_pool_recycle_stats __percpu *s = pool->recycle_stats; \
51 this_cpu_inc(s->__stat); \
56 struct page_pool_recycle_stats __percpu *s = pool->recycle_stats; \
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/linux/drivers/platform/x86/dell/
H A Ddcdbas.c1 // SPDX-License-Identifier: GPL-2.0-only
10 * See Documentation/userspace-api/dcdbas.rst for more information.
12 * Copyright (C) 1995-2006 Dell Inc.
17 #include <linux/dma-mapping.h>
39 #define DRIVER_VERSION "5.6.0-3.4"
57 smi_buffer->virt = dma_alloc_coherent(&dcdbas_pdev->dev, size, in dcdbas_smi_alloc()
58 &smi_buffer->dma, GFP_KERNEL); in dcdbas_smi_alloc()
59 if (!smi_buffer->virt) { in dcdbas_smi_alloc()
60 dev_dbg(&dcdbas_pdev->dev, in dcdbas_smi_alloc()
63 return -ENOMEM; in dcdbas_smi_alloc()
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/linux/drivers/dma/
H A Ddmaengine.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
7 * This code implements the DMA subsystem. It provides a HW-neutral interface
9 * if present, and allows different HW DMA drivers to register as providing
29 * See Documentation/driver-api/dmaengine for more details
35 #include <linux/dma-mapping.h>
65 /* --- debugfs implementation --- */
73 dma_dev->dbg_dev_root = debugfs_create_dir(dev_name(dma_dev->dev), in dmaengine_debug_register()
75 if (IS_ERR(dma_dev->dbg_dev_root)) in dmaengine_debug_register()
76 dma_dev->dbg_dev_root = NULL; in dmaengine_debug_register()
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/linux/drivers/infiniband/ulp/iser/
H A Diser_verbs.c4 * Copyright (c) 2013-2014 Mellanox Technologies. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
43 ib_event_msg(cause->event), cause->event); in iser_qp_event_callback()
50 ib_event_msg(event->event), event->event, in iser_event_handler()
51 dev_name(&event->device->dev), event->element.port_num); in iser_event_handler()
55 * iser_create_device_ib_res - creates Protection Domain (PD), Completion
56 * Queue (CQ), DMA Memory Region (DMA MR) with the device associated with
59 * Return: 0 on success, -1 on failure
63 struct ib_device *ib_dev = device->ib_device; in iser_create_device_ib_res()
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/linux/rust/kernel/
H A Dplatform.rs1 // SPDX-License-Identifier: GPL-2.0
37 ) -> Result { in register()
48 // SAFETY: It's safe to set the fields of `struct platform_driver` on initialization. in register()
68 extern "C" fn probe_callback(pdev: *mut bindings::platform_device) -> kernel::ffi::c_int { in probe_callback()
103 fn of_id_table() -> Option<of::IdTable<Self::IdInfo>> { in of_id_table()
107 fn acpi_id_table() -> Option<acpi::IdTable<Self::IdInfo>> { in acpi_id_table()
169 /// ) -> Result<Pin<KBox<Self>>> {
194 -> Resul in probe()
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/linux/drivers/net/ethernet/natsemi/
H A Dsonic.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Converted to DMA API, added zero-copy buffer handling, and
8 * (from the mac68k project) introduced dhd's support for 16-bit cards.
15 * (C) 1995 by Andreas Busse (andy@waldorf-gmbh.de)
19 * And... partially rewritten again by David Huggins-Daines in order
21 * 16-bit DMA.
23 * (C) 1999 David Huggins-Daines <dhd@debian.org>
28 * Sources: Olivetti M700-10 Risc Personal Computer hardware handbook,
33 * Application Note AN-746, the files "lance.c" and "ibmlana.c". See also
39 static int sonic_debug = -1;
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/linux/drivers/gpu/drm/nouveau/
H A Dnouveau_uvmm.c1 // SPDX-License-Identifier: MIT
12 * Actual map/unmap operations within the fence signalling critical path are
13 * protected by installing DMA fences to the corresponding GEMs DMA
15 * list in order to map/unmap it's entries, can't occur concurrently.
20 * the corresponding GEMs DMA reservation fence.
54 struct nouveau_uvma *map; member
94 struct nvif_vmm *vmm = &uvmm->vmm.vmm; in nouveau_uvmm_vmm_sparse_ref()
103 struct nvif_vmm *vmm = &uvmm->vmm.vmm; in nouveau_uvmm_vmm_sparse_unref()
112 struct nvif_vmm *vmm = &uvmm->vmm.vmm; in nouveau_uvmm_vmm_get()
121 struct nvif_vmm *vmm = &uvmm->vmm.vmm; in nouveau_uvmm_vmm_put()
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/linux/Documentation/virt/hyperv/
H A Dvpci.rst1 .. SPDX-License-Identifier: GPL-2.0
3 PCI pass-thru devices
5 In a Hyper-V guest VM, PCI pass-thru devices (also called
16 Hyper-V terminology for vPCI devices is "Discrete Device
17 Assignment" (DDA). Public documentation for Hyper-V DDA is
20 …tps://learn.microsoft.com/en-us/windows-server/virtualization/hyper-v/plan/plan-for-deploying-devi…
23 and for GPUs. A similar mechanism for NICs is called SR-IOV
25 driver to interact directly with the hardware. See Hyper-V
26 public documentation here: `SR-IOV`_
28 .. _SR-IOV: https://learn.microsoft.com/en-us/windows-hardware/drivers/network/overview-of-single-r…
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/linux/drivers/net/wireless/ath/wil6210/
H A Dtxrx.c1 // SPDX-License-Identifier: ISC
3 * Copyright (c) 2012-2017 Qualcomm Atheros, Inc.
4 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
25 MODULE_PARM_DESC(rx_align_2, " align Rx buffers on 4*n+2, default - no");
29 MODULE_PARM_DESC(rx_large_buf, " allocate 8KB RX buffers, default - no");
39 /* wil_ring_wmark_low - low watermark for available descriptor space */
42 return ring->size / 8; in wil_ring_wmark_low()
45 /* wil_ring_wmark_high - high watermark for available descriptor space */
48 return ring->size / 4; in wil_ring_wmark_high()
71 struct wil_ring *vring = &wil->ring_tx[i]; in wil_is_tx_idle()
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/linux/arch/alpha/kernel/
H A Dcore_t2.c1 // SPDX-License-Identifier: GPL-2.0
30 /* For dumping initial DMA window settings. */
33 /* For dumping final DMA window settings. */
37 * By default, we direct-map starting at 2GB, in order to allow the
38 * maximum size direct-map window (2GB) to match the maximum amount of
40 * floppy to DMA only via the scatter/gather window set up for 8MB
41 * ISA DMA, since the maximum ISA DMA address is 2GB-1.
43 * For now, this seems a reasonable trade-off: even though most SABLEs
62 * NOTE: Herein lie back-to-back mb instructions. They are magic.
68 * BIOS32-style PCI interface:
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