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/linux/Documentation/devicetree/bindings/dma/
H A Dti-dma-crossbar.txt1 Texas Instruments DMA Crossbar (DMA request router)
4 - compatible: "ti,dra7-dma-crossbar" for DRA7xx DMA crossbar
5 "ti,am335x-edma-crossbar" for AM335x and AM437x
6 - reg: Memory map for accessing module
7 - #dma-cells: Should be set to match with the DMA controller's dma-cells
8 for ti,dra7-dma-crossbar and <3> for ti,am335x-edma-crossbar.
9 - dma-requests: Number of DMA requests the crossbar can receive
10 - dma-masters: phandle pointing to the DMA controller
12 The DMA controller node need to have the following poroperties:
13 - dma-requests: Number of DMA requests the controller can handle
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/linux/lib/
H A Dgenalloc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * kmalloc/kfree interface. Uses for this includes on-device special
8 * It is safe to use the allocator in NMI handlers and other special
21 * On architectures that don't have NMI-safe cmpxchg implementation,
26 * Copyright 2005 (C) Jes Sorensen <jes@trained-monkey.org>
42 return chunk->end_addr - chunk->start_addr + 1; in chunk_size()
52 return -EBUSY; in set_bits_ll()
66 return -EBUSY; in clear_bits_ll()
74 * bitmap_set_ll - set the specified number of bits at the specified position
75 * @map: pointer to a bitmap
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/linux/include/linux/
H A Dgenalloc.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * kmalloc/kfree interface. Uses for this includes on-device special
8 * It is safe to use the allocator in NMI handlers and other special
21 * On architectures that don't have NMI-safe cmpxchg implementation,
41 * @map: Pointer to bitmap
48 typedef unsigned long (*genpool_algo_t)(unsigned long *map,
108 * gen_pool_add - add a new chunk of special memory to the pool
113 * allocated on, or -1
117 * Returns 0 on success or a -ve errno on failure.
122 return gen_pool_add_virt(pool, addr, -1, size, nid); in gen_pool_add()
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H A Ddma-map-ops.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * It should not be included in drivers just using the DMA API.
9 #include <linux/dma-mapping.h>
74 #include <asm/dma-mapping.h>
78 if (dev->dma_ops) in get_dma_ops()
79 return dev->dma_ops; in get_dma_ops()
86 dev->dma_ops = dma_ops; in set_dma_ops()
104 if (dev && dev->cma_area) in dev_get_cma_area()
105 return dev->cma_area; in dev_get_cma_area()
133 return -ENOSYS; in dma_contiguous_reserve_area()
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H A Ddmaengine.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
18 * typedef dma_cookie_t - an opaque DMA cookie
20 * if dma_cookie_t is >0 it's a DMA request cookie, <0 it's an error code
31 * enum dma_status - DMA transaction status
46 * enum dma_transaction_type - DMA transaction types/indexes
49 * automatically set as dma devices are registered.
73 * enum dma_transfer_direction - dma transfer mode and direction indicator
89 * ----------------------------
91 * The gap(in bytes) between two chunks is called inter-chunk-gap(ICG).
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H A Dvirtio_pci_modern.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 * struct virtio_pci_modern_device - info for modern PCI virtio
12 * @device: Device-specific data (non-legacy mode)
13 * @notify_base: Base of vq notifications (non-legacy mode)
16 * @notify_len: So we can sanity-check accesses
17 * @device_len: So we can sanity-check accesses
18 * @notify_map_cap: Capability for when we need to map notifications per-vq
20 * (non-legacy mode).
28 * for vendor devices with DMA space address limitations
54 * Type-safe wrappers for io accesses.
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H A Ddma-mapping.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 #include <linux/dma-direction.h>
12 * List of possible attributes associated with a DMA mapping. The semantics
13 * of each attribute should be defined in Documentation/core-api/dma-attributes.rst.
43 * DMA_ATTR_ALLOC_SINGLE_PAGES: This is a hint to the DMA-mapping subsystem
49 * DMA_ATTR_NO_WARN: This tells the DMA-mapping subsystem to suppress
57 * at least read-only at lesser-privileged levels).
62 * A dma_addr_t can hold any valid DMA or bus address for the platform. It can
63 * be given to a device to use as a DMA source or target. It is specific to a
73 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
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/linux/Documentation/devicetree/bindings/pci/
H A Dbrcm,stb-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jim Quinlan <james.quinlan@broadcom.com>
15 - enum:
16 - brcm,bcm2711-pcie # The Raspberry Pi 4
17 - brcm,bcm4908-pcie
18 - brcm,bcm7211-pcie # Broadcom STB version of RPi4
19 - brcm,bcm7216-pcie # Broadcom 7216 Arm
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/linux/drivers/gpu/drm/i915/
H A Di915_mm.c26 #include <linux/io-mapping.h>
41 #define use_dma(io) ((io) != -1)
45 if (use_dma(r->iobase)) in sgt_pfn()
46 return (r->sgt.dma + r->sgt.curr + r->iobase) >> PAGE_SHIFT; in sgt_pfn()
48 return r->sgt.pfn + (r->sgt.curr >> PAGE_SHIFT); in sgt_pfn()
55 if (GEM_WARN_ON(!r->sgt.sgp)) in remap_sg()
56 return -EINVAL; in remap_sg()
59 set_pte_at(r->mm, addr, pte, in remap_sg()
60 pte_mkspecial(pfn_pte(sgt_pfn(r), r->prot))); in remap_sg()
61 r->pfn++; /* track insertions in case we need to unwind later */ in remap_sg()
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/linux/drivers/dma/ti/
H A Ddma-crossbar.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com
25 .compatible = "ti,dra7-dma-crossbar",
29 .compatible = "ti,am335x-edma-crossbar",
44 u32 dma_requests; /* number of DMA requests on eDMA */
60 writeb_relaxed(val, iomem + (63 - event % 4)); in ti_am335x_xbar_write()
68 struct ti_am335x_xbar_map *map = route_data; in ti_am335x_xbar_free() local
71 map->mux_val, map->dma_line); in ti_am335x_xbar_free()
73 ti_am335x_xbar_write(xbar->iomem, map->dma_line, 0); in ti_am335x_xbar_free()
74 kfree(map); in ti_am335x_xbar_free()
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/linux/Documentation/core-api/
H A Ddma-api-howto.rst2 Dynamic DMA mapping Guide
9 This is a guide to device driver writers on how to use the DMA API
10 with example pseudo-code. For a concise description of the API, see
11 Documentation/core-api/dma-api.rst.
13 CPU and DMA addresses
16 There are several kinds of addresses involved in the DMA API, and it's
27 address is not directly useful to a driver; it must use ioremap() to map
31 registers at an MMIO address, or if it performs DMA to read or write system
37 From a device's point of view, DMA uses the bus address space, but it may
39 supports 64-bit addresses for main memory and PCI BARs, it may use an IOMMU
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/linux/include/drm/
H A Ddrm_gpuvm.h1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
28 #include <linux/dma-resv.h>
42 * enum drm_gpuva_flags - flags for struct drm_gpuva
66 * struct drm_gpuva - structure to track a GPU VA mapping
126 * @rb: structure containing data to store &drm_gpuvas in a rb-tree
130 * @rb.node: the rb-tree node
138 * through the rb-tree while doing modifications on the rb-tree
144 * @rb.__subtree_last: needed by the interval tree, holding last-in-subtree
166 va->va.addr = addr; in drm_gpuva_init()
167 va->va.range = range; in drm_gpuva_init()
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/linux/drivers/gpu/drm/
H A Ddrm_gpuvm.c1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
47 * The GPU VA manager internally uses a rb-tree to manage the
62 * entries from within dma-fence signalling critical sections it is enough to
63 * pre-allocate the &drm_gpuva structures.
88 * lists are maintained in order to accelerate locking of dma-resv locks and
107 * sequence of operations to satisfy a given map or unmap request.
112 * implement Vulkan 'Sparse Memory Bindings' - drivers UAPIs often refer to this
116 * containing map, unmap and remap operations for a given newly requested
123 * of unmap operations, a maximum of two remap operations and a single map
127 * The single map operation represents the original map operation requested by
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H A Ddrm_prime.c30 #include <linux/dma-buf.h>
68 * GEM-based drivers, the &dma_buf should be exported using
72 * importing GEM object -> dma-buf -> exported GEM bo. A further complication
81 * Self-importing: If userspace is using PRIME as a replacement for flink then
82 * it will get a fd->handle request for a GEM object that it created. Drivers
84 * dma-buf private. For GEM based drivers this is handled in
104 return -ENOMEM; in drm_prime_add_buf_handle()
107 member->dma_buf = dma_buf; in drm_prime_add_buf_handle()
108 member->handle = handle; in drm_prime_add_buf_handle()
111 p = &prime_fpriv->dmabufs.rb_node; in drm_prime_add_buf_handle()
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/linux/Documentation/driver-api/
H A Ddevice-io.rst10 Bus-Independent Device Accesses
27 ----------------------------
49 --------------------
52 memory-mapped registers on the device. Linux provides interfaces to read
53 and write 8-bit, 16-bit, 32-bit and 64-bit quantities. Due to a
82 from config space, which is guaranteed to soft-fail if the card doesn't
94 reg = ha->iobase;
96 WRT_REG_WORD(&reg->ictrl, 0);
102 RD_REG_WORD(&reg->ictrl);
103 ha->flags.ints_enabled = 0;
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/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
8 #include <dt-bindings/power/tegra194-powergate.h>
9 #include <dt-bindings/reset/tegra194-reset.h>
10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
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/linux/arch/arm/mm/
H A Dinit.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 1995-2005 Russell King
21 #include <linux/dma-map-ops.h>
28 #include <asm/mach-types.h>
41 #include <asm/mach/map.h>
58 phys_initrd_start = __virt_to_phys(tag->u.initrd.start); in parse_tag_initrd()
59 phys_initrd_size = tag->u.initrd.size; in parse_tag_initrd()
67 phys_initrd_start = tag->u.initrd.start; in parse_tag_initrd2()
68 phys_initrd_size = tag->u.initrd.size; in parse_tag_initrd2()
89 * The DMA mask corresponding to the maximum bus address allocatable
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/linux/include/net/page_pool/
H A Dtypes.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 #include <linux/dma-direction.h>
11 #define PP_FLAG_DMA_MAP BIT(0) /* Should page_pool do the DMA
12 * map/unmap
16 * DMA-synced-for-device according to
19 * Please note DMA-sync-for-CPU is still
40 * use-case. The NAPI budget is 64 packets. After a NAPI poll the RX
44 * Keeping room for more objects, is due to XDP_DROP use-case. As
58 * struct page_pool_params - page pool parameters
63 * @dev: device, for DMA pre-mapping purposes
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/linux/drivers/iommu/
H A Ddma-iommu.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * A fairly generic DMA-API to IOMMU-API glue layer.
5 * Copyright (C) 2014-2015 ARM Ltd.
7 * based in part on arch/arm/mm/dma-mapping.c:
8 * Copyright (C) 2000-2004 Russell King
15 #include <linux/dma-direct.h>
16 #include <linux/dma-map-ops.h>
20 #include <linux/iommu-dma.h>
35 #include "dma-iommu.h"
36 #include "iommu-pages.h"
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/linux/drivers/media/pci/ivtv/
H A Divtv-yuv.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include "ivtv-driver.h"
10 #include "ivtv-udma.h"
11 #include "ivtv-yuv.h"
25 static int ivtv_yuv_prep_user_dma(struct ivtv *itv, struct ivtv_user_dma *dma, in ivtv_yuv_prep_user_dma() argument
30 struct yuv_playback_info *yi = &itv->yuv_info; in ivtv_yuv_prep_user_dma()
31 u8 frame = yi->draw_frame; in ivtv_yuv_prep_user_dma()
32 struct yuv_frame_info *f = &yi->new_frame_info[frame]; in ivtv_yuv_prep_user_dma()
40 y_decode_height = uv_decode_height = f->src_h + f->src_y; in ivtv_yuv_prep_user_dma()
42 if (f->offset_y) in ivtv_yuv_prep_user_dma()
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/linux/sound/soc/fsl/
H A Dfsl_ssi.c1 // SPDX-License-Identifier: GPL-2.0
7 // Copyright 2007-2010 Freescale Semiconductor, Inc.
9 // Some notes why imx-pcm-fiq is used instead of DMA on some boards:
16 // we receive in our (PCM-) data stream. The only chance we have is to
43 #include <linux/dma/imx-dma.h>
53 #include "imx-pcm.h"
55 /* Define RX and TX to index ssi->regvals array; Can be 0 or 1 only */
66 * (bit-endianness must match byte-endianness). Processors typically write
68 * written in. So if the host CPU is big-endian, then only big-endian
91 * - SSI inputs external bit clock and outputs frame sync clock -- CBM_CFS
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/linux/drivers/mtd/spi-nor/
H A Dsfdp.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/mtd/spi-nor.h>
14 #define SFDP_PARAM_HEADER_ID(p) (((p)->id_msb << 8) | (p)->id_lsb)
16 (((p)->parameter_table_pointer[2] << 16) | \
17 ((p)->parameter_table_pointer[1] << 8) | \
18 ((p)->parameter_table_pointer[0] << 0))
19 #define SFDP_PARAM_HEADER_PARAM_LEN(p) ((p)->length * 4)
22 #define SFDP_SECTOR_MAP_ID 0xff81 /* Sector Map Table */
23 #define SFDP_4BAIT_ID 0xff84 /* 4-byte Address Instruction Table */
27 * Register Map.
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/linux/net/core/
H A Dpage_pool.c1 /* SPDX-License-Identifier: GPL-2.0
8 #include <linux/error-injection.h>
18 #include <linux/dma-direction.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/page-flags.h>
43 #define alloc_stat_inc(pool, __stat) (pool->alloc_stats.__stat++)
44 /* recycle_stat_inc is safe to use when preemption is possible. */
47 struct page_pool_recycle_stats __percpu *s = pool->recycle_stats; \
48 this_cpu_inc(s->__stat); \
53 struct page_pool_recycle_stats __percpu *s = pool->recycle_stats; \
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/linux/Documentation/admin-guide/
H A Dpstore-blk.rst1 .. SPDX-License-Identifier: GPL-2.0
7 ------------
10 block device and non-block device before the system crashes. You can get
13 mount -t pstore pstore /sys/fs/pstore
17 ---------------------
27 Configurations for driver are all about block device and non-block device,
31 -----------------------
51 #. /dev/<disk_name><decimal> represents the device number of partition - device
53 #. /dev/<disk_name>p<decimal> - same as the above; this form is used when disk
60 #. PARTUUID=00112233-4455-6677-8899-AABBCCDDEEFF represents the unique id of
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/linux/drivers/gpu/drm/xe/
H A Dxe_vm_doc.h1 /* SPDX-License-Identifier: MIT */
19 * ------------
33 * ----------
35 * DRM_XE_VM_BIND_OP_MAP - Create mapping for a BO
36 * DRM_XE_VM_BIND_OP_UNMAP - Destroy mapping for a BO / userptr
37 * DRM_XE_VM_BIND_OP_MAP_USERPTR - Create mapping for userptr
54 * .. code-block::
56 * bind BO0 0x0-0x1000
62 * bind BO1 0x201000-0x202000
66 * bind BO2 0x1ff000-0x201000
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