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Searched +full:dma +full:- +full:drb (Results 1 – 4 of 4) sorted by relevance

/linux/Documentation/devicetree/bindings/dma/
H A Dintel,ldma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/intel,ldma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Lightning Mountain centralized DMA controllers.
10 - chuanhua.lei@intel.com
11 - mallikarjunax.reddy@intel.com
14 - $ref: dma-controller.yaml#
19 - intel,lgm-cdma
20 - intel,lgm-dma2tx
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/linux/drivers/net/wwan/t7xx/
H A Dt7xx_hif_dpmaif_tx.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2021-2022, Intel Corporation.
22 #include <linux/dma-direction.h>
23 #include <linux/dma-mapping.h>
47 /* DRB dtype */
54 struct dpmaif_tx_queue *txq = &dpmaif_ctrl->txq[q_num]; in t7xx_dpmaif_update_drb_rd_idx()
58 if (!txq->que_started) in t7xx_dpmaif_update_drb_rd_idx()
61 old_sw_rd_idx = txq->drb_rd_idx; in t7xx_dpmaif_update_drb_rd_idx()
62 new_hw_rd_idx = t7xx_dpmaif_ul_get_rd_idx(&dpmaif_ctrl->hw_info, q_num); in t7xx_dpmaif_update_drb_rd_idx()
64 dev_err(dpmaif_ctrl->dev, "Out of range read index: %u\n", new_hw_rd_idx); in t7xx_dpmaif_update_drb_rd_idx()
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/linux/drivers/edac/
H A De752x_edac.c10 * https://www.intel.in/content/www/in/en/chipsets/e7525-memory-controller-hub-datasheet.html
33 static int sysbus_parity = -1;
77 /* E752X register addresses - device 0 function 0 */
103 * 19:18 DRB Granularity 32/64MB
115 /* E752X register addresses - device 0 function 1 */
173 /* 3100 IMCH specific register addresses - device 0 function 1 */
179 /* ICH5R register addresses - device 30 function 0 */
192 * Those chips Support single-rank and dual-rank memories only.
194 * On e752x chips, the odd rows are present only on dual-rank memories.
200 * slot single-ranked double-ranked
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/linux/drivers/dma/lgm/
H A Dlgm-dma.c1 // SPDX-License-Identifier: GPL-2.0
3 * Lightning Mountain centralized DMA controller driver
5 * Copyright (c) 2016 - 2020 Intel Corporation.
10 #include <linux/dma-mapping.h>
23 #include "../virt-dma.h"
25 #define DRIVER_NAME "lgm-dma"
68 #define DMA_MAX_CLASS (SZ_32 - 1)
107 * If header mode is set in DMA descriptor,
112 * If header mode is not set in DMA descriptor,
131 /* DMA controller capability */
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