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/linux/tools/perf/pmu-events/arch/x86/knightslanding/
H A Dpipeline.json197 …RS). This event counts integer divides, x87 divides, divss, divsd, sqrtss, sqrtsd event and does n…
/linux/Documentation/devicetree/bindings/clock/
H A Dnspire-clock.txt15 clock where it divides the rate from.
H A Dmstar,msc313-mpll.yaml15 frequency clock and divides that down into a number of clocks that
/linux/arch/alpha/include/asm/
H A Dtimex.h11 the 32.768kHz reference clock, which nicely divides down to our HZ. */
/linux/Documentation/filesystems/ext4/
H A Dabout.rst25 ext4 divides a storage device into an array of logical blocks both to
/linux/drivers/clk/sunxi/
H A Dclk-sun6i-ar100.c30 /* clock only divides */ in sun6i_get_ar100_factors()
/linux/drivers/iio/gyro/
H A Dmpu3050.h51 * @divisor: base frequency divider: divides 8 or 1 kHz
/linux/drivers/video/fbdev/core/
H A DKconfig205 the standard blitting divides the screen into pixels. Because the
/linux/Documentation/devicetree/bindings/ptp/
H A Dfsl,ptp.yaml61 description: Prescaler, divides the output clock.
/linux/drivers/pwm/
H A Dpwm-visconti.c84 * PWMC controls a divider that divides the input clk by a power of two in visconti_pwm_apply()
/linux/arch/alpha/lib/
H A Ddivide.S119 * 32-bit divides as we can't overflow. Three-bit
H A Dev6-divide.S138 * 32-bit divides as we can't overflow. Three-bit
/linux/Documentation/devicetree/bindings/power/supply/
H A Drohm,bd99954.yaml32 # The BD99954 data sheet divides charging to three phases.
/linux/Documentation/userspace-api/media/v4l/
H A Dfield-order.rst11 Interlaced video divides an image into two fields, containing only the
/linux/Documentation/mm/
H A Dnuma.rst46 Linux divides the system's hardware resources into multiple software
/linux/Documentation/scsi/
H A Daha152x.rst158 63 for sectors and then divides the capacity of the disk by 255*63
/linux/arch/arc/boot/dts/
H A Daxs10x_mb.dtsi56 * controlled via register in SDIO IP. It divides
H A Dhsdk.dts160 * but it divides by 8) SDIO IP uses wrong clock and
/linux/Documentation/networking/
H A Ddccp.rst23 It divides into a base protocol (RFC 4340) and pluggable congestion control
/linux/arch/powerpc/platforms/52xx/
H A Dmpc52xx_gpt.c418 * value of '1' means divide the clock by one. 0xffff divides the in mpc52xx_gpt_do_start()
420 * around and divides by 0x10000. That is why prescale must be in mpc52xx_gpt_do_start()
/linux/Documentation/admin-guide/
H A Dpstore-blk.rst20 divides all configurations into two parts, configurations for user and
/linux/Documentation/scheduler/
H A Dsched-design-CFS.rst222 grouped and divides CPU time fairly among such groups.
/linux/drivers/watchdog/
H A Darmada_37xx_wdt.c175 * prescaler, which divides the clock rate by 2 in armada_37xx_wdt_set_timeout()
/linux/drivers/clk/berlin/
H A Dberlin2-avpll.c323 * are allowed. AV3 != 0 divides by AV2/2, AV3=0 is bypass. in berlin2_avpll_channel_recalc_rate()
/linux/arch/arc/
H A DKconfig448 ARC700 divides the 32 bit phy address space into two equal halves

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