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/freebsd/contrib/llvm-project/compiler-rt/lib/builtins/sparc64/
H A Ddivmod.m410 * divisor -- how many ways to divide it
87 b divide
93 bge divide ! if not, skip this junk
99 bge divide
109 b divide
115 bge divide ! if not, skip this junk
121 bge divide
129 divide:
141 ! as our usual N-at-a-shot divide step will cause overflow and havoc.
174 ! do single-bit divide steps
[all …]
H A Dmodsi3.S9 * divisor -- how many ways to divide it
52 b divide
58 bge divide ! if not, skip this junk
64 bge divide
70 divide: label
82 ! as our usual 4-at-a-shot divide step will cause overflow and havoc.
115 ! do single-bit divide steps
118 ! first divide step without thinking. BUT, the others are conditional,
160 ! Fall through into divide loop
H A Ddivsi3.S9 * divisor -- how many ways to divide it
52 b divide
58 bge divide ! if not, skip this junk
64 bge divide
70 divide: label
82 ! as our usual 4-at-a-shot divide step will cause overflow and havoc.
115 ! do single-bit divide steps
118 ! first divide step without thinking. BUT, the others are conditional,
160 ! Fall through into divide loop
/freebsd/sys/arm/freescale/vybrid/
H A Dvf_ccm.c170 .div_val = 1, /* Divide by 2 */
179 000 Divide by 1 (only if PLL frequency less than or equal to 650 MHz)
180 001 Divide by 4
181 010 Divide by 6
182 011 Divide by 8
183 100 Divide by 10
184 101 Divide by 12
185 110 Divide by 14
186 111 Divide by 16
194 .div_val = 5, /* Divide by 12 */
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DScalarEvolutionDivision.cpp9 // This file defines the class that knows how to divide SCEV's.
55 void SCEVDivision::divide(ScalarEvolution &SE, const SCEV *Numerator, in divide() function in SCEVDivision
88 divide(SE, *Quotient, Op, &Q, &R); in divide()
137 divide(SE, Numerator->getStart(), Denominator, &StartQ, &StartR); in visitAddRecExpr()
138 divide(SE, Numerator->getStepRecurrence(SE), Denominator, &StepQ, &StepR); in visitAddRecExpr()
156 divide(SE, Op, Denominator, &Q, &R); in visitAddExpr()
193 divide(SE, Op, Denominator, &Q, &R); in visitMulExpr()
237 divide(SE, Diff, Denominator, &Q, &R); in visitMulExpr()
249 // We generally do not know how to divide Expr by Denominator. We initialize in SCEVDivision()
250 // the division to a "cannot divide" state to simplify the rest of the code. in SCEVDivision()
/freebsd/lib/libpmc/pmu-events/arch/x86/goldmont/
H A Dfloating-point.json3 "BriefDescription": "Cycles the FP divide unit is busy",
8 "PublicDescription": "Counts core cycles the floating point divide unit is busy.",
23 "BriefDescription": "Floating point divide uops retired. (Precise Event Capable)",
29 "PublicDescription": "Counts the number of floating point divide uops retired.",
/freebsd/lib/libpmc/pmu-events/arch/x86/goldmontplus/
H A Dfloating-point.json3 "BriefDescription": "Cycles the FP divide unit is busy",
10 "PublicDescription": "Counts core cycles the floating point divide unit is busy.",
27 "BriefDescription": "Floating point divide uops retired (Precise Event Capable)",
34 "PublicDescription": "Counts the number of floating point divide uops retired.",
/freebsd/sys/dev/videomode/
H A Dvesagtf.c183 #define DIVIDE(x,y) (((x) + ((y) / 2)) / (y)) macro
254 h_pixels = DIVIDE(h_pixels, CELL_GRAN) * CELL_GRAN; in vesagtf_mode_params()
268 v_lines = (flags & VESAGTF_FLAG_ILACE) ? DIVIDE(v_lines, 2) : v_lines; in vesagtf_mode_params()
296 DIVIDE(v_lines * params->margin_ppt, 1000) : 0; in vesagtf_mode_params()
344 h_period_est = DIVIDE(((DIVIDE(2000000000000ULL, v_field_rqd)) - in vesagtf_mode_params()
358 vsync_plus_bp = DIVIDE(params->min_vsbp * 1000000, h_period_est); in vesagtf_mode_params()
402 v_field_est = DIVIDE(DIVIDE(1000000000000000ULL, h_period_est), in vesagtf_mode_params()
413 h_period = DIVIDE(h_period_est * v_field_est, v_field_rqd * 1000); in vesagtf_mode_params()
429 v_field_rate = DIVIDE(1000000000000ULL, h_period * total_v_lines); in vesagtf_mode_params()
460 DIVIDE(DIVIDE(h_pixels * params->margin_ppt, 1000), in vesagtf_mode_params()
[all …]
H A Dpickmode.c115 #define DIVIDE(x, y) (((x) + ((y) / 2)) / (y)) macro
129 refresh = DIVIDE(DIVIDE((*preferred)->dot_clock * 1000, in sort_modes()
155 refresh = DIVIDE(DIVIDE(mtemp->dot_clock * 1000, in sort_modes()
169 DIVIDE(DIVIDE(modes[i].dot_clock * 1000, in sort_modes()
H A Dedid.c46 #define DIVIDE(x,y) (((x) + ((y) / 2)) / (y)) macro
263 DIVIDE(DIVIDE(edid->edid_modes[i].dot_clock * 1000, in edid_print()
283 DIVIDE(DIVIDE(edid->edid_preferred_mode->dot_clock * 1000, in edid_print()
306 refresh = DIVIDE(DIVIDE(mode->dot_clock * 1000, in edid_search_mode()
311 refresh == DIVIDE(DIVIDE( in edid_search_mode()
/freebsd/sys/contrib/dev/acpica/components/utilities/
H A Dutmath.c159 /* Structures used only for 64-bit divide */
417 * Optional support for 64-bit double-precision integer divide. This code
421 * Support for a more normal 64-bit divide/modulo (with check for a divide-
436 * RETURN: Status (Checks for divide-by-zero)
439 * divide and modulo. The result is a 64-bit quotient and a
463 ACPI_ERROR ((AE_INFO, "Divide by zero")); in AcpiUtShortDivide()
471 * and is generated by the second divide. in AcpiUtShortDivide()
503 * RETURN: Status (Checks for divide-by-zero)
505 * DESCRIPTION: Perform a divide and modulo.
534 ACPI_ERROR ((AE_INFO, "Divide by zero")); in AcpiUtDivide()
[all …]
/freebsd/sys/contrib/openzfs/tests/zfs-tests/tests/functional/channel_program/lua_core/
H A Dtst.divide_by_zero.ksh21 # Divide by zero should fail gracefully.
26 log_assert "Divide by zero should fail gracefully."
30 log_pass "Divide by zero should fail gracefully."
/freebsd/contrib/llvm-project/compiler-rt/lib/ubsan/
H A Dubsan_checks.inc36 UBSAN_CHECK(IntegerDivideByZero, "integer-divide-by-zero",
37 "integer-divide-by-zero")
38 UBSAN_CHECK(FloatDivideByZero, "float-divide-by-zero", "float-divide-by-zero")
/freebsd/contrib/llvm-project/compiler-rt/lib/builtins/i386/
H A Ddivdi3.S12 // No other exceptions are generated, as the divide cannot overflow.
15 // on x86_64. The performance goal is ~40 cycles per divide, which is faster than
26 // This is currently implemented by wrapping the unsigned divide up in an absolute
71 cmpl %ebx, %edx // to avoid overflowing the upcoming divide.
107 subl %ebx, %edx // subtract bhi from ahi so that divide will not
H A Dudivdi3.S12 // No other exceptions are generated, as the divide cannot overflow.
15 // on x86_64. The performance goal is ~40 cycles per divide, which is faster than
42 cmpl %ebx, %edx // to avoid overflowing the upcoming divide.
72 subl %ebx, %edx // subtract bhi from ahi so that divide will not
H A Dumoddi3.S12 // No other exceptions are generated, as the divide cannot overflow.
15 // on x86_64. The performance goal is ~40 cycles per divide, which is faster than
43 cmpl %ebx, %edx // to avoid overflowing the upcoming divide.
77 subl %ebx, %edx // subtract bhi from ahi so that divide will not
H A Dmoddi3.S12 // No other exceptions are generated, as the divide cannot overflow.
15 // on x86_64. The performance goal is ~40 cycles per divide, which is faster than
70 cmpl %ebx, %edx // to avoid overflowing the upcoming divide.
108 subl %ebx, %edx // subtract bhi from ahi so that divide will not
/freebsd/lib/msun/man/
H A Dclog.367 .Bl -column ".Sy +\*(If + I*\*(Na" ".Sy Return value" ".Sy Divide-by-zero exception"
69 .It -0 + I*0 Ta -\*(If + I*\*(Pi Ta Divide-by-zero exception
71 .It +0 + I*0 Ta -\*(If + I*0 Ta Divide by zero exception
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVSchedule.td16 def WriteIDiv : SchedWrite; // 32-bit or 64-bit divide
17 def WriteIDiv32 : SchedWrite; // 32-bit divide on RV64I
52 def WriteFDiv16 : SchedWrite; // 16-bit floating point divide
53 def WriteFDiv32 : SchedWrite; // 32-bit floating point divide
54 def WriteFDiv64 : SchedWrite; // 64-bit floating point divide
168 def ReadFDiv16 : SchedRead; // 16-bit floating point divide
169 def ReadFDiv32 : SchedRead; // 32-bit floating point divide
170 def ReadFDiv64 : SchedRead; // 64-bit floating point divide
/freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DDelinearization.h56 /// 3. Compute the access function: divide the SCEV by the array size
89 /// divide by the GCD and erase constant terms
92 /// divide by GCD -> [n, 2]
98 /// a. Divide {{{0,+,2*m+5}_i, +, n*m}_j, +, n*m}_k by the innermost size m
103 /// b. Divide Quotient: {{{0,+,2}_i, +, n}_j, +, n}_k by next outer size n
H A DScalarEvolutionDivision.h9 // This file defines the class that knows how to divide SCEV's.
30 static void divide(ScalarEvolution &SE, const SCEV *Numerator,
34 // Except in the trivial case described above, we do not know how to divide
/freebsd/sys/kern/
H A Dsubr_pidctrl.c91 /* Fetch gains and prevent divide by zero. */ in pidctrl_classic()
102 /* Divide by inverse gain values to produce output. */ in pidctrl_classic()
134 /* Fetch gains and prevent divide by zero. */ in pidctrl_daemon()
145 /* Divide by inverse gain values to produce output. */ in pidctrl_daemon()
/freebsd/contrib/ntp/html/hints/
H A Dsolaris.xtra.40958495 Synopsis: time_constant value >6 with PLL in use leads to integer divide
9 is in use, the system will take a "integer divide zero trap" panic in
69 is in use, the system will take a "integer divide zero trap" panic in
/freebsd/contrib/llvm-project/llvm/include/llvm/Transforms/Utils/
H A DIntegerDivision.h34 /// Generate code to divide two integers, replacing Div with the generated
57 /// Generate code to divide two integers, replacing Div with the generated
64 /// Generate code to divide two integers, replacing Div with the generated
/freebsd/lib/libpmc/pmu-events/arch/x86/amdzen1/
H A Dfloating-point.json87 "BriefDescription": "Divide and square root Ops.",
88 …ave retired. The number of events logged per cycle can vary from 0 to 8. Divide and square root Op…
122 "BriefDescription": "Double precision divide/square root FLOPS.",
123 …e can vary from 0 to 64. This event can count above 15. Double precision divide/square root FLOPS.…
150 "BriefDescription": "Single-precision divide/square root FLOPS.",
151 …e can vary from 0 to 64. This event can count above 15. Single-precision divide/square root FLOPS.…

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