Searched full:dispcc0 (Results 1 – 4 of 4) sorted by relevance
| /linux/Documentation/devicetree/bindings/display/msm/ |
| H A D | qcom,sc8280xp-mdss.yaml | 68 power-domains = <&dispcc0 MDSS_GDSC>;
71 <&dispcc0 DISP_CC_MDSS_AHB_CLK>,
72 <&dispcc0 DISP_CC_MDSS_MDP_CLK>;
77 resets = <&dispcc0 DISP_CC_MDSS_CORE_BCR>;
101 <&dispcc0 DISP_CC_MDSS_AHB_CLK>,
102 <&dispcc0 DISP_CC_MDSS_MDP_LUT_CLK>,
103 <&dispcc0 DISP_CC_MDSS_MDP_CLK>,
104 <&dispcc0 DISP_CC_MDSS_VSYNC_CLK>;
112 assigned-clocks = <&dispcc0 DISP_CC_MDSS_VSYNC_CLK>;
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| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | qcom,sa8775p-dispcc.yaml | 21 - qcom,sa8775p-dispcc0
60 compatible = "qcom,sa8775p-dispcc0";
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| H A D | qcom,dispcc-sc8280xp.yaml | 22 - qcom,sc8280xp-dispcc0
63 compatible = "qcom,sc8280xp-dispcc0";
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| /linux/drivers/clk/qcom/ |
| H A D | Makefile | 99 obj-$(CONFIG_SA_DISPCC_8775P) += dispcc0-sa8775p.o dispcc1-sa8775p.o
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