Searched full:dispcc0 (Results 1 – 14 of 14) sorted by relevance
| /freebsd/sys/contrib/device-tree/Bindings/display/msm/ |
| H A D | qcom,sc8280xp-mdss.yaml | 68 power-domains = <&dispcc0 MDSS_GDSC>; 71 <&dispcc0 DISP_CC_MDSS_AHB_CLK>, 72 <&dispcc0 DISP_CC_MDSS_MDP_CLK>; 77 resets = <&dispcc0 DISP_CC_MDSS_CORE_BCR>; 101 <&dispcc0 DISP_CC_MDSS_AHB_CLK>, 102 <&dispcc0 DISP_CC_MDSS_MDP_LUT_CLK>, 103 <&dispcc0 DISP_CC_MDSS_MDP_CLK>, 104 <&dispcc0 DISP_CC_MDSS_VSYNC_CLK>; 112 assigned-clocks = <&dispcc0 DISP_CC_MDSS_VSYNC_CLK>;
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| H A D | qcom,sc8280xp-dpu.yaml | 67 <&dispcc0 DISP_CC_MDSS_AHB_CLK>, 68 <&dispcc0 DISP_CC_MDSS_MDP_LUT_CLK>, 69 <&dispcc0 DISP_CC_MDSS_MDP_CLK>, 70 <&dispcc0 DISP_CC_MDSS_VSYNC_CLK>; 78 assigned-clocks = <&dispcc0 DISP_CC_MDSS_MDP_CLK>, 79 <&dispcc0 DISP_CC_MDSS_VSYNC_CLK>;
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| H A D | qcom,sa8775p-mdss.yaml | 202 clocks = <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_AUX_CLK>, 203 <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>;
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| /freebsd/sys/contrib/device-tree/Bindings/clock/ |
| H A D | qcom,sa8775p-dispcc.yaml | 21 - qcom,sa8775p-dispcc0 60 compatible = "qcom,sa8775p-dispcc0";
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| H A D | qcom,dispcc-sc8280xp.yaml | 22 - qcom,sc8280xp-dispcc0 63 compatible = "qcom,sc8280xp-dispcc0";
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| /freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
| H A D | sc8280xp.dtsi | 4219 <&dispcc0 DISP_CC_MDSS_AHB_CLK>, 4220 <&dispcc0 DISP_CC_MDSS_MDP_CLK>; 4229 power-domains = <&dispcc0 MDSS_GDSC>; 4230 resets = <&dispcc0 DISP_CC_MDSS_CORE_BCR>; 4248 <&dispcc0 DISP_CC_MDSS_AHB_CLK>, 4249 <&dispcc0 DISP_CC_MDSS_MDP_LUT_CLK>, 4250 <&dispcc0 DISP_CC_MDSS_MDP_CLK>, 4251 <&dispcc0 DISP_CC_MDSS_VSYNC_CLK>; 4262 assigned-clocks = <&dispcc0 DISP_CC_MDSS_VSYNC_CLK>; 4337 clocks = <&dispcc0 DISP_CC_MDSS_AHB_CLK>, [all …]
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| H A D | sa8775p.dtsi | 4377 resets = <&dispcc0 MDSS_DISP_CC_MDSS_CORE_BCR>; 4379 power-domains = <&dispcc0 MDSS_DISP_CC_MDSS_CORE_GDSC>; 4381 clocks = <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>, 4383 <&dispcc0 MDSS_DISP_CC_MDSS_MDP_CLK>; 4404 <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>, 4405 <&dispcc0 MDSS_DISP_CC_MDSS_MDP_LUT_CLK>, 4406 <&dispcc0 MDSS_DISP_CC_MDSS_MDP_CLK>, 4407 <&dispcc0 MDSS_DISP_CC_MDSS_VSYNC_CLK>; 4414 assigned-clocks = <&dispcc0 MDSS_DISP_CC_MDSS_VSYNC_CLK>; 4493 clocks = <&dispcc0 MDSS_DISP_CC_MDSS_BYTE0_CLK>, [all …]
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| H A D | sa8295p-adp.dts | 309 &dispcc0 {
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| H A D | sc8280xp-microsoft-arcata.dts | 443 &dispcc0 {
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| H A D | sc8280xp-crd.dts | 494 &dispcc0 {
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| H A D | sc8280xp-microsoft-blackrock.dts | 564 &dispcc0 {
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| H A D | sc8280xp-huawei-gaokun3.dts | 585 &dispcc0 {
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| H A D | sc8280xp-lenovo-thinkpad-x13s.dts | 707 &dispcc0 {
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| H A D | qcs8300.dtsi | 4312 compatible = "qcom,sa8775p-dispcc0";
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