Searched +full:dispcc +full:- +full:sm6125 (Results 1 – 8 of 8) sorted by relevance
/linux/Documentation/devicetree/bindings/display/msm/ |
H A D | qcom,sm6125-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6125-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm SM6125 Display MDSS 10 - Marijn Suijten <marijn.suijten@somainline.org> 13 SM6125 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks 16 $ref: /schemas/display/msm/mdss-common.yaml# 20 const: qcom,sm6125-mdss 24 - description: Display AHB clock from gcc [all …]
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H A D | qcom,sc7180-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sc7180-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 12 $ref: /schemas/display/msm/dpu-common.yaml# 17 - qcom,sc7180-dpu 18 - qcom,sm6125-dpu 19 - qcom,sm6350-dpu 20 - qcom,sm6375-dpu [all …]
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H A D | dsi-controller-main.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 15 - items: 16 - enum: 17 - qcom,apq8064-dsi-ctrl 18 - qcom,msm8226-dsi-ctrl 19 - qcom,msm8916-dsi-ctrl [all …]
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H A D | dsi-phy-14nm.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-14nm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 13 - $ref: dsi-phy-common.yaml# 18 - qcom,dsi-phy-14nm 19 - qcom,dsi-phy-14nm-2290 20 - qcom,dsi-phy-14nm-660 21 - qcom,dsi-phy-14nm-8953 [all …]
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/linux/Documentation/devicetree/bindings/clock/ |
H A D | qcom,dispcc-sm6125.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,dispcc-sm6125.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Display Clock Controller on SM6125 10 - Martin Botka <martin.botka@somainline.org> 14 on SM6125. 16 See also:: include/dt-bindings/clock/qcom,dispcc-sm6125.h 21 - qcom,sm6125-dispcc 25 - description: Board XO source [all …]
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/linux/arch/arm64/boot/dts/qcom/ |
H A D | sm6125.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/clock/qcom,dispcc-sm6125.h> 7 #include <dt-bindings/clock/qcom,gcc-sm6125.h> 8 #include <dt-bindings/clock/qcom,rpmcc.h> 9 #include <dt-bindings/dma/qcom-gpi.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/power/qcom-rpmpd.h> 15 interrupt-parent = <&intc>; 16 #address-cells = <2>; [all …]
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/linux/drivers/clk/qcom/ |
H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o 4 clk-qcom-y += common.o 5 clk-qcom-y += clk-regmap.o 6 clk-qcom-y += clk-alpha-pll.o 7 clk-qcom-y += clk-pll.o 8 clk-qcom-y += clk-rcg.o 9 clk-qcom-y += clk-rcg2.o 10 clk-qcom-y += clk-branch.o 11 clk-qcom-y += clk-regmap-divider.o [all …]
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H A D | dispcc-sm6125.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include <linux/clk-provider.h> 11 #include <dt-bindings/clock/qcom,dispcc-sm6125.h> 13 #include "clk-alpha-pll.h" 14 #include "clk-branch.h" 15 #include "clk-rcg.h" 16 #include "clk-regmap.h" 670 { .compatible = "qcom,sm6125-dispcc" }, 685 return qcom_cc_really_probe(&pdev->dev, &disp_cc_sm6125_desc, regmap); in disp_cc_sm6125_probe() 691 .name = "disp_cc-sm6125", [all …]
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