Searched full:disp_cc_mdss_vsync_clk (Results 1 – 25 of 54) sorted by relevance
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| /linux/Documentation/devicetree/bindings/display/msm/ |
| H A D | qcom,sc8280xp-mdss.yaml | 104 <&dispcc0 DISP_CC_MDSS_VSYNC_CLK>;
112 assigned-clocks = <&dispcc0 DISP_CC_MDSS_VSYNC_CLK>;
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| H A D | qcom,sm6125-mdss.yaml | 122 <&dispcc DISP_CC_MDSS_VSYNC_CLK>,
131 assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
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| H A D | qcom,sm6375-mdss.yaml | 116 <&dispcc DISP_CC_MDSS_VSYNC_CLK>,
126 assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
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| H A D | qcom,sm6350-mdss.yaml | 125 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
130 <&dispcc DISP_CC_MDSS_VSYNC_CLK>,
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| H A D | qcom,sm8250-mdss.yaml | 133 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
136 assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
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| H A D | qcom,sm8150-mdss.yaml | 130 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
133 assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
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| H A D | qcom,sm8450-mdss.yaml | 132 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
140 assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
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| H A D | qcom,sm6115-dpu.yaml | 72 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
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| /linux/include/dt-bindings/clock/ |
| H A D | qcom,sm6115-dispcc.h | 28 #define DISP_CC_MDSS_VSYNC_CLK 18 macro
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| H A D | qcom,dispcc-qcm2290.h | 25 #define DISP_CC_MDSS_VSYNC_CLK 15 macro
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| H A D | qcom,sm6375-dispcc.h | 30 #define DISP_CC_MDSS_VSYNC_CLK 19 macro
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| H A D | qcom,dispcc-sm6125.h | 34 #define DISP_CC_MDSS_VSYNC_CLK 25 macro
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| H A D | qcom,dispcc-sc7180.h | 39 #define DISP_CC_MDSS_VSYNC_CLK 30 macro
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| H A D | qcom,dispcc-sm6350.h | 40 #define DISP_CC_MDSS_VSYNC_CLK 29 macro
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| H A D | qcom,sm4450-dispcc.h | 33 #define DISP_CC_MDSS_VSYNC_CLK 23 macro
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| H A D | qcom,dispcc-sc7280.h | 47 #define DISP_CC_MDSS_VSYNC_CLK 37 macro
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| H A D | qcom,dispcc-sdm845.h | 33 #define DISP_CC_MDSS_VSYNC_CLK 23 macro
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| H A D | qcom,dispcc-sm8350.h | 54 #define DISP_CC_MDSS_VSYNC_CLK 44 macro
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| H A D | qcom,dispcc-sm8250.h | 54 #define DISP_CC_MDSS_VSYNC_CLK 44 macro
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| H A D | qcom,dispcc-sm8150.h | 54 #define DISP_CC_MDSS_VSYNC_CLK 44 macro
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| H A D | qcom,x1e80100-dispcc.h | 80 #define DISP_CC_MDSS_VSYNC_CLK 70 macro
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| H A D | qcom,sm8550-dispcc.h | 83 #define DISP_CC_MDSS_VSYNC_CLK 73 macro
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| H A D | qcom,sm8450-dispcc.h | 85 #define DISP_CC_MDSS_VSYNC_CLK 75 macro
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| H A D | qcom,dispcc-sc8280xp.h | 85 #define DISP_CC_MDSS_VSYNC_CLK 75 macro
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| /linux/drivers/clk/qcom/ |
| H A D | dispcc-sm6350.c | 637 static struct clk_branch disp_cc_mdss_vsync_clk = { variable
644 .name = "disp_cc_mdss_vsync_clk",
724 [DISP_CC_MDSS_VSYNC_CLK] = &disp_cc_mdss_vsync_clk.clkr,
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