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/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dqcom,dispcc-qcm2290.h23 #define DISP_CC_MDSS_PCLK0_CLK 13 macro
H A Dqcom,sm6115-dispcc.h24 #define DISP_CC_MDSS_PCLK0_CLK 14 macro
H A Dqcom,dispcc-sm6125.h30 #define DISP_CC_MDSS_PCLK0_CLK 21 macro
H A Dqcom,sm6375-dispcc.h24 #define DISP_CC_MDSS_PCLK0_CLK 13 macro
H A Dqcom,dispcc-sc7180.h33 #define DISP_CC_MDSS_PCLK0_CLK 24 macro
H A Dqcom,dispcc-sm6350.h34 #define DISP_CC_MDSS_PCLK0_CLK 23 macro
H A Dqcom,sm4450-dispcc.h25 #define DISP_CC_MDSS_PCLK0_CLK 15 macro
H A Dqcom,dispcc-sc7280.h41 #define DISP_CC_MDSS_PCLK0_CLK 31 macro
H A Dqcom,dispcc-sdm845.h25 #define DISP_CC_MDSS_PCLK0_CLK 15 macro
H A Dqcom,qcs615-dispcc.h34 #define DISP_CC_MDSS_PCLK0_CLK 24 macro
H A Dqcom,milos-dispcc.h40 #define DISP_CC_MDSS_PCLK0_CLK 29 macro
H A Dqcom,dispcc-sm8150.h46 #define DISP_CC_MDSS_PCLK0_CLK 36 macro
H A Dqcom,dispcc-sm8250.h46 #define DISP_CC_MDSS_PCLK0_CLK 36 macro
H A Dqcom,dispcc-sm8350.h46 #define DISP_CC_MDSS_PCLK0_CLK 36 macro
H A Dqcom,x1e80100-dispcc.h73 #define DISP_CC_MDSS_PCLK0_CLK 63 macro
H A Dqcom,dispcc-sc8280xp.h75 #define DISP_CC_MDSS_PCLK0_CLK 65 macro
H A Dqcom,sm8450-dispcc.h75 #define DISP_CC_MDSS_PCLK0_CLK 65 macro
H A Dqcom,sm8550-dispcc.h76 #define DISP_CC_MDSS_PCLK0_CLK 66 macro
H A Dqcom,sm8650-dispcc.h76 #define DISP_CC_MDSS_PCLK0_CLK 66 macro
H A Dqcom,sm8750-dispcc.h82 #define DISP_CC_MDSS_PCLK0_CLK 70 macro
/freebsd/sys/contrib/device-tree/Bindings/display/msm/
H A Dqcom,qcm2290-mdss.yaml157 <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
H A Dqcom,sm6115-mdss.yaml148 <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
H A Dqcom,sm6375-mdss.yaml158 <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
H A Dqcom,sm6350-mdss.yaml166 <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
H A Dqcom,sm8350-mdss.yaml204 <&dispcc DISP_CC_MDSS_PCLK0_CLK>,

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