| /linux/drivers/clk/qcom/ |
| H A D | dispcc-sm6350.c | 153 static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = { variable
159 .name = "disp_cc_mdss_byte0_clk_src",
174 &disp_cc_mdss_byte0_clk_src.clkr.hw,
376 &disp_cc_mdss_byte0_clk_src.clkr.hw,
698 [DISP_CC_MDSS_BYTE0_CLK_SRC] = &disp_cc_mdss_byte0_clk_src.clkr,
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| H A D | dispcc-sc7280.c | 165 static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = { variable
171 .name = "disp_cc_mdss_byte0_clk_src",
364 &disp_cc_mdss_byte0_clk_src.clkr.hw,
426 &disp_cc_mdss_byte0_clk_src.clkr.hw,
806 [DISP_CC_MDSS_BYTE0_CLK_SRC] = &disp_cc_mdss_byte0_clk_src.clkr,
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| H A D | dispcc-milos.c | 198 static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = { variable
204 .name = "disp_cc_mdss_byte0_clk_src",
394 &disp_cc_mdss_byte0_clk_src.clkr.hw,
480 &disp_cc_mdss_byte0_clk_src.clkr.hw,
861 [DISP_CC_MDSS_BYTE0_CLK_SRC] = &disp_cc_mdss_byte0_clk_src.clkr,
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| H A D | dispcc-x1e80100.c | 273 static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = { variable
280 .name = "disp_cc_mdss_byte0_clk_src",
674 &disp_cc_mdss_byte0_clk_src.clkr.hw,
820 &disp_cc_mdss_byte0_clk_src.clkr.hw,
1543 [DISP_CC_MDSS_BYTE0_CLK_SRC] = &disp_cc_mdss_byte0_clk_src.clkr,
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| H A D | dispcc-glymur.c | 322 static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = { variable
328 .name = "disp_cc_mdss_byte0_clk_src",
747 &disp_cc_mdss_byte0_clk_src.clkr.hw,
989 &disp_cc_mdss_byte0_clk_src.clkr.hw,
1824 [DISP_CC_MDSS_BYTE0_CLK_SRC] = &disp_cc_mdss_byte0_clk_src.clkr,
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| /linux/include/dt-bindings/clock/ |
| H A D | qcom,sm6115-dispcc.h | 15 #define DISP_CC_MDSS_BYTE0_CLK_SRC 5 macro
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| H A D | qcom,dispcc-qcm2290.h | 14 #define DISP_CC_MDSS_BYTE0_CLK_SRC 4 macro
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| H A D | qcom,sm6375-dispcc.h | 15 #define DISP_CC_MDSS_BYTE0_CLK_SRC 4 macro
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| H A D | qcom,dispcc-sm6125.h | 13 #define DISP_CC_MDSS_BYTE0_CLK_SRC 4 macro
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| H A D | qcom,dispcc-sc7180.h | 14 #define DISP_CC_MDSS_BYTE0_CLK_SRC 5 macro
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| H A D | qcom,dispcc-sm6350.h | 15 #define DISP_CC_MDSS_BYTE0_CLK_SRC 4 macro
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| H A D | qcom,sm4450-dispcc.h | 14 #define DISP_CC_MDSS_BYTE0_CLK_SRC 4 macro
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| H A D | qcom,dispcc-sdm845.h | 13 #define DISP_CC_MDSS_BYTE0_CLK_SRC 3 macro
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| H A D | qcom,dispcc-sc7280.h | 14 #define DISP_CC_MDSS_BYTE0_CLK_SRC 4 macro
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| H A D | qcom,dispcc-sm8350.h | 13 #define DISP_CC_MDSS_BYTE0_CLK_SRC 3 macro
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| H A D | qcom,dispcc-sm8250.h | 13 #define DISP_CC_MDSS_BYTE0_CLK_SRC 3 macro
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| H A D | qcom,dispcc-sm8150.h | 13 #define DISP_CC_MDSS_BYTE0_CLK_SRC 3 macro
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| H A D | qcom,x1e80100-dispcc.h | 15 #define DISP_CC_MDSS_BYTE0_CLK_SRC 5 macro
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| H A D | qcom,sm8550-dispcc.h | 15 #define DISP_CC_MDSS_BYTE0_CLK_SRC 5 macro
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| H A D | qcom,sm8450-dispcc.h | 14 #define DISP_CC_MDSS_BYTE0_CLK_SRC 4 macro
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| H A D | qcom,dispcc-sc8280xp.h | 18 #define DISP_CC_MDSS_BYTE0_CLK_SRC 8 macro
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| H A D | qcom,glymur-dispcc.h | 19 #define DISP_CC_MDSS_BYTE0_CLK_SRC 9 macro
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| /linux/Documentation/devicetree/bindings/display/msm/ |
| H A D | qcom,qcm2290-mdss.yaml | 167 … assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
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| H A D | qcom,sm6125-mdss.yaml | 170 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>,
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| H A D | qcom,sm6115-mdss.yaml | 158 … assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
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