Searched full:disp_cc_mdss_byte0_clk_src (Results 1 – 25 of 49) sorted by relevance
12
| /freebsd/sys/contrib/device-tree/include/dt-bindings/clock/ |
| H A D | qcom,dispcc-qcm2290.h | 14 #define DISP_CC_MDSS_BYTE0_CLK_SRC 4 macro
|
| H A D | qcom,sm6115-dispcc.h | 15 #define DISP_CC_MDSS_BYTE0_CLK_SRC 5 macro
|
| H A D | qcom,dispcc-sm6125.h | 13 #define DISP_CC_MDSS_BYTE0_CLK_SRC 4 macro
|
| H A D | qcom,sm6375-dispcc.h | 15 #define DISP_CC_MDSS_BYTE0_CLK_SRC 4 macro
|
| H A D | qcom,dispcc-sc7180.h | 14 #define DISP_CC_MDSS_BYTE0_CLK_SRC 5 macro
|
| H A D | qcom,dispcc-sm6350.h | 15 #define DISP_CC_MDSS_BYTE0_CLK_SRC 4 macro
|
| H A D | qcom,sm4450-dispcc.h | 14 #define DISP_CC_MDSS_BYTE0_CLK_SRC 4 macro
|
| H A D | qcom,dispcc-sc7280.h | 14 #define DISP_CC_MDSS_BYTE0_CLK_SRC 4 macro
|
| H A D | qcom,dispcc-sdm845.h | 13 #define DISP_CC_MDSS_BYTE0_CLK_SRC 3 macro
|
| H A D | qcom,qcs615-dispcc.h | 13 #define DISP_CC_MDSS_BYTE0_CLK_SRC 3 macro
|
| H A D | qcom,milos-dispcc.h | 17 #define DISP_CC_MDSS_BYTE0_CLK_SRC 6 macro
|
| H A D | qcom,dispcc-sm8150.h | 13 #define DISP_CC_MDSS_BYTE0_CLK_SRC 3 macro
|
| H A D | qcom,dispcc-sm8250.h | 13 #define DISP_CC_MDSS_BYTE0_CLK_SRC 3 macro
|
| H A D | qcom,dispcc-sm8350.h | 13 #define DISP_CC_MDSS_BYTE0_CLK_SRC 3 macro
|
| H A D | qcom,x1e80100-dispcc.h | 15 #define DISP_CC_MDSS_BYTE0_CLK_SRC 5 macro
|
| H A D | qcom,dispcc-sc8280xp.h | 18 #define DISP_CC_MDSS_BYTE0_CLK_SRC 8 macro
|
| H A D | qcom,sm8450-dispcc.h | 14 #define DISP_CC_MDSS_BYTE0_CLK_SRC 4 macro
|
| H A D | qcom,sm8550-dispcc.h | 15 #define DISP_CC_MDSS_BYTE0_CLK_SRC 5 macro
|
| H A D | qcom,sm8650-dispcc.h | 15 #define DISP_CC_MDSS_BYTE0_CLK_SRC 5 macro
|
| H A D | qcom,sm8750-dispcc.h | 21 #define DISP_CC_MDSS_BYTE0_CLK_SRC 9 macro
|
| /freebsd/sys/contrib/device-tree/Bindings/display/msm/ |
| H A D | qcom,qcm2290-mdss.yaml | 167 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
|
| H A D | qcom,sm6115-mdss.yaml | 158 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
|
| H A D | qcom,sm6375-mdss.yaml | 169 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>,
|
| H A D | qcom,sm6350-mdss.yaml | 177 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>,
|
| H A D | qcom,sm8350-mdss.yaml | 215 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>,
|
12