Home
last modified time | relevance | path

Searched full:disp_cc_mdss_byte0_clk (Results 1 – 25 of 47) sorted by relevance

12

/linux/include/dt-bindings/clock/
H A Dqcom,sm6115-dispcc.h14 #define DISP_CC_MDSS_BYTE0_CLK 4 macro
H A Dqcom,dispcc-qcm2290.h13 #define DISP_CC_MDSS_BYTE0_CLK 3 macro
H A Dqcom,sm6375-dispcc.h14 #define DISP_CC_MDSS_BYTE0_CLK 3 macro
H A Dqcom,dispcc-sm6125.h12 #define DISP_CC_MDSS_BYTE0_CLK 3 macro
H A Dqcom,dispcc-sc7180.h13 #define DISP_CC_MDSS_BYTE0_CLK 4 macro
H A Dqcom,dispcc-sm6350.h14 #define DISP_CC_MDSS_BYTE0_CLK 3 macro
H A Dqcom,sm4450-dispcc.h13 #define DISP_CC_MDSS_BYTE0_CLK 3 macro
H A Dqcom,dispcc-sc7280.h13 #define DISP_CC_MDSS_BYTE0_CLK 3 macro
H A Dqcom,dispcc-sdm845.h12 #define DISP_CC_MDSS_BYTE0_CLK 2 macro
H A Dqcom,dispcc-sm8350.h12 #define DISP_CC_MDSS_BYTE0_CLK 2 macro
H A Dqcom,dispcc-sm8250.h12 #define DISP_CC_MDSS_BYTE0_CLK 2 macro
H A Dqcom,dispcc-sm8150.h12 #define DISP_CC_MDSS_BYTE0_CLK 2 macro
H A Dqcom,x1e80100-dispcc.h14 #define DISP_CC_MDSS_BYTE0_CLK 4 macro
H A Dqcom,sm8550-dispcc.h14 #define DISP_CC_MDSS_BYTE0_CLK 4 macro
H A Dqcom,sm8450-dispcc.h13 #define DISP_CC_MDSS_BYTE0_CLK 3 macro
H A Dqcom,dispcc-sc8280xp.h17 #define DISP_CC_MDSS_BYTE0_CLK 7 macro
/linux/drivers/clk/qcom/
H A Ddispcc-sm6350.c367 static struct clk_branch disp_cc_mdss_byte0_clk = { variable
374 .name = "disp_cc_mdss_byte0_clk",
697 [DISP_CC_MDSS_BYTE0_CLK] = &disp_cc_mdss_byte0_clk.clkr,
H A Ddispcc-x1e80100.c811 static struct clk_branch disp_cc_mdss_byte0_clk = { variable
818 .name = "disp_cc_mdss_byte0_clk",
1542 [DISP_CC_MDSS_BYTE0_CLK] = &disp_cc_mdss_byte0_clk.clkr,
/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,qcm2290-mdss.yaml155 clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
H A Dqcom,sm6125-mdss.yaml158 clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
H A Dqcom,sm6115-mdss.yaml146 clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
H A Dqcom,sm6375-mdss.yaml156 clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
H A Dqcom,sm6350-mdss.yaml164 clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
H A Dqcom,sdm670-mdss.yaml160 clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
H A Dqcom,sdm845-mdss.yaml156 clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,

12