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Searched +full:disp +full:- +full:sysreg (Results 1 – 11 of 11) sorted by relevance

/linux/Documentation/devicetree/bindings/phy/
H A Dsamsung,mipi-video-phy.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/samsung,mipi-video-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Marek Szyprowski <m.szyprowski@samsung.com>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
15 For samsung,s5pv210-mipi-video-phy compatible PHYs the second cell in the
17 0 - MIPI CSIS 0,
18 1 - MIPI DSIM 0,
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/linux/Documentation/devicetree/bindings/soc/samsung/
H A Dsamsung,exynos-sysreg.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/soc/samsung/samsung,exynos-sysreg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos SoC series System Registers (SYSREG)
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 - items:
16 - enum:
17 - google,gs101-apm-sysreg
18 - google,gs101-hsi2-sysreg
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/linux/Documentation/devicetree/bindings/display/samsung/
H A Dsamsung,exynos5433-decon.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos5433-decon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Inki Dae <inki.dae@samsung.com>
11 - Seung-Woo Kim <sw0312.kim@samsung.com>
12 - Kyungmin Park <kyungmin.park@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
23 - samsung,exynos5433-decon
24 - samsung,exynos5433-decon-tv
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H A Dsamsung,exynos-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Inki Dae <inki.dae@samsung.com>
11 - Seung-Woo Kim <sw0312.kim@samsung.com>
12 - Kyungmin Park <kyungmin.park@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
18 - samsung,exynos4210-hdmi
19 - samsung,exynos4212-hdmi
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/linux/arch/arm64/boot/dts/exynos/
H A Dexynos5433.dtsi1 // SPDX-License-Identifier: GPL-2.0
16 #include <dt-bindings/clock/exynos5433.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
21 #address-cells = <2>;
22 #size-cells = <2>;
24 interrupt-parent = <&gic>;
26 arm-a53-pmu {
27 compatible = "arm,cortex-a53-pmu";
32 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
35 arm-a57-pmu {
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/linux/drivers/phy/samsung/
H A Dphy-exynos-mipi-video.c1 // SPDX-License-Identifier: GPL-2.0-only
18 #include <linux/soc/samsung/exynos-regs-pmu.h>
22 EXYNOS_MIPI_PHY_ID_NONE = -1,
160 "samsung,pmu-syscon",
161 "samsung,disp-sysreg",
162 "samsung,cam0-sysreg",
163 "samsung,cam1-sysreg"
230 struct regmap *enable_map = state->regmaps[data->enable_map]; in __set_phy_state()
231 struct regmap *resetn_map = state->regmaps[data->resetn_map]; in __set_phy_state()
233 spin_lock(&state->slock); in __set_phy_state()
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/linux/drivers/gpu/drm/exynos/
H A Dexynos_drm_mic.c1 // SPDX-License-Identifier: GPL-2.0-only
31 /* Sysreg registers for MIC */
99 struct regmap *sysreg; member
114 ret = regmap_read(mic->sysreg, DSD_CFG_MUX, &val); in mic_set_path()
116 DRM_DEV_ERROR(mic->dev, in mic_set_path()
122 if (mic->i80_mode) in mic_set_path()
131 ret = regmap_write(mic->sysreg, DSD_CFG_MUX, val); in mic_set_path()
133 DRM_DEV_ERROR(mic->dev, in mic_set_path()
142 writel(MIC_SW_RST, mic->reg + MIC_OP); in mic_sw_reset()
144 while (retry-- > 0) { in mic_sw_reset()
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H A Dexynos5433_drm_decon.c1 // SPDX-License-Identifier: GPL-2.0-only
29 #include "regs-decon5433.h"
64 struct regmap *sysreg; member
99 val = (val & mask) | (readl(ctx->addr + reg) & ~mask); in decon_set_bits()
100 writel(val, ctx->addr + reg); in decon_set_bits()
105 struct decon_context *ctx = crtc->ctx; in decon_enable_vblank()
109 if (crtc->i80_mode) in decon_enable_vblank()
114 writel(val, ctx->addr + DECON_VIDINTCON0); in decon_enable_vblank()
116 enable_irq(ctx->irq); in decon_enable_vblank()
117 if (!(ctx->out_type & I80_HW_TRG)) in decon_enable_vblank()
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/linux/arch/arm/boot/dts/samsung/
H A Dexynos5420.dtsi1 // SPDX-License-Identifier: GPL-2.0
14 #include <dt-bindings/clock/exynos5420.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
37 bus_disp1: bus-disp1 {
38 compatible = "samsung,exynos-bus";
40 clock-names = "bus";
44 bus_disp1_fimd: bus-disp1-fimd {
45 compatible = "samsung,exynos-bus";
47 clock-names = "bus";
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/linux/drivers/clk/samsung/
H A Dclk-exynos5420.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <dt-bindings/clock/exynos5420.h>
12 #include <linux/clk-provider.h>
18 #include "clk-cpu.h"
19 #include "clk-exynos5-subcmu.h"
897 /* Audio - I2S */
904 /* SPI Pre-Ratio */
1113 GATE(CLK_SYSREG, "sysreg", "aclk66_psgen",
1336 .pd_name = "DISP",
1438 PLL_36XX_RATE(24 * MHZ, 393216003U, 197, 3, 2, -25690),
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H A Dclk-exynos5433.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/clk-provider.h>
17 #include <dt-bindings/clock/exynos5433.h>
20 #include "clk-cpu.h"
21 #include "clk-exynos-arm64.h"
22 #include "clk-pll.h"
792 PLL_36XX_RATE(24 * MHZ, 393216003U, 197, 3, 2, -25690),
794 PLL_36XX_RATE(24 * MHZ, 368639991U, 246, 4, 2, -15729),
795 PLL_36XX_RATE(24 * MHZ, 361507202U, 181, 3, 2, -16148),
796 PLL_36XX_RATE(24 * MHZ, 338687988U, 113, 2, 2, -6816),
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