/freebsd/sys/contrib/device-tree/Bindings/phy/ |
H A D | nvidia,tegra124-xusb-padctl.txt | 11 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or 12 super-speed USB. Other lanes are for various types of low-speed, full-speed 13 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller 14 contains a software-configurable mux that sits between the I/O controller 15 ports (e.g. PCIe) and the lanes. 17 In addition to per-lane configuration, USB 3.0 ports may require additional 18 settings on a per-board basis. 20 Pads will be represented as children of the top-level XUSB pad controller 23 PHY bindings, as described by the phy-bindings.txt file in this directory. 26 pad controller and the XUSB controller as "ports". This is confusing since [all …]
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H A D | nvidia,tegra124-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra124-xusb-padctl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or 22 super-speed USB. Other lanes are for various types of low-speed, full-speed 23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller 24 contains a software-configurable mux that sits between the I/O controller [all …]
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H A D | nvidia,tegra186-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra186-xusb-padctl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or 22 super-speed USB. Other lanes are for various types of low-speed, full-speed 23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller 24 contains a software-configurable mux that sits between the I/O controller [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/renesas/ |
H A D | r8a779a0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car V3U (R8A779A0) SoC 8 #include <dt-bindings/clock/r8a779a0-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a779a0-sysc.h> 14 #address-cells = <2>; 15 #size-cells = <2>; 17 /* External CAN clock - to be overridden by boards that provide it */ 19 compatible = "fixed-clock"; 20 #clock-cells = <0>; [all …]
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H A D | r8a779h0.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 * Device Tree Source for the R-Car V4M (R8A779H0) SoC 8 #include <dt-bindings/clock/renesas,r8a779h0-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/renesas,r8a779h0-sysc.h> 14 #address-cells = <2>; 15 #size-cells = <2>; 17 /* External Audio clock - to be overridden by boards that provide it */ 19 compatible = "fixed-clock"; 20 #clock-cells = <0>; [all …]
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H A D | condor-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the Condor board with R-Car V3H 8 #include <dt-bindings/gpio/gpio.h> 23 stdout-path = "serial0:115200n8"; 27 d1_8v: regulator-2 { 28 compatible = "regulator-fixed"; 29 regulator-name = "D1.8V"; 30 regulator-min-microvolt = <1800000>; 31 regulator-max-microvolt = <1800000>; 32 regulator-boot-on; [all …]
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H A D | r8a779g0.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 * Device Tree Source for the R-Car V4H (R8A779G0) SoC 8 #include <dt-bindings/clock/r8a779g0-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a779g0-sysc.h> 14 #address-cells = <2>; 15 #size-cells = <2>; 17 /* External Audio clock - to be overridden by boards that provide it */ 19 compatible = "fixed-clock"; 20 #clock-cells = <0>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/xilinx/ |
H A D | zynq-7000.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2011 - 2014 Xilinx 7 #address-cells = <1>; 8 #size-cells = <1>; 9 compatible = "xlnx,zynq-7000"; 12 #address-cells = <1>; 13 #size-cells = <0>; 16 compatible = "arm,cortex-a9"; 20 clock-latency = <1000>; 21 cpu0-supply = <®ulator_vccpint>; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/net/dsa/ |
H A D | ocelot.txt | 5 ----- 9 - VSC9959 (Felix) 10 - VSC9953 (Seville) 13 larger ENETC root complex. As a result, the ethernet-switch node is a sub-node 25 For the external switch ports, depending on board configuration, "phy-mode" and 26 "phy-handle" are populated by board specific device tree instances. Ports 4 and 27 5 are fixed as internal ports in the NXP LS1028A instantiation. 32 By default, in fsl-ls1028a.dtsi, the NPI port is assigned to the internal 39 Any port can be disabled (and in fsl-ls1028a.dtsi, they are indeed all disabled 40 by default, and should be enabled on a per-board basis). But if any external [all …]
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/freebsd/sys/contrib/device-tree/Bindings/usb/ |
H A D | smsc,usb3503.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: SMSC USB3503 High-Speed Hub Controller 10 - Dongjin Kim <tobetter@gmail.com> 15 - smsc,usb3503 16 - smsc,usb3503a 17 - smsc,usb3803 22 connect-gpios: 27 intn-gpios: [all …]
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H A D | usb251xb.txt | 1 Microchip USB 2.0 Hi-Speed Hub Controller 4 Hi-Speed Controller. 7 - compatible : Should be "microchip,usb251xb" or one of the specific types: 11 - reg : I2C address on the selected bus (default is <0x2C>) 14 - reset-gpios : Should specify the gpio for hub reset 15 - vdd-supply : Should specify the phandle to the regulator supplying vdd 16 - skip-config : Skip Hub configuration, but only send the USB-Attach command 17 - vendor-id : Set USB Vendor ID of the hub (16 bit, default is 0x0424) 18 - product-id : Set USB Product ID of the hub (16 bit, default depends on type) 19 - device-id : Set USB Device ID of the hub (16 bit, default is 0x0bb3) [all …]
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H A D | usb251xb.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Microchip USB 2.0 Hi-Speed Hub Controller 10 - Richard Leitner <richard.leitner@skidata.com> 15 - microchip,usb2422 16 - microchip,usb2512b 17 - microchip,usb2512bi 18 - microchip,usb2513b 19 - microchip,usb2513bi [all …]
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H A D | usb3503.txt | 1 SMSC USB3503 High-Speed Hub Controller 4 - compatible: Should be "smsc,usb3503" or "smsc,usb3503a". 7 - reg: Specifies the i2c slave address, it is required and should be 0x08 9 - connect-gpios: Should specify GPIO for connect. 10 - disabled-ports: Should specify the ports unused. 13 Do not describe this property if all ports have to be enabled. 14 - intn-gpios: Should specify GPIO for interrupt. 15 - reset-gpios: Should specify GPIO for reset. 16 - initial-mode: Should specify initial mode. 18 - refclk: Clock used for driving REFCLK signal (optional, if not provided [all …]
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/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/ |
H A D | imx7s.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 #include <dt-bindings/clock/imx7d-clock.h> 7 #include <dt-bindings/power/imx7-power.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/reset/imx7-reset.h> 12 #include "imx7d-pinfunc.h" 15 #address-cells = <1>; 16 #size-cells = <1>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
H A D | sm6115.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 6 #include <dt-bindings/clock/qcom,gcc-sm6115.h> 7 #include <dt-bindings/clock/qcom,sm6115-dispcc.h> 8 #include <dt-bindings/clock/qcom,sm6115-gpucc.h> 9 #include <dt-bindings/clock/qcom,rpmcc.h> 10 #include <dt-bindings/dma/qcom-gpi.h> 11 #include <dt-bindings/firmware/qcom,scm.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/interconnect/qcom,rpm-icc.h> 14 #include <dt-bindings/interconnect/qcom,sm6115.h> [all …]
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H A D | msm8998.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/clock/qcom,gcc-msm8998.h> 6 #include <dt-bindings/clock/qcom,gpucc-msm8998.h> 7 #include <dt-bindings/clock/qcom,mmcc-msm8998.h> 8 #include <dt-bindings/clock/qcom,rpmcc.h> 9 #include <dt-bindings/firmware/qcom,scm.h> 10 #include <dt-bindings/power/qcom-rpmpd.h> 11 #include <dt-bindings/gpio/gpio.h> 14 interrupt-parent = <&intc>; [all …]
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H A D | sm8250.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/qcom,dispcc-sm8250.h> 8 #include <dt-bindings/clock/qcom,gcc-sm8250.h> 9 #include <dt-bindings/clock/qcom,gpucc-sm8250.h> 10 #include <dt-bindings/clock/qcom,rpmh.h> 11 #include <dt-bindings/dma/qcom-gpi.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/interconnect/qcom,osm-l3.h> 14 #include <dt-bindings/interconnect/qcom,sm8250.h> [all …]
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H A D | x1e80100.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/clock/qcom,rpmh.h> 7 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h> 8 #include <dt-bindings/clock/qcom,x1e80100-dispcc.h> 9 #include <dt-bindings/clock/qcom,x1e80100-gcc.h> 10 #include <dt-bindings/clock/qcom,x1e80100-gpucc.h> 11 #include <dt-bindings/clock/qcom,x1e80100-tcsr.h> 12 #include <dt-bindings/dma/qcom-gpi.h> 13 #include <dt-bindings/interconnect/qcom,icc.h> 14 #include <dt-bindings/interconnect/qcom,x1e80100-rpmh.h> [all …]
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H A D | sm8450.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/qcom,gcc-sm8450.h> 8 #include <dt-bindings/clock/qcom,rpmh.h> 9 #include <dt-bindings/clock/qcom,sm8450-camcc.h> 10 #include <dt-bindings/clock/qcom,sm8450-dispcc.h> 11 #include <dt-bindings/clock/qcom,sm8450-gpucc.h> 12 #include <dt-bindings/clock/qcom,sm8450-videocc.h> 13 #include <dt-bindings/dma/qcom-gpi.h> 14 #include <dt-bindings/firmware/qcom,scm.h> [all …]
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H A D | sc7280.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 5 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. 7 #include <dt-bindings/clock/qcom,camcc-sc7280.h> 8 #include <dt-bindings/clock/qcom,dispcc-sc7280.h> 9 #include <dt-bindings/clock/qcom,gcc-sc7280.h> 10 #include <dt-bindings/clock/qcom,gpucc-sc7280.h> 11 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h> 12 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h> 13 #include <dt-bindings/clock/qcom,rpmh.h> 14 #include <dt-bindings/clock/qcom,videocc-sc7280.h> [all …]
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/freebsd/sys/contrib/device-tree/src/arm/qcom/ |
H A D | qcom-apq8064.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/clock/qcom,gcc-msm8960.h> 5 #include <dt-bindings/clock/qcom,lcc-msm8960.h> 6 #include <dt-bindings/reset/qcom,gcc-msm8960.h> 7 #include <dt-bindings/clock/qcom,mmcc-msm8960.h> 8 #include <dt-bindings/clock/qcom,rpmcc.h> 9 #include <dt-bindings/soc/qcom,gsbi.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> [all …]
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H A D | qcom-msm8974.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/interconnect/qcom,msm8974.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/clock/qcom,gcc-msm8974.h> 7 #include <dt-bindings/clock/qcom,mmcc-msm8974.h> 8 #include <dt-bindings/clock/qcom,rpmcc.h> 9 #include <dt-bindings/reset/qcom,gcc-msm8974.h> 10 #include <dt-bindings/gpio/gpio.h> 13 #address-cells = <1>; [all …]
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/freebsd/tests/sys/netinet6/ |
H A D | output6.sh | 1 #!/usr/bin/env atf-sh 2 #- 3 # SPDX-License-Identifier: BSD-2-Clause 55 jname="v6t-output6_tcp_setup_success" 69 while [ `jexec ${jname}b ifconfig ${epair}b inet6 | grep -c tentative` != "0" ]; do 72 while [ `jexec ${jname}a ifconfig ${epair}a inet6 | grep -c tentative` != "0" ]; do 77 args="--family inet6 --ports ${port} --match_str ${text}" 79 jexec ${jname}b ${script_name} --test_name "test_listen_tcp" ${args} & 84 while [ `jexec ${jname}b sockstat -6qlp ${port} | wc -l` != "1" ]; do 87 if [ ${counter} -ge 50 ]; then break; fi [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
H A D | imx8mp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mp-clock.h> 7 #include <dt-bindings/power/imx8mp-power.h> 8 #include <dt-bindings/reset/imx8mp-reset.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/interconnect/fsl,imx8mp.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 15 #include "imx8mp-pinfunc.h" [all …]
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/freebsd/sys/dts/arm/ |
H A D | qcom-ipq4019-ethernet.dtsi | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 28 #include <dt-bindings/net/qcom-qca807x.h> 33 #address-cells = <1>; 34 #size-cells = <0>; 35 compatible = "qcom,ipq4019-mdio"; 37 status = "disabled"; 40 ess-switch@c000000 { 41 compatible = "qcom,ess-switch"; 44 reset-names = "ess_rst"; [all …]
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