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/linux/Documentation/devicetree/bindings/soundwire/
H A Dqcom,soundwire.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
11 - Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
19 - qcom,soundwire-v1.3.0
20 - qcom,soundwire-v1.5.0
21 - qcom,soundwire-v1.5.1
22 - qcom,soundwire-v1.6.0
23 - qcom,soundwire-v1.7.0
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/linux/arch/arm64/boot/dts/qcom/
H A Dsdm845-wcd9340.dtsi1 // SPDX-License-Identifier: GPL-2.0
13 #address-cells = <2>;
14 #size-cells = <0>;
24 slim-ifc-dev = <&wcd9340_ifd>;
26 #sound-dai-cells = <1>;
28 interrupts-extended = <&tlmm 54 IRQ_TYPE_LEVEL_HIGH>;
29 interrupt-controller;
30 #interrupt-cells = <1>;
32 clock-names = "extclk";
35 #clock-cells = <0>;
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H A Dx1e80100.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
8 #include <dt-bindings/clock/qcom,x1e80100-dispcc.h>
9 #include <dt-bindings/clock/qcom,x1e80100-gcc.h>
10 #include <dt-bindings/clock/qcom,x1e80100-gpucc.h>
11 #include <dt-bindings/clock/qcom,x1e80100-tcsr.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/interconnect/qcom,icc.h>
14 #include <dt-bindings/interconnect/qcom,x1e80100-rpmh.h>
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/linux/tools/testing/selftests/drivers/net/mlxsw/
H A Dqos_pfc.sh2 # SPDX-License-Identifier: GPL-2.0
4 # This test injects a 10-MB burst of traffic with VLAN tag and 802.1p priority
8 # - the stream first ingresses through $swp1, where it is forwarded to $swp3
10 # - then it ingresses through $swp4. Here it is put to a lossless buffer and put
15 # - since $swp3 now can't send traffic, the traffic ingressing $swp1 is kept at
19 # - eventually the PFC pool gets some traffic out, headroom therefore gets some
24 # - if PFC works, all lossless flow packets that ingress through $swp1 should
28 # - it should all play out relatively quickly, so that SLL and HLL will not
31 # +-----------------------+
37 # +---|-------------------+ +--------------------+
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/linux/drivers/usb/serial/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
11 ports, or acts like a serial device, and you want to connect it to
14 Please read <file:Documentation/usb/usb-serial.rst> for more
50 read <file:Documentation/usb/usb-serial.rst> for more information on
61 - Suunto ANT+ USB device.
62 - Medtronic CareLink USB device
63 - Fundamental Software dongle.
64 - Google USB serial devices
65 - HP4x calculators
66 - Libtransistor USB console
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H A Dio_usbvend.h1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * USBVEND.H Vendor-specific USB definitions
7 * must be kept backward-compatible with older firmware.
34 // We break the USB-defined PID into an OEM Id field (upper 6 bits)
40 // ION-device OEM IDs
50 // ION-device Device IDs
51 // Product IDs - assigned to match middle digit of serial number (No longer true)
77 // ION_DEVICE_ID_EDGEPORT_8_HANDBUILT 0x009 // Hand-built Edgeport/8 (Placeholder, used in middle d…
83 #define ION_DEVICE_ID_EDGEPORT_8 0x00F // Edgeport/8 (single-CPU)
84 #define ION_DEVICE_ID_EDGEPORT_2_DIN 0x010 // Edgeport/2 RS232 with Apple DIN connector
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/linux/arch/arm/boot/dts/microchip/
H A Dat91-tse850-3.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91-tse850-3.dts - Device Tree file for the Axentia TSE-850 3.0 board
9 /dts-v1/;
10 #include <dt-bindings/pwm/pwm.h>
11 #include "at91-linea.dtsi"
14 model = "Axentia TSE-850 3.0";
19 compatible = "fixed-clock";
21 #clock-cells = <0>;
22 clock-frequency = <16000000>;
23 clock-output-names = "sck";
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/linux/Documentation/usb/
H A Dusb-serial.rst45 --------------------------------------
58 -----------------------------------------------
72 This goes against the current documentation for pilot-xfer and other
77 (this is usually /dev/ttyUSB1 if you do not have any other usb-serial
99 Kroah-Hartman at greg@kroah.com
103 -------------------
115 significant advantage of using USB is speed - I can get 73 to 113
120 contains the necessary packages and a simple step-by-step howto.
129 iPAQ - disable autosync by going to the Start/Settings/Connections menu
138 You can also try soft-resetting your PDA before attempting a connection.
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/linux/drivers/soundwire/
H A Dqcom.c1 // SPDX-License-Identifier: GPL-2.0
102 #define SWRM_DP_PORT_CTRL_BANK(n, m) (0x1124 + 0x100 * (n - 1) + 0x40 * m)
103 #define SWRM_DP_PORT_CTRL_2_BANK(n, m) (0x1128 + 0x100 * (n - 1) + 0x40 * m)
104 #define SWRM_DP_BLOCK_CTRL_1(n) (0x112C + 0x100 * (n - 1))
105 #define SWRM_DP_BLOCK_CTRL2_BANK(n, m) (0x1130 + 0x100 * (n - 1) + 0x40 * m)
106 #define SWRM_DP_PORT_HCTRL_BANK(n, m) (0x1134 + 0x100 * (n - 1) + 0x40 * m)
107 #define SWRM_DP_BLOCK_CTRL3_BANK(n, m) (0x1138 + 0x100 * (n - 1) + 0x40 * m)
108 #define SWRM_DP_SAMPLECTRL2_BANK(n, m) (0x113C + 0x100 * (n - 1) + 0x40 * m)
109 #define SWRM_DIN_DPn_PCM_PORT_CTRL(n) (0x1054 + 0x100 * (n - 1))
204 /* Port numbers are 1 - 14 */
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/linux/arch/arm/boot/dts/nvidia/
H A Dtegra124-apalis-v1.2.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2016-2018 Toradex AG
7 #include "tegra124-apalis-emc.dtsi"
21 avddio-pex-supply = <&reg_1v05_vdd>;
22 avdd-pex-pll-supply = <&reg_1v05_vdd>;
23 avdd-pll-erefe-supply = <&reg_1v05_avdd>;
24 dvddio-pex-supply = <&reg_1v05_vdd>;
25 hvdd-pex-pll-e-supply = <&reg_module_3v3>;
26 hvdd-pex-supply = <&reg_module_3v3>;
27 vddio-pex-ctl-supply = <&reg_module_3v3>;
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H A Dtegra124-apalis.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
3 * Copyright 2016-2019 Toradex AG
7 #include "tegra124-apalis-emc.dtsi"
20 avddio-pex-supply = <&reg_1v05_vdd>;
21 avdd-pex-pll-supply = <&reg_1v05_vdd>;
22 avdd-pll-erefe-supply = <&reg_1v05_avdd>;
23 dvddio-pex-supply = <&reg_1v05_vdd>;
24 hvdd-pex-pll-e-supply = <&reg_module_3v3>;
25 hvdd-pex-supply = <&reg_module_3v3>;
26 vddio-pex-ctl-supply = <&reg_module_3v3>;
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/linux/drivers/clk/tegra/
H A Dclk-pll.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/clk-provider.h>
31 #define PLL_MISC_CPCON_MASK ((1 << PLL_MISC_CPCON_WIDTH) - 1)
34 #define PLL_MISC_LFCON_MASK ((1 << PLL_MISC_LFCON_WIDTH) - 1)
37 #define PLL_MISC_VCOCON_MASK ((1 << PLL_MISC_VCOCON_WIDTH) - 1)
230 #define pll_readl(offset, p) readl_relaxed(p->clk_base + offset)
231 #define pll_readl_base(p) pll_readl(p->params->base_reg, p)
232 #define pll_readl_misc(p) pll_readl(p->params->misc_reg, p)
233 #define pll_override_readl(offset, p) readl_relaxed(p->pmc + offset)
234 #define pll_readl_sdm_din(p) pll_readl(p->params->sdm_din_reg, p)
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