| /freebsd/sys/dev/isci/scil/ |
| H A D | scif_sas_design.h | 58 @page scif_sas_design_page SCIF SAS High Level Design
68 This document provides design information relating to the SAS specific
72 Interface Specification, and the SCI Base Design.
77 the design. State machines are pervasive in this design, because of the
86 Additionally, the SCI Base Design document specifies a number of state
87 machines, objects, and methods that are heavily utilized by this design.
88 Please refer to Base Design specification for further information.
92 as event handlers for each individual state. This design places all of
117 in the system. The low-level design section will contain detailed use cases
136 low-level design sections. Furthermore, additional classes not germane to
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| /freebsd/lib/libc/gen/ |
| H A D | ucontext.3 | 1 .\" Copyright (c) 2002 Packet Design, LLC.
7 .\" Packet Design; provided, however, that:
13 .\" Packet Design trademarks, including the mark "PACKET DESIGN"
17 .\" THIS SOFTWARE IS BEING PROVIDED BY PACKET DESIGN "AS IS", AND
18 .\" TO THE MAXIMUM EXTENT PERMITTED BY LAW, PACKET DESIGN MAKES NO
22 .\" OR NON-INFRINGEMENT. PACKET DESIGN DOES NOT WARRANT, GUARANTEE,
25 .\" RELIABILITY OR OTHERWISE. IN NO EVENT SHALL PACKET DESIGN BE
33 .\" THE USE OF THIS SOFTWARE, EVEN IF PACKET DESIGN IS ADVISED OF
|
| H A D | makecontext.3 | 1 .\" Copyright (c) 2002 Packet Design, LLC.
7 .\" Packet Design; provided, however, that:
13 .\" Packet Design trademarks, including the mark "PACKET DESIGN"
17 .\" THIS SOFTWARE IS BEING PROVIDED BY PACKET DESIGN "AS IS", AND
18 .\" TO THE MAXIMUM EXTENT PERMITTED BY LAW, PACKET DESIGN MAKES NO
22 .\" OR NON-INFRINGEMENT. PACKET DESIGN DOES NOT WARRANT, GUARANTEE,
25 .\" RELIABILITY OR OTHERWISE. IN NO EVENT SHALL PACKET DESIGN BE
33 .\" THE USE OF THIS SOFTWARE, EVEN IF PACKET DESIGN IS ADVISED OF
|
| H A D | getcontext.3 | 1 .\" Copyright (c) 2002 Packet Design, LLC.
7 .\" Packet Design; provided, however, that:
13 .\" Packet Design trademarks, including the mark "PACKET DESIGN"
17 .\" THIS SOFTWARE IS BEING PROVIDED BY PACKET DESIGN "AS IS", AND
18 .\" TO THE MAXIMUM EXTENT PERMITTED BY LAW, PACKET DESIGN MAKES NO
22 .\" OR NON-INFRINGEMENT. PACKET DESIGN DOES NOT WARRANT, GUARANTEE,
25 .\" RELIABILITY OR OTHERWISE. IN NO EVENT SHALL PACKET DESIGN BE
33 .\" THE USE OF THIS SOFTWARE, EVEN IF PACKET DESIGN IS ADVISED OF
|
| /freebsd/sys/contrib/device-tree/Bindings/power/supply/ |
| H A D | bq27xxx.yaml | 64 - energy-full-design-microwatt-hours
65 - charge-full-design-microamp-hours
66 - voltage-min-design-microvolt
67 Both or neither of the *-full-design-*-hours properties must be set.
80 voltage-min-design-microvolt = <3200000>;
81 energy-full-design-microwatt-hours = <5290000>;
82 charge-full-design-microamp-hours = <1430000>;
|
| H A D | battery.yaml | 54 voltage-min-design-microvolt:
57 voltage-max-design-microvolt:
60 energy-full-design-microwatt-hours:
61 description: battery design energy
63 charge-full-design-microamp-hours:
64 description: battery design capacity
152 voltage-min-design-microvolt = <3200000>;
153 voltage-max-design-microvolt = <4200000>;
154 energy-full-design-microwatt-hours = <5290000>;
155 charge-full-design-microamp-hours = <1430000>;
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| H A D | ingenic,battery.txt | 13 - voltage-min-design-microvolt: Drained battery voltage.
14 - voltage-max-design-microvolt: Fully charged battery voltage.
22 voltage-min-design-microvolt = <3600000>;
23 voltage-max-design-microvolt = <4200000>;
|
| H A D | ingenic,battery.yaml | 35 - voltage-min-design-microvolt: drained battery voltage,
36 - voltage-max-design-microvolt: fully charged battery voltage.
52 voltage-min-design-microvolt = <3600000>;
53 voltage-max-design-microvolt = <4200000>;
|
| /freebsd/share/man/man4/ |
| H A D | ng_l2tp.4 | 1 .\" Copyright (c) 2001-2002 Packet Design, LLC.
7 .\" Packet Design; provided, however, that:
13 .\" Packet Design trademarks, including the mark "PACKET DESIGN"
17 .\" THIS SOFTWARE IS BEING PROVIDED BY PACKET DESIGN "AS IS", AND
18 .\" TO THE MAXIMUM EXTENT PERMITTED BY LAW, PACKET DESIGN MAKES NO
22 .\" OR NON-INFRINGEMENT. PACKET DESIGN DOES NOT WARRANT, GUARANTEE,
25 .\" RELIABILITY OR OTHERWISE. IN NO EVENT SHALL PACKET DESIGN BE
33 .\" THE USE OF THIS SOFTWARE, EVEN IF PACKET DESIGN IS ADVISED OF
324 node type was developed at Packet Design, LLC,
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| /freebsd/sys/netgraph/ |
| H A D | ng_l2tp.h | 2 * Copyright (c) 2001-2002 Packet Design, LLC.
8 * Packet Design; provided, however, that:
14 * Packet Design trademarks, including the mark "PACKET DESIGN"
18 * THIS SOFTWARE IS BEING PROVIDED BY PACKET DESIGN "AS IS", AND
19 * TO THE MAXIMUM EXTENT PERMITTED BY LAW, PACKET DESIGN MAKES NO
23 * OR NON-INFRINGEMENT. PACKET DESIGN DOES NOT WARRANT, GUARANTEE,
26 * RELIABILITY OR OTHERWISE. IN NO EVENT SHALL PACKET DESIGN BE
34 * THE USE OF THIS SOFTWARE, EVEN IF PACKET DESIGN IS ADVISED OF
|
| /freebsd/share/doc/papers/newvm/ |
| H A D | 1.t | 32 its design goals admirably well over the ten years of its existence.
35 This section of the paper describes the current design,
37 and attempts to define the new design considerations that should
38 be taken into account in a new virtual memory design.
43 have used the same virtual memory design.
68 Design assumptions for 4.3BSD virtual memory
70 The design criteria for the current virtual memory implementation
145 to the amount of swap space as is done in the current design.
146 Consequently, the new design will allow the maximum virtual memory
159 Under the current design, file caching is done by the buffer pool,
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| /freebsd/sys/dev/acpica/ |
| H A D | acpiio.h | 58 uint32_t dcap; /* Design Capacity */
61 uint32_t dvol; /* Design voltage (mV) */
81 uint32_t dcap; /* Design Capacity */
84 uint32_t dvol; /* Design voltage (mV) */
120 uint32_t dcap; /* Design Capacity */
123 uint32_t dvol; /* Design voltage (mV) */
124 uint32_t wcap; /* Design Capacity of Warning */
125 uint32_t lcap; /* Design Capacity of Low */
|
| /freebsd/sys/fs/nfsclient/ |
| H A D | nlminfo.h | 4 * Copyright (c) 1998 Berkeley Software Design, Inc. All rights reserved.
13 * 3. Berkeley Software Design Inc's name may not be used to endorse or
17 * THIS SOFTWARE IS PROVIDED BY BERKELEY SOFTWARE DESIGN INC ``AS IS'' AND
20 * ARE DISCLAIMED. IN NO EVENT SHALL BERKELEY SOFTWARE DESIGN INC BE LIABLE
|
| /freebsd/sys/contrib/device-tree/src/arm64/rockchip/ |
| H A D | rk3326-odroid-go2.dts | 4 * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH
42 charge-full-design-microamp-hours = <3000000>;
47 voltage-max-design-microvolt = <4100000>;
48 voltage-min-design-microvolt = <3500000>;
|
| /freebsd/share/man/man4/man4.arm/ |
| H A D | devcfg.4 | 50 cat design.bit.bin > /dev/devcfg
54 design tools.
60 promgen -b -w -p bin -data_width 32 -u 0 design.bit -o design.bit.bin
|
| /freebsd/sys/sys/ |
| H A D | _mutex.h | 4 * Copyright (c) 1997 Berkeley Software Design, Inc. All rights reserved.
14 * 3. Berkeley Software Design Inc's name may not be used to endorse or
18 * THIS SOFTWARE IS PROVIDED BY BERKELEY SOFTWARE DESIGN INC ``AS IS'' AND
21 * ARE DISCLAIMED. IN NO EVENT SHALL BERKELEY SOFTWARE DESIGN INC BE LIABLE
|
| H A D | _lock.h | 4 * Copyright (c) 1997 Berkeley Software Design, Inc. All rights reserved.
14 * 3. Berkeley Software Design Inc's name may not be used to endorse or
18 * THIS SOFTWARE IS PROVIDED BY BERKELEY SOFTWARE DESIGN INC ``AS IS'' AND
21 * ARE DISCLAIMED. IN NO EVENT SHALL BERKELEY SOFTWARE DESIGN INC BE LIABLE
|
| H A D | ktr_class.h | 4 * Copyright (c) 1996 Berkeley Software Design, Inc. All rights reserved.
14 * 3. Berkeley Software Design Inc's name may not be used to endorse or
18 * THIS SOFTWARE IS PROVIDED BY BERKELEY SOFTWARE DESIGN INC ``AS IS'' AND
21 * ARE DISCLAIMED. IN NO EVENT SHALL BERKELEY SOFTWARE DESIGN INC BE LIABLE
|
| /freebsd/contrib/llvm-project/lld/docs/ |
| H A D | NewLLD.rst | 17 Design chapter
20 We will describe the design of the linkers in the rest of the document.
26 There are many design choices you have to make to create a complete linker.
28 This is a list of design choices we've made for ELF and COFF LLD.
29 We believe that these high-level design choices achieved a right balance
36 The linkers share the same design but share very little code.
43 * Speed by design
47 Therefore, the high-level design matters more than local optimizations.
49 it is very important to keep the design as efficient as possible.
|
| /freebsd/usr.sbin/mfiutil/ |
| H A D | mfi_show.c | 144 struct mfi_bbu_design_info design; in show_battery() local
177 if (mfi_dcmd_command(fd, MFI_DCMD_BBU_GET_DESIGN_INFO, &design, in show_battery()
178 sizeof(design), NULL, 0, NULL) < 0) { in show_battery()
180 warn("Failed to get design info"); in show_battery()
202 printf(" Manufacture Date: %d/%d/%d\n", design.mfg_date >> 5 & 0x0f, in show_battery()
203 design.mfg_date & 0x1f, design.mfg_date >> 9 & 0xffff); in show_battery()
204 printf(" Serial Number: %d\n", design.serial_number); in show_battery()
205 printf(" Manufacturer: %s\n", design.mfg_name); in show_battery()
206 printf(" Model: %s\n", design.device_name); in show_battery()
207 printf(" Chemistry: %s\n", design.device_chemistry); in show_battery()
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| /freebsd/sys/contrib/device-tree/src/arm/intel/ixp/ |
| H A D | intel-ixp46x-ixdp465.dts | 4 * design, codename "BMP".
10 #include "intel-ixp4xx-reference-design.dtsi"
14 model = "Intel IXDP465 BMP Reference Design";
|
| /freebsd/sys/dev/isp/ |
| H A D | DriverManual.txt | 40 initial implementation followed the very thoughtful NetBSD design tenet
42 and MD (Machine Dependent) portions. The original design therefore was
61 design of NetBSD, a rather successful attempt has been made to keep the
68 3. Driver Design Goals
71 Normally you design via top-down methodologies and set an initial goal
72 and meet it. This driver has had a design goal that changes from almost
75 a bit of "reconstruction after the fact" in that the design goals are
78 The primary design goal now is to have a driver that can run both the
96 Pure, raw, performance is not a primary goal of this design. This design,
101 penalties in this design as small as possible.
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| /freebsd/sys/nfs/ |
| H A D | nfs_lock.h | 4 * Copyright (c) 1998 Berkeley Software Design, Inc. All rights reserved.
13 * 3. Berkeley Software Design Inc's name may not be used to endorse or
17 * THIS SOFTWARE IS PROVIDED BY BERKELEY SOFTWARE DESIGN INC ``AS IS'' AND
20 * ARE DISCLAIMED. IN NO EVENT SHALL BERKELEY SOFTWARE DESIGN INC BE LIABLE
|
| /freebsd/contrib/ntp/html/ |
| H A D | history.html | 17 …t it now requires a more systematic and thorough examination of purpose, design and implementation…
19 <h4>1. Transparent Design</h4>
20 … in behavior, just a more simplified, transparent and easier to maintain design. In a few cases be…
27 …erage headway. This is a major improvement over the original limitreject design of 1992 and upgrad…
28 <p>The main feature of the revised design is that it is responsive to the server minimum headway an…
29 <p>The revised design makes possible a decrease in the minimum time constant/poll interval to 3 (8 …
35 <p>In the original design the frequency file was written at one-hour intervals. This apparently mak…
59 …e PTP design operates only in a master-slave configuration and is not directly usable in NTP. The …
60 … software timestamping revealed that the most accurate and interoperable design involves the trans…
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| /freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
| H A D | sdm845-oneplus-fajita.dts | 20 charge-full-design-microamp-hours = <3700000>;
21 voltage-min-design-microvolt = <3400000>;
22 voltage-max-design-microvolt = <4400000>;
|