| /linux/include/linux/ |
| H A D | dmaengine.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
14 #include <linux/types.h>
18 * typedef dma_cookie_t - an opaque DMA cookie
31 * enum dma_status - DMA transaction status
46 * enum dma_transaction_type - DMA transaction types/indexes
68 /* last transaction type for creation of the capabilities mask */
73 * enum dma_transfer_direction - dma transfer mode and direction indicator
89 * ----------------------------
91 * The gap(in bytes) between two chunks is called inter-chunk-gap(ICG).
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| /linux/drivers/crypto/ |
| H A D | talitos.h | 1 /* SPDX-License-Identifier: BSD-3-Clause */
3 * Freescale SEC (talitos) device register and descriptor header defines
5 * Copyright (c) 2006-2011 Freescale Semiconductor, Inc.
16 /* descriptor pointer entry */
32 /* descriptor */
40 __be32 next_desc; /* next descriptor (SEC1) */
43 #define TALITOS_DESC_SIZE (sizeof(struct talitos_desc) - sizeof(__be32))
46 * talitos_edesc - s/w-extended descriptor
52 * @desc: h/w descriptor
74 * talitos_request - descriptor submission request
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| /linux/drivers/media/i2c/ccs/ |
| H A D | ccs-data.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * CCS static data in-memory data structure definitions
5 * Copyright 2019--2020 Intel Corporation
11 #include <linux/types.h>
16 * struct ccs_data_block_version - CCS static data version
32 * struct ccs_reg - CCS register value
33 * @addr: The 16-bit address of the register
44 * struct ccs_if_rule - CCS static data if rule
47 * @mask: Value applied to both actual register value and @value
52 u8 mask; member
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| /linux/drivers/net/ethernet/xilinx/ |
| H A D | xilinx_axienet.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Copyright (c) 2010 - 2012 Xilinx, Inc. All rights reserved.
57 * types of frames are encountered. When this option is cleared, the MAC will
58 * allow these types of frames to be received. Default: enabled (set)
78 #define XAXIDMA_TX_CDESC_OFFSET 0x00000008 /* Current descriptor pointer */
79 #define XAXIDMA_TX_TDESC_OFFSET 0x00000010 /* Tail descriptor pointer */
83 #define XAXIDMA_RX_CDESC_OFFSET 0x00000038 /* Current descriptor pointer */
84 #define XAXIDMA_RX_TDESC_OFFSET 0x00000040 /* Tail descriptor pointer */
91 #define XAXIDMA_BD_NDESC_OFFSET 0x00 /* Next descriptor pointer */
105 #define XAXIDMA_BD_HAS_DRE_MASK 0xF00 /* Whether has DRE mask */
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| /linux/Documentation/devicetree/bindings/dma/ |
| H A D | intel,ldma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - chuanhua.lei@intel.com
11 - mallikarjunax.reddy@intel.com
14 - $ref: dma-controller.yaml#
19 - intel,lgm-cdma
20 - intel,lgm-dma2tx
21 - intel,lgm-dma1rx
22 - intel,lgm-dma1tx
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| /linux/include/uapi/scsi/fc/ |
| H A D | fc_els.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
5 * Maintained at www.Open-FCoE.org
11 #include <linux/types.h>
21 * Fibre Channel Switch - Enhanced Link Services definitions.
22 * From T11 FC-LS Rev 1.2 June 7, 2005.
26 * ELS Command codes - byt
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| /linux/drivers/hwtracing/coresight/ |
| H A D | coresight-config.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
11 #include <linux/types.h>
13 /* CoreSight Configuration Management - component and system wide configuration */
16 * Register type flags for register value descriptor:
28 * system configuration - used by config data and devices.
33 /* flags defining device instance matching - used in config match desc data. */
40 * See PMU_FORMAT_ATTR(preset, "config:0-3") in coresight-etm-perf.c
45 * Parameter descriptor for a device feature.
56 * Representation of register value and a descriptor of register usage.
58 * Used as a descriptor in the feature descriptors.
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| /linux/drivers/usb/dwc2/ |
| H A D | hcd.h | 1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
3 * hcd.h - DesignWare HS OTG Controller host-mode declarations
5 * Copyright (C) 2004-2013 Synopsys, Inc.
24 * struct dwc2_host_chan - Software host channel descriptor
31 * - USB_SPEED_LOW
32 * - USB_SPEED_FULL
33 * - USB_SPEED_HIGH
35 * - USB_ENDPOINT_XFER_CONTROL: 0
36 * - USB_ENDPOINT_XFER_ISOC: 1
37 * - USB_ENDPOINT_XFER_BULK: 2
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| /linux/include/uapi/linux/ |
| H A D | inotify.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
13 #include <linux/types.h>
16 * struct inotify_event - structure read from the inotify device for each event
22 __s32 wd; /* watch descriptor */
23 __u32 mask; /* watch mask */ member
29 /* the following are legal, implemented events that user-space can watch for */
57 #define IN_MASK_ADD 0x20000000 /* add to the mask of an already existing watch */
62 * All of the events - we build the list by hand so that we can add flags in
80 * watch descriptor.
|
| H A D | tee.h | 2 * Copyright (c) 2015-2016, Linaro Limited
32 #include <linux/types.h>
53 #define TEE_MEMREF_NULL ((__u64)(-1)) /* NULL MemRef Buffer */
54 #define TEE_OBJREF_NULL ((__u64)(-1)) /* NULL ObjRef Object */
65 * OP-TEE specific capabilities
70 * struct tee_ioctl_version_data - TEE version
86 * TEE_IOC_VERSION - query version of TEE
95 * struct tee_ioctl_shm_alloc_data - Shared memory allocate argument
111 * TEE_IOC_SHM_ALLOC - allocate shared memory
115 * Returns a file descriptor o
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| /linux/drivers/scsi/ |
| H A D | vmw_pvscsi.h | 4 * Copyright (C) 2008-2014, VMware, Inc. All Rights Reserved.
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
25 #include <linux/types.h>
27 #define PVSCSI_DRIVER_VERSION_STRING "1.0.7.0-k"
31 #define MASK(n) ((1 << (n)) - 1) /* make an n-bit mask */ macro
123 * Command descriptor for PVSCSI_CMD_RESET_DEVICE --
132 * Command descriptor for PVSCSI_CMD_CONFIG --
143 * Command descriptor for PVSCSI_CMD_SETUP_REQCALLTHRESHOLD --
163 * Command descriptor for PVSCSI_CMD_ABORT_CMD --
165 * - currently does not support specifying the LUN.
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| /linux/drivers/net/ethernet/broadcom/ |
| H A D | bcm63xx_enet.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <linux/types.h>
15 /* default number of descriptor */
224 /* current number of armed descriptor given to hardware for rx */
227 /* next rx descriptor to fetch from hardware */
230 /* next dirty rx descriptor to refill */
265 /* number of available descriptor for tx */
268 /* next tx descriptor avaiable */
271 /* next dirty tx descriptor to reclaim */
345 /* dma channel enable mask */
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| /linux/drivers/clk/baikal-t1/ |
| H A D | ccu-rst.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Baikal-T1 CCU Resets interface driver
12 #include <linux/reset-controller.h>
17 * enum ccu_rst_type - CCU Reset types
18 * @CCU_RST_TRIG: Self-deasserted reset signal.
27 * struct ccu_rst_init_data - CCU Resets initialization data
28 * @sys_regs: Baikal-T1 System Controller registers map.
37 * struct ccu_rst - CCU Reset descriptor
38 * @rcdev: Reset controller descriptor.
39 * @sys_regs: Baikal-T1 System Controller registers map.
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| /linux/drivers/net/ethernet/freescale/fs_enet/ |
| H A D | fs_enet.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
7 #include <linux/types.h>
11 #include <linux/dma-mapping.h>
25 u32 fec_imask; /* Interrupt mask reg */
27 u32 fec_r_des_active; /* Receive descriptor reg */
28 u32 fec_x_des_active; /* Transmit descriptor reg */
55 u32 fec_r_des_start; /* Receive descriptor ring */
56 u32 fec_x_des_start; /* Transmit descriptor ring */
109 #define ENET_RX_FRSIZE L1_CACHE_ALIGN(PKT_MAXBUF_SIZE + ENET_RX_ALIGN - 1)
149 u32 ev_napi; /* mask of NAPI events */
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| /linux/Documentation/crypto/ |
| H A D | async-tx-api.rst | 1 .. SPDX-License-Identifier: GPL-2.0
16 3.3 Descriptor management
32 bulk memory transfers/transforms with support for inter-transactional
43 xor-parity-calculations of the md-raid5 driver using the offload engines
54 operations to be submitted, like xor->copy->xor in the raid5 case. The
57 3. dmaengine extensions to support multiple clients and operation types
64 -----------------------------
72 ------------------------
91 3.3 Descriptor management
92 -------------------------
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| /linux/drivers/net/ethernet/fungible/funeth/ |
| H A D | funeth_txrx.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
10 /* Tx descriptor size */
16 /* Number of gather list entries per Tx descriptor */
36 /* Rx CQ descriptor size. */
40 #define FUNETH_CQE_INFO_OFFSET (FUNETH_CQE_SIZE - sizeof(struct fun_cqe_info))
55 /* Per packet tailroom. Present only for 1-frag packets. */
84 u64 tx_tso; /* # of non-encapsulated TSO super-packets */
85 u64 tx_encap_tso; /* # of encapsulated TSO super-packets */
86 u64 tx_uso; /* # of non-encapsulated UDP LSO super-packets */
93 u64 tx_tls_bytes; /* Tx bytes of HW-handled TLS payload */
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| /linux/drivers/thermal/ti-soc-thermal/ |
| H A D | ti-bandgap.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
13 #include <linux/types.h>
26 * +----------+----------------+
28 * +---------------------------+
32 * +-------------------+ +-----------------+
33 * | struct ti_bandgap |-->| struct device * |
34 * +----------+--------+ +-----------------+
38 * +------------------------+
40 * +------------------------+
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| /linux/include/uapi/linux/usb/ |
| H A D | ch11.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
13 #include <linux/types.h> /* __u8 etc */
16 * From USB 2.0 spec Table 11-13, offset 7, a hub can
24 /* See USB 3.1 spec Table 10-5 */
28 * Hub request types
36 * See USB 3.1 spec Table 10-12
44 * See USB 2.0 spec Table 11-16
53 * See USB 3.0 spec Table 10-6
60 * See USB 2.0 spec Table 11-17
67 * See USB 2.0 spec Table 11-17
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| /linux/Documentation/driver-api/dmaengine/ |
| H A D | provider.rst | 20 DMA-eligible devices to the controller itself. Whenever the device
44 transfer into smaller sub-transfers.
49 non-contiguous buffers to a contiguous buffer, which is called
50 scatter-gather.
53 scatter-gather. So we're left with two cases here: either we have a
56 that implements in hardware scatter-gather.
79 These were just the general memory-to-memory (also called mem2mem) or
80 memory-to-device (mem2dev) kind of transfers. Most devices often
98 documentation file in Documentation/crypto/async-tx-api.rst.
104 ------------------------------------
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| /linux/include/ufs/ |
| H A D | ufshci.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Copyright (C) 2011-2013 Samsung India Software Operations
14 #include <linux/types.h>
129 #define UFS_MASK(mask, offset) ((mask) << (offset)) argument
138 * - 2.x and newer use the following scheme:
140 * - 1.x has been converted to match this in
149 * HCDDID - Host Controller Identification Descriptor
150 * - Device ID and Device Class 10h
156 * HCPMID - Host Controller Identification Descriptor
157 * - Product/Manufacturer ID 14h
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| /linux/drivers/spi/ |
| H A D | spi-pxa2xx-dma.c | 1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/dma-mapping.h>
17 #include <linux/types.h>
21 #include "spi-pxa2xx.h"
28 struct spi_message *msg = drv_data->controller->cur_msg; in pxa2xx_spi_dma_transfer_complete()
36 if (atomic_dec_and_test(&drv_data->dma_running)) { in pxa2xx_spi_dma_transfer_complete()
39 * might not know about the error yet. So we re-check the in pxa2xx_spi_dma_transfer_complete()
43 error = read_SSSR_bits(drv_data, drv_data->mask_sr) & SSSR_ROR; in pxa2xx_spi_dma_transfer_complete()
46 clear_SSCR1_bits(drv_data, drv_data->dma_cr1); in pxa2xx_spi_dma_transfer_complete()
47 write_SSSR_CS(drv_data, drv_data->clear_sr); in pxa2xx_spi_dma_transfer_complete()
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| /linux/security/landlock/ |
| H A D | syscalls.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Landlock - System call implementations and user space interfaces
5 * Copyright © 2016-2020 Mickaël Salaün <mic@digikod.net>
6 * Copyright © 2018-2020 ANSSI
7 * Copyright © 2021-2025 Microsoft Corporation
28 #include <linux/types.h>
48 "https://docs.kernel.org/userspace-api/landlock.html#boot-time-configuration\n"); in is_initialized()
53 * copy_min_struct_from_user - Safe future-proof argument copying
71 return -EFAULT; in copy_min_struct_from_user()
77 return -EINVAL; in copy_min_struct_from_user()
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| /linux/drivers/net/ethernet/intel/idpf/ |
| H A D | virtchnl2.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
16 * all the structures in this header follow little-endian format.
90 * enum virtchnl2_vport_type - Type of virtual port.
98 * enum virtchnl2_queue_model - Type of queue model.
102 * In the single queue model, the same transmit descriptor queue is used by
105 * Likewise, the same receive descriptor queue is used by hardware to post
109 * descriptor/buffer completions to software, while software uses transmit
110 * descriptor queues to post descriptors to hardware.
111 * Likewise, hardware posts descriptor completions to the receive descriptor
230 * enum virtchnl2_action_types - Available actions for sideband flow steering
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| H A D | idpf_txrx.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
10 #include <net/libeth/types.h>
81 * in the descriptor will be wrong. Any overwritten descriptors' buffers will
84 * still waiting for descriptor to be done, stalling forever.
88 #define IDPF_RX_BUFQ_WORKING_SET(rxq) ((rxq)->desc_count - 1)
92 if (unlikely(++(ntc) == (rxq)->desc_count)) { \
100 if (unlikely(++(idx) == (q)->desc_count)) \
122 ((((txq)->next_to_clean > (txq)->next_to_use) ? 0 : (txq)->desc_count) + \
123 (txq)->next_to_clean - (txq)->next_to_use - 1)
125 #define IDPF_TX_COMPLQ_OVERFLOW_THRESH(txcq) ((txcq)->desc_count >> 1)
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| /linux/arch/powerpc/boot/dts/fsl/ |
| H A D | pq3-sec2.1-0.dtsi | 39 fsl,num-channels = <4>;
40 fsl,channel-fifo-len = <24>;
41 fsl,exec-units-mask = <0xfe>;
42 fsl,descriptor-types-mask = <0x12b0ebf>;
|