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/linux/tools/perf/pmu-events/arch/x86/ivytown/
H A Duncore-power.json151 … a wake event occurred before the timer expired that causes a transition into the deeper C state.",
160 … a wake event occurred before the timer expired that causes a transition into the deeper C state.",
169 … a wake event occurred before the timer expired that causes a transition into the deeper C state.",
178 … a wake event occurred before the timer expired that causes a transition into the deeper C state.",
187 … a wake event occurred before the timer expired that causes a transition into the deeper C state.",
196 … a wake event occurred before the timer expired that causes a transition into the deeper C state.",
205 … a wake event occurred before the timer expired that causes a transition into the deeper C state.",
214 … a wake event occurred before the timer expired that causes a transition into the deeper C state.",
223 … a wake event occurred before the timer expired that causes a transition into the deeper C state.",
232 … a wake event occurred before the timer expired that causes a transition into the deeper C state.",
[all …]
/linux/tools/power/cpupower/man/
H A Dcpupower-idle-set.146 then all deeper states are disabled as well. Likewise, if one enables a
53 If criteria are not met to enter deeper sleep states and the lightest sleep
H A Dcpupower-monitor.172 This is to wake up the processors from deeper sleep states and let the
110 Threads (hyperthreaded cores) may not be able to enter deeper core states if
/linux/scripts/kconfig/tests/auto_submenu/
H A D__init__.py7 deeper indentation.
/linux/arch/arm/mach-imx/
H A Dcpuidle-imx6q.c63 * applicable to all boards, disable the deeper idle state when the workaround
/linux/drivers/soc/ti/
H A DKconfig39 and standby states on both AM335x and AM437x platforms and for deeper cpuidle
/linux/include/linux/
H A Dadreno-smmu-priv.h25 * log messages and provide deeper GPU specific insight into the fault.
H A Dlis3lv02d.h42 * configure the chip which makes is quite hard to explain deeper meaning of
/linux/drivers/cpuidle/governors/
H A Dteo.c294 * be opportunities to ask for a deeper idle state when no imminent in teo_select()
355 * all of the deeper states, a shallower idle state is likely to be a in teo_select()
428 * are dominant. Namely, it may effectively prevent deeper idle states in teo_select()
/linux/arch/arm/mach-omap2/
H A Domap-smp.c304 * occasionally fail to bring up CPU1 on 4430 if CPU1 fails to enter deeper
334 * deeper idle state in WFI and will wake to an invalid address. in omap4_smp_maybe_reset_cpu1()
/linux/Documentation/leds/
H A Dleds-qcom-lpg.rst23 deeper idle states the LPG provides pattern support. This consists of a shared
/linux/drivers/clk/
H A Dclk-twl6040.c49 * Cold Temperature". This affects cold boot and deeper idle states it
/linux/arch/arm/boot/dts/ti/omap/
H A Domap4-droid4-xt894.dts33 * of the gpio interrupt to avoid lost events in deeper idle states.
/linux/arch/x86/include/asm/
H A Dacpi.h89 * Check if the CPU can handle C2 and deeper
/linux/Documentation/admin-guide/pm/
H A Dintel_idle.rst281 to enter a specific package C-state at the deeper level. For example, the
286 representing a deeper idle state), and in addition to that (in the majority of
/linux/arch/alpha/lib/
H A Dev6-copy_page.S47 In order to improve the code I added deeper prefetching to take the
/linux/mm/kmsan/
H A Dreport.c117 * Origin chains deeper than KMSAN_MAX_ORIGIN_DEPTH are in kmsan_print_origin()
/linux/Documentation/block/
H A Dblk-mq.rst38 the need for a lock. A deeper explanation on how this works is covered in the
/linux/tools/tracing/rtla/src/
H A Dutils.c644 * Disables all idle states deeper than the one given in
645 * deepest_state (assuming states with higher number are deeper).
/linux/tools/power/cpupower/utils/idle_monitor/
H A Damd_fam14h_idle.c53 .desc = N_("Package in sleep state (PC1 or deeper)"),
/linux/include/linux/amba/
H A Dserial.h171 /* special values for ST vendor with deeper fifo */
/linux/Documentation/input/devices/
H A Diforce-protocol.rst32 unknown are marked ??? Information that needs deeper inspection is marked (?)
/linux/tools/perf/pmu-events/arch/x86/broadwellde/
H A Dcache.json437 "PublicDescription": "This event counts retired load uops which data sources were load uops missed L1 but hit a fill buffer due to a preceding miss to the same cache line with the data not ready. Note: Only two data-sources of L1/FB are applicable for AVX-256bit even though the corresponding AVX load could be serviced by a deeper level in the memory hierarchy. Data source is reported for the Low-half load.",
448 "PublicDescription": "This event counts retired load uops which data sources were hits in the nearest-level (L1) cache. Note: Only two data-sources of L1/FB are applicable for AVX-256bit even though the corresponding AVX load could be serviced by a deeper level in the memory hierarchy. Data source is reported for the Low-half load. This event also counts SW prefetches independent of the actual data source.",
/linux/Documentation/bpf/libbpf/
H A Dlibbpf_overview.rst28 This document will delve into the above concepts in detail, providing a deeper
/linux/Documentation/rust/
H A Dquick-start.rst355 To dive deeper, take a look at the source code of the samples

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