Home
last modified time | relevance | path

Searched full:ddr_ctrl (Results 1 – 3 of 3) sorted by relevance

/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dqca,ar7100-cpu-intc.yaml55 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
56 <&ddr_ctrl 0>, <&ddr_ctrl 1>;
59 ddr_ctrl: memory-controller {
/linux/drivers/memory/
H A Dbrcmstb_memc.c31 void __iomem *ddr_ctrl; member
39 void __iomem *config = memc->ddr_ctrl + REG_MEMC_CNTRLR_CONFIG; in brcmstb_memc_uses_lpddr4()
50 void __iomem *cfg = memc->ddr_ctrl + memc->srpd_offset; in brcmstb_memc_srpd_config()
141 memc->ddr_ctrl = devm_platform_ioremap_resource(pdev, 0); in brcmstb_memc_probe()
142 if (IS_ERR(memc->ddr_ctrl)) in brcmstb_memc_probe()
143 return PTR_ERR(memc->ddr_ctrl); in brcmstb_memc_probe()
199 void __iomem *cfg = memc->ddr_ctrl + memc->srpd_offset; in brcmstb_memc_suspend()
/linux/arch/mips/include/asm/mach-ath79/
H A Dar71xx_regs.h201 * DDR_CTRL block