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/linux/drivers/regulator/
H A Dwm831x-dcdc.c3 // wm831x-dcdc.c -- DC-DC buck converter driver for the WM831x series
62 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); in wm831x_dcdc_get_mode() local
63 struct wm831x *wm831x = dcdc->wm831x; in wm831x_dcdc_get_mode()
64 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; in wm831x_dcdc_get_mode()
116 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); in wm831x_dcdc_set_mode() local
117 struct wm831x *wm831x = dcdc->wm831x; in wm831x_dcdc_set_mode()
118 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; in wm831x_dcdc_set_mode()
126 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); in wm831x_dcdc_set_suspend_mode() local
127 struct wm831x *wm831x = dcdc->wm831x; in wm831x_dcdc_set_suspend_mode()
128 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL; in wm831x_dcdc_set_suspend_mode()
[all …]
H A Datc260x-regulator.c172 .name = "DCDC"#num, \
173 .supply_name = "dcdc"#num, \
174 .of_match = of_match_ptr("dcdc"#num), \
191 .name = "DCDC"#num, \
192 .supply_name = "dcdc"#num, \
193 .of_match = of_match_ptr("dcdc"#num), \
210 .name = "DCDC"#num, \
211 .supply_name = "dcdc"#num, \
212 .of_match = of_match_ptr("dcdc"#num), \
339 .name = "DCDC"#num, \
[all …]
H A Dtps65023-regulator.c171 int dcdc = rdev_get_id(dev); in tps65023_dcdc_get_voltage_sel() local
173 if (dcdc < TPS65023_DCDC_1 || dcdc > TPS65023_DCDC_3) in tps65023_dcdc_get_voltage_sel()
176 if (dcdc != tps->driver_data->core_regulator) in tps65023_dcdc_get_voltage_sel()
186 int dcdc = rdev_get_id(dev); in tps65023_dcdc_set_voltage_sel() local
188 if (dcdc != tps->driver_data->core_regulator) in tps65023_dcdc_set_voltage_sel()
/linux/drivers/leds/
H A Dleds-wm8350.c101 ret = regulator_enable(led->dcdc); in wm8350_led_enable()
103 dev_err(led->cdev.dev, "Failed to enable DCDC: %d\n", ret); in wm8350_led_enable()
120 ret = regulator_disable(led->dcdc); in wm8350_led_disable()
122 dev_err(led->cdev.dev, "Failed to disable DCDC: %d\n", ret); in wm8350_led_disable()
129 ret = regulator_enable(led->dcdc); in wm8350_led_disable()
131 dev_err(led->cdev.dev, "Failed to reenable DCDC: %d\n", in wm8350_led_disable()
188 struct regulator *isink, *dcdc; in wm8350_led_probe() local
210 dcdc = devm_regulator_get(&pdev->dev, "led_vcc"); in wm8350_led_probe()
211 if (IS_ERR(dcdc)) { in wm8350_led_probe()
212 dev_err(&pdev->dev, "%s: can't get DCDC\n", __func__); in wm8350_led_probe()
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588-evb2-v10.dts272 vdd_gpu_s0: dcdc-reg1 {
288 vdd_npu_s0: dcdc-reg2 {
300 vdd_log_s0: dcdc-reg3 {
313 vdd_vdenc_s0: dcdc-reg4 {
326 vdd_gpu_mem_s0: dcdc-reg5 {
343 vdd_npu_mem_s0: dcdc-reg6 {
356 vcc_2v0_pldo_s3: dcdc-reg7 {
369 vdd_vdenc_mem_s0: dcdc-reg8 {
381 vdd2_ddr_s3: dcdc-reg9 {
390 vcc_1v1_nldo_s3: dcdc-reg10 {
[all …]
H A Drk3588-firefly-core-3588j.dtsi178 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
191 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
204 vdd_log_s0: dcdc-reg3 {
218 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
231 vdd_ddr_s0: dcdc-reg5 {
245 vdd2_ddr_s3: dcdc-reg6 {
255 vcc_2v0_pldo_s3: dcdc-reg7 {
268 vcc_3v3_s3: dcdc-reg8 {
281 vddq_ddr_s0: dcdc-reg9 {
291 vcc_1v8_s3: dcdc-reg10 {
H A Drk3588-armsom-lm7.dtsi189 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
202 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
215 vdd_log_s0: dcdc-reg3 {
229 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
242 vdd_ddr_s0: dcdc-reg5 {
256 vdd2_ddr_s3: dcdc-reg6 {
266 vcc_2v0_pldo_s3: dcdc-reg7 {
280 vcc_3v3_s3: dcdc-reg8 {
293 vddq_ddr_s0: dcdc-reg9 {
303 vcc_1v8_s3: dcdc-reg10 {
H A Drk3588-firefly-icore-3588q.dtsi175 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
188 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
201 vdd_log_s0: dcdc-reg3 {
215 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
228 vdd_ddr_s0: dcdc-reg5 {
242 vdd2_ddr_s3: dcdc-reg6 {
252 vcc_2v0_pldo_s3: dcdc-reg7 {
265 vcc_3v3_s3: dcdc-reg8 {
278 vddq_ddr_s0: dcdc-reg9 {
288 vcc_1v8_s3: dcdc-reg10 {
H A Drk3588-edgeble-neu6a-common.dtsi206 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
219 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
232 vdd_log_s0: dcdc-reg3 {
246 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
259 vdd_ddr_s0: dcdc-reg5 {
273 vdd2_ddr_s3: dcdc-reg6 {
283 vcc_2v0_pldo_s3: dcdc-reg7 {
297 vcc_3v3_s3: dcdc-reg8 {
310 vddq_ddr_s0: dcdc-reg9 {
320 vcc_1v8_s3: dcdc-reg10 {
H A Drk3588s-evb1-v10.dts528 vdd_gpu_s0: dcdc-reg1 {
541 vdd_npu_s0: dcdc-reg2 {
554 vdd_log_s0: dcdc-reg3 {
568 vdd_vdenc_s0: dcdc-reg4 {
581 vdd_gpu_mem_s0: dcdc-reg5 {
594 vdd_npu_mem_s0: dcdc-reg6 {
607 vcc_2v0_pldo_s3: dcdc-reg7 {
621 vdd_vdenc_mem_s0: dcdc-reg8 {
634 vdd2_ddr_s3: dcdc-reg9 {
644 vcc_1v1_nldo_s3: dcdc-reg10 {
[all …]
H A Drk3588-fet3588-c.dtsi287 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
300 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
313 vdd_log_s0: dcdc-reg3 {
327 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
340 vdd_ddr_s0: dcdc-reg5 {
354 vdd2_ddr_s3: dcdc-reg6 {
364 vcc_2v0_pldo_s3: dcdc-reg7 {
378 vcc_3v3_s3: dcdc-reg8 {
391 vddq_ddr_s0: dcdc-reg9 {
401 vcc_1v8_s3: dcdc-reg10 {
H A Drk3588-evb1-v10.dts734 vdd_gpu_s0: dcdc-reg1 {
750 vdd_npu_s0: dcdc-reg2 {
762 vdd_log_s0: dcdc-reg3 {
775 vdd_vdenc_s0: dcdc-reg4 {
788 vdd_gpu_mem_s0: dcdc-reg5 {
805 vdd_npu_mem_s0: dcdc-reg6 {
818 vcc_2v0_pldo_s3: dcdc-reg7 {
831 vdd_vdenc_mem_s0: dcdc-reg8 {
843 vdd2_ddr_s3: dcdc-reg9 {
852 vcc_1v1_nldo_s3: dcdc-reg10 {
[all …]
H A Drk3588-friendlyelec-cm3588.dtsi385 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
398 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
411 vdd_log_s0: dcdc-reg3 {
425 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
438 vdd_ddr_s0: dcdc-reg5 {
452 vdd2_ddr_s3: dcdc-reg6 {
462 vcc_2v0_pldo_s3: dcdc-reg7 {
476 vcc_3v3_s3: dcdc-reg8 {
489 vddq_ddr_s0: dcdc-reg9 {
499 vcc_1v8_s3: dcdc-reg10 {
H A Drk3588-coolpi-cm5.dtsi385 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
398 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
411 vdd_log_s0: dcdc-reg3 {
425 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
438 vdd_ddr_s0: dcdc-reg5 {
452 vdd2_ddr_s3: dcdc-reg6 {
462 vcc_2v0_pldo_s3: dcdc-reg7 {
476 vcc_3v3_s3: dcdc-reg8 {
489 vddq_ddr_s0: dcdc-reg9 {
499 vcc_1v8_s3: dcdc-reg10 {
H A Drk3588-toybrick-x0.dts389 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
402 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
415 vdd_log_s0: dcdc-reg3 {
429 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
442 vdd_ddr_s0: dcdc-reg5 {
456 vdd2_ddr_s3: dcdc-reg6 {
466 vcc_2v0_pldo_s3: dcdc-reg7 {
479 vcc_3v3_s3: dcdc-reg8 {
492 vddq_ddr_s0: dcdc-reg9 {
502 vcc_1v8_s3: dcdc-reg10 {
H A Drk3576-luckfox-core3576.dtsi366 vdd_cpu_big_s0: dcdc-reg1 {
380 vdd_npu_s0: dcdc-reg2 {
393 vdd_cpu_lit_s0: dcdc-reg3 {
407 vcc_3v3_s3: dcdc-reg4 {
420 vdd_gpu_s0: dcdc-reg5 {
434 vddq_ddr_s0: dcdc-reg6 {
444 vdd_logic_s0: dcdc-reg7 {
456 vcc_1v8_s3: dcdc-reg8 {
469 vdd2_ddr_s3: dcdc-reg9 {
479 vdd_ddr_s0: dcdc-reg10 {
H A Drk3588-turing-rk1.dtsi400 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
413 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
426 vdd_log_s0: dcdc-reg3 {
440 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
453 vdd_ddr_s0: dcdc-reg5 {
467 vdd2_ddr_s3: dcdc-reg6 {
477 vcc_2v0_pldo_s3: dcdc-reg7 {
491 vcc_3v3_s3: dcdc-reg8 {
504 vddq_ddr_s0: dcdc-reg9 {
514 vcc_1v8_s3: dcdc-reg10 {
H A Drk3588-tiger.dtsi462 vdd_gpu_s0: dcdc-reg1 {
475 vdd_cpu_lit_s0: dcdc-reg2 {
488 vdd_log_s0: dcdc-reg3 {
502 vdd_vdenc_s0: dcdc-reg4 {
515 vdd_ddr_s0: dcdc-reg5 {
529 vdd2_ddr_s3: dcdc-reg6 {
539 vcc_2v0_pldo_s3: dcdc-reg7 {
553 vcc_3v3_s3: dcdc-reg8 {
566 vddq_ddr_s0: dcdc-reg9 {
576 vcc_1v8_s3: dcdc-reg10 {
H A Drk3582-radxa-e52c.dts441 vdd_gpu_s0: dcdc-reg1 {
454 vdd_cpu_lit_s0: dcdc-reg2 {
467 vdd_logic_s0: dcdc-reg3 {
481 vdd_vdenc_s0: dcdc-reg4 {
494 vdd_ddr_s0: dcdc-reg5 {
508 vdd2_ddr_s3: dcdc-reg6 {
518 vcc_2v0_pldo_s3: dcdc-reg7 {
531 vcc_3v3_s3: vcc_3v3_pmu: dcdc-reg8 {
544 vddq_ddr_s0: dcdc-reg9 {
554 vcc_1v8_s3: dcdc-reg10 {
H A Drk3588-h96-max-v58.dts485 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
498 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
511 vdd_log_s0: dcdc-reg3 {
525 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
538 vdd_ddr_s0: dcdc-reg5 {
552 vdd2_ddr_s3: dcdc-reg6 {
562 vcc_2v0_pldo_s3: dcdc-reg7 {
576 vcc_3v3_s3: dcdc-reg8 {
589 vddq_ddr_s0: dcdc-reg9 {
599 vcc_1v8_s3: dcdc-reg10 {
H A Drk3588s-khadas-edge2.dts465 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
478 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
491 vdd_log_s0: dcdc-reg3 {
505 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
518 vdd_ddr_s0: dcdc-reg5 {
532 vdd2_ddr_s3: dcdc-reg6 {
542 vcc_2v0_pldo_s3: dcdc-reg7 {
556 vcc_3v3_s3: dcdc-reg8 {
569 vddq_ddr_s0: dcdc-reg9 {
579 vcc_1v8_s3: dcdc-reg10 {
/linux/Documentation/devicetree/bindings/mfd/
H A Dx-powers,axp152.yaml26 x-powers,dcdc-freq:
35 x-powers,dcdc-freq:
92 x-powers,dcdc-freq: false
274 x-powers,dcdc-freq:
280 …"^(([a-f])?ldo[0-9]|dcdc[0-7a-e]|ldo(_|-)io(0|1)|(dc1)?sw|rtc(_|-)ldo|cpusldo|drivevbus|dc5ldo|boo…
295 x-powers,dcdc-workmode:
299 Only valid for DCDC regulators. Setup 1 for PWM mode, 0
300 for AUTO (PWM/PFM) mode. The DCDC regulators work in a
373 x-powers,dcdc-freq = <1500>;
/linux/include/linux/mfd/wm8350/
H A Dpmic.h112 * R176 (0xB0) - DCDC/LDO requested
127 * R177 (0xB1) - DCDC Active options
137 * R178 (0xB2) - DCDC Sleep options
595 * DCDC's
604 /* DCDC modes */
610 /* DCDC Low power (Hibernate) mode */
619 /* DCDC Low Power (Hibernate) signal */
723 struct regulator *dcdc; member
733 /* ISINK to DCDC mapping */
752 int wm8350_register_led(struct wm8350 *wm8350, int lednum, int dcdc, int isink,
[all …]
/linux/Documentation/devicetree/bindings/regulator/
H A Dtps65090.txt11 dcdc[1-3], fet[1-7] and ldo[1-2] respectively.
12 - vsys[1-3]-supply: The input supply for DCDC[1-3] respectively.
19 - dcdc-ext-control-gpios: This is applicable for DCDC1, DCDC2 and DCDC3.
57 dcdc-ext-control-gpios = <&gpio 10 0>;
/linux/Documentation/devicetree/bindings/display/panel/
H A Djdi,lt070me05000.yaml34 dcdc-en-gpios:
49 - dcdc-en-gpios
70 dcdc-en-gpios = <&pm8921_gpio 23 GPIO_ACTIVE_HIGH>;

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