| /linux/Documentation/driver-api/dmaengine/ |
| H A D | provider.rst | 20 DMA-eligible devices to the controller itself. Whenever the device
21 will want to start a transfer, it will assert a DMA request (DRQ) by
25 parameter: the transfer size. At each clock cycle, it would transfer a
26 byte of data from one buffer to another, until the transfer size has
31 cycle. For example, we may want to transfer as much data as the
34 that requires data to be written exactly 16 or 24 bits at a time. This
36 parameter called the transfer width.
44 transfer into smaller sub-transfers.
47 that involve a single contiguous block of data. However, some of the
48 transfers we usually have are not, and want to copy data from
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| /linux/Documentation/mhi/ |
| H A D | mhi.rst | 1 .. SPDX-License-Identifier: GPL-2.0
17 modem protocols, such as IP data packets, modem control messages, and
19 protocol provides data acknowledgment feature and manages the power state of the
26 ----
47 Data structures
48 ---------------
50 All data structures used by MHI are in the host system memory. Using the
51 physical interface, the device accesses those data structures. MHI data
52 structures and data buffers in the host system memory regions are mapped for
56 context data array.
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| H A D | topology.rst | 1 .. SPDX-License-Identifier: GPL-2.0
11 --------------
16 It is however not involved in the actual data transfer as the data transfer
30 ----------
33 for bi-directional communication. Once MHI is in powered on state, the MHI
43 ----------
46 driver sends and receives the upper-layer protocol packets like IP packets,
57 * Prepares the device for transfer by calling mhi_prepare_for_transfer.
58 * Initiates data transfer by calling mhi_queue_transfer.
59 * Once the data transfer is finished, calls mhi_unprepare_from_transfer to
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| /linux/drivers/net/wireless/ralink/rt2x00/ |
| H A D | rt2x00crypto.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
21 switch (key->cipher) { in rt2x00crypto_key_to_cipher()
40 struct ieee80211_key_conf *hw_key = tx_info->control.hw_key; in rt2x00crypto_create_tx_descriptor()
45 __set_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags); in rt2x00crypto_create_tx_descriptor()
47 txdesc->cipher = rt2x00crypto_key_to_cipher(hw_key); in rt2x00crypto_create_tx_descriptor()
49 if (hw_key->flags & IEEE80211_KEY_FLAG_PAIRWISE) in rt2x00crypto_create_tx_descriptor()
50 __set_bit(ENTRY_TXD_ENCRYPT_PAIRWISE, &txdesc->flags); in rt2x00crypto_create_tx_descriptor()
52 txdesc->key_idx = hw_key->hw_key_idx; in rt2x00crypto_create_tx_descriptor()
53 txdesc->iv_offset = txdesc->header_length; in rt2x00crypto_create_tx_descriptor()
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| /linux/drivers/mtd/devices/ |
| H A D | mchp23k256.c | 1 // SPDX-License-Identifier: GPL-2.0-only
51 for (i = flash->caps->addr_width; i > 0; i--, addr >>= 8) in mchp23k256_addr2cmd()
57 return 1 + flash->caps->addr_width; in mchp23k256_cmdsz()
64 struct spi_transfer transfer[2] = {}; in mchp23k256_write() local
76 transfer[0].tx_buf = command; in mchp23k256_write()
77 transfer[0].len = cmd_len; in mchp23k256_write()
78 spi_message_add_tail(&transfer[0], &message); in mchp23k256_write()
80 transfer[1].tx_buf = buf; in mchp23k256_write()
81 transfer[1].len = len; in mchp23k256_write()
82 spi_message_add_tail(&transfer[1], &message); in mchp23k256_write()
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| /linux/drivers/spi/ |
| H A D | spi-mpc52xx.c | 1 // SPDX-License-Identifier: GPL-2.0-only
31 MODULE_DESCRIPTION("MPC52xx SPI (non-PSC) Driver");
64 /* Driver internal data */
84 /* Details of current transfer (length, and buffer pointers) */
86 struct spi_transfer *transfer; /* current transfer */ member
87 int (*state)(int irq, struct mpc52xx_spi *ms, u8 status, u8 data);
104 if (ms->gpio_cs_count > 0) { in mpc52xx_spi_chipsel()
105 cs = spi_get_chipselect(ms->message->spi, 0); in mpc52xx_spi_chipsel()
106 gpiod_set_value(ms->gpio_cs[cs], value); in mpc52xx_spi_chipsel()
108 out_8(ms->regs + SPI_PORTDATA, value ? 0 : 0x08); in mpc52xx_spi_chipsel()
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| H A D | spi-dw-core.c | 1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/dma-mapping.h>
18 #include <linux/spi/spi-mem.h>
23 #include "spi-dw.h"
66 snprintf(name, 32, "dw_spi%d", dws->host->bus_num); in dw_spi_debugfs_init()
67 dws->debugfs = debugfs_create_dir(name, NULL); in dw_spi_debugfs_init()
69 dws->regset.regs = dw_spi_dbgfs_regs; in dw_spi_debugfs_init()
70 dws->regset.nregs = ARRAY_SIZE(dw_spi_dbgfs_regs); in dw_spi_debugfs_init()
71 dws->regset.base = dws->regs; in dw_spi_debugfs_init()
72 debugfs_create_regset32("registers", 0400, dws->debugfs, &dws->regset); in dw_spi_debugfs_init()
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| H A D | spi-davinci.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
16 #include <linux/dma-mapping.h>
22 #include <linux/platform_data/spi-davinci.h>
103 /* SPI Controller driver's private data. */
134 static void davinci_spi_rx_buf_u8(u32 data, struct davinci_spi *dspi) in davinci_spi_rx_buf_u8() argument
136 if (dspi->rx) { in davinci_spi_rx_buf_u8()
137 u8 *rx = dspi->rx; in davinci_spi_rx_buf_u8()
138 *rx++ = (u8)data; in davinci_spi_rx_buf_u8()
139 dspi->rx = rx; in davinci_spi_rx_buf_u8()
143 static void davinci_spi_rx_buf_u16(u32 data, struct davinci_spi *dspi) in davinci_spi_rx_buf_u16() argument
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| /linux/include/linux/spi/ |
| H A D | spi.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later
36 * INTERFACES between SPI master-side drivers and SPI slave protocol handlers,
42 * struct spi_statistics - statistics for spi transfers
43 * @syncp: seqcount to protect members in this struct for per-cpu update
44 * on 32-bit systems
46 * @messages: number of spi-messages handled
62 * transfer bytes histogram
95 u64_stats_update_begin(&__lstats->syncp); \
96 u64_stats_add(&__lstats->field, count); \
97 u64_stats_update_end(&__lstats->syncp); \
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| /linux/Documentation/networking/ |
| H A D | plip.rst | 1 .. SPDX-License-Identifier: GPL-2.0
14 -----------------
17 This device interface allows a point-to-point connection between two
25 printer port. PLIP is a non-standard, but [can use] uses the standard
26 LapLink null-printer cable [can also work in turbo mode, with a PLIP
62 -------------------
72 PLIP driver is signaled whenever data is sent to it via the cable, such that
73 when no data is available, the driver isn't being used.
77 On these machines, the PLIP driver can be used in IRQ-less mode, where
78 the PLIP driver would constantly poll the parallel port for data waiting,
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| /linux/Documentation/arch/arm/stm32/ |
| H A D | stm32-dma-mdma-chaining.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 STM32 DMA-MDMA chaining
9 ------------
11 This document describes the STM32 DMA-MDMA chaining feature. But before going
14 To offload data transfers from the CPU, STM32 microprocessors (MPUs) embed
28 STM32 DMA is mainly used to implement central data buffer storage (usually in
30 without the ability to generate convenient burst transfer ensuring the best
35 STM32 MDMA (Master DMA) is mainly used to manage direct data transfers between
36 RAM data buffers without CPU intervention. It can also be used in a
37 hierarchical structure that uses STM32 DMA as first level data buffer
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| /linux/drivers/i3c/master/mipi-i3c-hci/ |
| H A D | xfer_mode_rate.h | 1 /* SPDX-License-Identifier: BSD-3-Clause */
7 * Transfer Mode/Rate Table definitions as found in extended capability
16 * Master Transfer Mode Table Fixed Indexes.
23 #define XFERMODE_IDX_I3C_HDR_DDR 0x01 /* I3C HDR-DDR Mode */
24 #define XFERMODE_IDX_I3C_HDR_T 0x02 /* I3C HDR-Ternary Mode */
25 #define XFERMODE_IDX_I3C_HDR_BT 0x03 /* I3C HDR-BT Mode */
29 * Transfer Mode Table Entry Bits Definitions
38 * Master Data Transfer Rate Selector Values.
44 * Data Transfer Rate Table. Indicated are typical rates. The actual
45 * rates may vary slightly and are also specified in the Data Transfer
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| H A D | cmd_v1.c | 1 // SPDX-License-Identifier: BSD-3-Clause
33 * Immediate Data Transfer Command
54 * Regular Data Transfer Command
72 * Combo Transfer (Write + Write/Read) Command
104 /* Data Transfer Speed and Mode */
124 struct i3c_bus *bus = i3c_master_get_bus(&hci->master); in get_i3c_mode()
126 if (bus->scl_rate.i3c > 8000000) in get_i3c_mode()
128 if (bus->scl_rate.i3c > 6000000) in get_i3c_mode()
130 if (bus->scl_rate.i3c > 4000000) in get_i3c_mode()
132 if (bus->scl_rate.i3c > 2000000) in get_i3c_mode()
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| /linux/drivers/scsi/ |
| H A D | dc395x.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
8 /* (SCSI chip set used Tekram ASIC TRM-S1040) */
175 /* cmd->result */
182 /* Inquiry Data format */
190 u8 RDF; /* AEN, TRMIOP, & response data format */
191 u8 AddLen; /* length of additional data */
217 /* Inquiry flag definitions (Inq data byte 7) */
221 #define SCSI_INQ_WBUS32 0x40 /* device supports 32 bit data xfers */
222 #define SCSI_INQ_WBUS16 0x20 /* device supports 16 bit data xfers */
250 #define SCSIXFERDONE 0x0800 /* SCSI SCSI transfer done */
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| /linux/arch/sh/drivers/pci/ |
| H A D | pci-sh4.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
8 #include "pci-sh7780.h"
10 #include "pci-sh7751.h"
40 #define SH4_PCIINT_MTABT 0x00000008 /* Master-Tgt. Abort Error */
41 #define SH4_PCIINT_MMABT 0x00000004 /* Master-Master Abort Error */
45 #define SH4_PCIINTM_TTADIM BIT(14) /* Target-target abort interrupt */
50 #define SH4_PCIINTM_DPEITWM BIT(5) /* Data parity error for target write */
54 #define SH4_PCIINTM_MWPDIM BIT(1) /* Master write data parity error */
55 #define SH4_PCIINTM_MRDPEIM BIT(0) /* Master read data parity error */
57 #define SH4_PCICLR 0x120 /* Error Command/Data */
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| /linux/drivers/usb/image/ |
| H A D | microtek.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * (C) Copyright 2000 Oliver Neukum <Oliver.Neukum@lrz.uni-muenchen.de>
7 * Parts shamelessly stolen from usb-storage and copyright by their
19 * commands and outgoing data are sent, and two input: 0x82 from which
20 * normal data is read from the scanner (in packets of maximum 32
36 * If there is data to receive:
38 * Read a lot of data from EP 0x83
40 * Read data from EP 0x82
42 * If there is data to transmit:
73 * 20000514 Fix reporting of non-existent devices to SCSI layer (john)
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| /linux/Documentation/devicetree/bindings/dma/stm32/ |
| H A D | st,stm32-mdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-mdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The STM32 MDMA is a general-purpose direct memory access controller capable of
13 described in the dma.txt file, using a five-cell specifier for each channel:
22 -bit 0-1: Source increment mode
24 0x2: Source address pointer is incremented after each data transfer
25 0x3: Source address pointer is decremented after each data transfer
26 -bit 2-3: Destination increment mode
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| /linux/include/linux/hsi/ |
| H A D | hsi.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
36 HSI_ARB_RR, /* Round-robin arbitration */
44 HSI_STATUS_COMPLETED, /* Message transfer is completed */
46 HSI_STATUS_PROCEEDING, /* Message transfer is ongoing */
48 HSI_STATUS_ERROR, /* Error when message transfer was ongoing */
58 * struct hsi_channel - channel resource used by the hsi clients
68 * struct hsi_config - Configuration for RX/TX HSI modules
90 * struct hsi_board_info - HSI client board info
96 * @platform_data: Platform related data
97 * @archdata: Architecture-dependent device data
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| /linux/drivers/char/xilinx_hwicap/ |
| H A D | buffer_icap.c | 24 * (c) Copyright 2003-2008 Xilinx Inc.
40 #define XHI_DEVICE_READ_ERROR -1
41 #define XHI_DEVICE_WRITE_ERROR -2
42 #define XHI_BUFFER_OVERFLOW_ERROR -3
47 /* Constants for checking transfer status */
53 /* Size of transfer, read & write */
57 /* Read not Configure, direction of transfer. Write only */
59 /* Indicates transfer complete. Read only */
73 * buffer_icap_get_status - Get the contents of the status register.
78 * D8 - cfgerr
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| /linux/include/uapi/linux/ |
| H A D | rio_mport_cdev.h | 1 /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */
3 * Copyright (c) 2015-2016, Integrated Device Technology Inc.
11 * License(GPL) Version 2, or the BSD-3 Clause license below:
33 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
52 __u64 buffer; /* pointer to data buffer */
56 * Definitions for RapidIO data transfers:
57 * - memory mapped (MAPPED)
58 * - packet generation from memory (TRANSFER)
82 __u32 transfer_mode; /* Default transfer mode */
85 __u32 cap_transfer_mode; /* Capable transfer modes */
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| /linux/drivers/cxl/core/ |
| H A D | memdev.c | 1 // SPDX-License-Identifier: GPL-2.0-only
4 #include <linux/io-64-nonatomic-lo-hi.h>
29 ida_free(&cxl_memdev_ida, cxlmd->id); in cxl_memdev_release()
43 struct cxl_dev_state *cxlds = cxlmd->cxlds; in firmware_version_show()
48 return sysfs_emit(buf, "%.16s\n", mds->firmware_version); in firmware_version_show()
56 struct cxl_dev_state *cxlds = cxlmd->cxlds; in payload_max_show()
61 return sysfs_emit(buf, "%zu\n", cxlds->cxl_mbox.payload_size); in payload_max_show()
69 struct cxl_dev_state *cxlds = cxlmd->cxlds; in label_storage_size_show()
74 return sysfs_emit(buf, "%zu\n", mds->lsa_size); in label_storage_size_show()
82 struct cxl_dev_state *cxlds = cxlmd->cxlds; in ram_size_show()
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| /linux/drivers/media/usb/dvb-usb-v2/ |
| H A D | mxl111sf.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2010-2014 Michael Krufky (mkrufky@linuxtv.org)
5 * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information
17 #include <media/media-entity.h>
19 /* Max transfer size done by I2C transfer functions */
81 /* use usb alt setting 1 for EP4 ISOC transfer (dvb-t),
82 EP5 BULK transfer (atsc-mh),
83 EP6 BULK transfer (atsc/qam),
84 use usb alt setting 2 for EP4 BULK transfer (dvb-t),
85 EP5 ISOC transfer (atsc-mh),
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| /linux/drivers/scsi/arm/ |
| H A D | fas216.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1997-2000 Russell King
19 /* transfer count low */
23 /* transfer count medium */
27 /* fifo data */
59 #define STAT_TRANSFERDONE (1 << 3) /* Transfer completed */
60 #define STAT_TRANSFERCNTZ (1 << 4) /* Transfer counter is zero */
66 #define STAT_DATAOUT (0) /* Data out */
67 #define STAT_DATAIN (STAT_IO) /* Data in */
101 /* Transfer period step (write) */
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| /linux/Documentation/driver-api/usb/ |
| H A D | error-codes.rst | 1 .. _usb-error-codes:
6 :Revised: 2004-Oct-21
13 behave the same except for transfer speed dependent behaviors and the
20 Non-USB-specific:
26 ``-ENOMEM`` no memory for allocation of internal structures
29 USB-specific:
32 ``-EBUSY`` The URB is already active.
34 ``-ENODEV`` specified USB-device or bus doesn't exist
36 ``-ENOENT`` specified interface or endpoint does not exist or
39 ``-ENXIO`` host controller driver does not support queuing of
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| /linux/drivers/net/ethernet/qualcomm/ |
| H A D | qca_spi.c | 1 // SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
8 * kernel-based SPI device; it is essentially an Ethernet-to-SPI
47 MODULE_PARM_DESC(qcaspi_clkspeed, "SPI bus clock speed (Hz). Use 1000000-16000000.");
53 MODULE_PARM_DESC(qcaspi_burst_len, "Number of data bytes per burst. Use 1-5000.");
65 MODULE_PARM_DESC(wr_verify, "SPI register write verify trails. Use 0-3.");
77 netdev_dbg(qca->net_dev, "interrupts: 0x%04x\n", *intr_cause); in start_spi_intr_handling()
90 netdev_dbg(qca->net_dev, "acking int: 0x%04x\n", intr_cause); in end_spi_intr_handling()
98 struct spi_transfer transfer[2]; in qcaspi_write_burst() local
101 memset(&transfer, 0, sizeof(transfer)); in qcaspi_write_burst()
105 transfer[0].tx_buf = &cmd; in qcaspi_write_burst()
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