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/freebsd/sys/contrib/device-tree/src/riscv/sifive/
H A Dfu540-c000.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2018-2019 SiFive, Inc */
4 /dts-v1/;
6 #include <dt-bindings/clock/sifive-fu540-prci.h>
9 #address-cells = <2>;
10 #size
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H A Dfu740-c000.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 /dts-v1/;
6 #include <dt-bindings/clock/sifive-fu740-prci.h>
9 #address-cells = <2>;
10 #size-cell
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/freebsd/sys/contrib/device-tree/src/riscv/microchip/
H A Dmicrochip-mpfs.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020-2021 Microchip Technology Inc */
4 /dts-v1/;
5 #include "dt-bindings/clock/microchip,mpfs-clock.h"
6 #include "microchip-mpfs-fabric.dtsi"
9 #address-cells = <2>;
10 #size-cells = <2>;
15 #address-cells = <1>;
16 #size-cells = <0>;
21 i-cache-block-size = <64>;
[all …]
H A Dmpfs.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020-2021 Microchip Technology Inc */
4 /dts-v1/;
5 #include "dt-bindings/clock/microchip,mpfs-clock.h"
8 #address-cells = <2>;
9 #size-cells = <2>;
14 #address-cells = <1>;
15 #size-cells = <0>;
16 timebase-frequency = <1000000>;
21 i-cache-block-size = <64>;
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/freebsd/sys/contrib/device-tree/Bindings/riscv/
H A Dcpus.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V CPUs
10 - Paul Walmsley <paul.walmsley@sifive.com>
11 - Palmer Dabbelt <palmer@sifive.com>
12 - Conor Dooley <conor@kernel.org>
15 This document uses some terminology common to the RISC-V community
19 mandated by the RISC-V ISA: a PC and some registers. This
27 - $ref: /schemas/cpu.yaml#
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/freebsd/sys/contrib/device-tree/src/riscv/thead/
H A Dth1520.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/clock/thead,th1520-clk-ap.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <1>;
17 #size-cells = <0>;
18 timebase-frequency = <3000000>;
24 riscv,isa-base = "rv64i";
25 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
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/freebsd/sys/contrib/device-tree/src/riscv/kendryte/
H A Dk210.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/k210-clk.h>
10 * Although the K210 is a 64-bit CPU, the address bus is only 32-bits
13 #address-cells = <1>;
14 #size-cells = <1>;
23 * Since this is a non-ratified draft specification, the kernel does not
28 #address-cells = <1>;
29 #size-cells = <0>;
30 timebase-frequency = <7800000>;
36 mmu-type = "none";
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/freebsd/sys/contrib/openzfs/man/man8/
H A Dzdb.81 .\" SPDX-License-Identifier: CDDL-1.0
29 .Op Fl I Ar inflight-I/O-ops
32 .Op Fl U Ar cache
35 .Op Ar poolname Ns Op / Ns Ar dataset Ns | Ns Ar objset-ID
40 .Op Fl U Ar cache
42 .Ar poolname Ns Op Ar / Ns Ar dataset Ns | Ns Ar objset-ID
47 .Op Fl U Ar cache
49 .Ar poolname Ns Ar / Ns Ar objset-ID
50 .Op Ar backup-flags
54 .Op Fl U Ar cache
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/freebsd/sys/contrib/device-tree/src/riscv/starfive/
H A Djh7100.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
8 #include <dt-bindings/clock/starfive-jh7100.h>
9 #include <dt-bindings/reset/starfive-jh7100.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
17 #address-cells = <1>;
18 #size-cells = <0>;
21 compatible = "sifive,u74-mc", "riscv";
23 d-cache-block-size = <64>;
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H A Djh7110.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
8 #include <dt-bindings/clock/starfive,jh7110-crg.h>
9 #include <dt-bindings/power/starfive,jh7110-pmu.h>
10 #include <dt-bindings/reset/starfive,jh7110-crg.h>
11 #include <dt-bindings/thermal/thermal.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
19 #address-cells = <1>;
20 #size-cells = <0>;
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/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DMemoryDependenceAnalysis.cpp1 //===- MemoryDependenceAnalysis.cpp - Mem Deps Implementation -------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
14 //===----------------------------------------------------------------------===//
59 STATISTIC(NumCacheNonLocal, "Number of fully cached non-local responses");
60 STATISTIC(NumCacheDirtyNonLocal, "Number of dirty cached non-local responses");
61 STATISTIC(NumUncacheNonLocal, "Number of uncached non-local responses");
64 "Number of fully cached non-local ptr responses");
66 "Number of cached, but dirty, non-local ptr responses");
67 STATISTIC(NumUncacheNonLocalPtr, "Number of uncached non-local ptr responses");
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/freebsd/sys/contrib/device-tree/src/powerpc/
H A Diss4xx-mpic.dts15 /dts-v1/;
20 #address-cells = <2>;
21 #size-cells = <1>;
22 model = "ibm,iss-4xx";
23 compatible = "ibm,iss-4xx";
24 dcr-parent = <&{/cpus/cpu@0}>;
31 #address-cells = <1>;
32 #size-cells = <0>;
38 clock-frequency = <100000000>; // 100Mhz :-)
39 timebase-frequency = <100000000>;
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H A Dmicrowatt.dts1 /dts-v1/;
4 #size-cells = <0x02>;
5 #address-cells = <0x02>;
6 model-name = "microwatt";
7 compatible = "microwatt-soc";
13 reserved-memory {
14 #size-cells = <0x02>;
15 #address-cells = <0x02>;
26 #clock-cells = <0>;
27 compatible = "fixed-clock";
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H A Diss4xx.dts15 /dts-v1/;
18 #address-cells = <2>;
19 #size-cells = <1>;
20 model = "ibm,iss-4xx";
21 compatible = "ibm,iss-4xx";
22 dcr-parent = <&{/cpus/cpu@0}>;
29 #address-cells = <1>;
30 #size-cells = <0>;
36 clock-frequency = <100000000>; // 100Mhz :-)
37 timebase-frequency = <100000000>;
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/freebsd/usr.sbin/ctladm/
H A Dctladm.83 .\" Copyright (c) 2015-2021 Alexander Motin <mav@FreeBSD.org>
36 .\" $Id: //depot/users/kenm/FreeBSD-test2/usr.sbin/ctladm/ctladm.8#3 $
71 .Aq Fl d Ar datalen
72 .Aq Fl f Ar file|-
81 .Aq Fl d Ar datalen
82 .Aq Fl f Ar file|-
96 .Op Fl d
98 .Op Fl c Ar size
135 .Op Fl d Ar delete_id
140 .Op Fl d Ar device_id
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/freebsd/sbin/dump/
H A Dcache.c2 * CACHE.C
4 * Block cache for dump
35 typedef struct Block { struct
36 struct Block *b_HNext; /* must be first field */ argument
39 } Block; argument
45 static Block **BlockHash;
55 Block *base; in cinit()
57 if ((BlockSize = sblock->fs_bsize * BLKFACTOR) > MAXBSIZE) in cinit()
62 msg("Cache %d MB, blocksize = %d\n", in cinit()
65 base = calloc(sizeof(Block), NBlocks); in cinit()
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/freebsd/sys/contrib/device-tree/src/riscv/allwinner/
H A Dsun20i-d1s.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 // Copyright (C) 2021-2022 Samuel Holland <samuel@sholland.org>
6 #include "sunxi-d1s-t113.dtsi"
10 timebase-frequency = <24000000>;
11 #address-cells = <1>;
12 #size-cell
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/freebsd/sys/contrib/openzfs/man/man7/
H A Dzpoolconcepts.71 .\" SPDX-License-Identifier: CDDL-1.0
10 .\" or https://opensource.org/licenses/CDDL-1.0.
28 .\" Copyright (c) 2017 Open-E, Inc. All Rights Reserved.
43 .Bl -tag -width "special"
45 A block device, typically located under
69 .Em N No disks of size Em X No can hold Em X No bytes and can withstand Em N-1
72 A distributed-parity layout, similar to RAID-5/6, with improved distribution of
73 parity, and which does not suffer from the RAID-5/6
84 vdev type specifies a single-parity raidz group; the
86 vdev type specifies a double-parity raidz group; and the
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/freebsd/sys/contrib/device-tree/src/sh/
H A Dj2_mimas_v2.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 compatible = "jcore,j2-soc";
8 #address-cells = <1>;
9 #size-cells = <1>;
11 interrupt-parent = <&aic>;
14 #address-cells = <1>;
15 #size-cells = <0>;
21 clock-frequency = <50000000>;
22 d-cache-size = <8192>;
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/freebsd/sys/dev/mlx5/mlx5_core/
H A Dmlx5_cmd.c1 /*-
2 * Copyright (c) 2013-2019, Mellanox Technologies, Ltd. All rights reserved.
32 #include <linux/dma-mapping.h>
36 #include <linux/io-mapping.h>
43 static int mlx5_copy_from_msg(void *to, struct mlx5_cmd_msg *from, int size);
107 return ERR_PTR(-ENOMEM); in alloc_cmd()
109 ent->in = in; in alloc_cmd()
110 ent->uin_size = uin_size; in alloc_cmd()
111 ent->out = out; in alloc_cmd()
112 ent->uout = uout; in alloc_cmd()
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/freebsd/contrib/llvm-project/openmp/runtime/src/
H A Dkmp_alloc.cpp2 * kmp_alloc.cpp -- private/shared dynamic memory allocation and management
5 //===----------------------------------------------------------------------===//
9 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
11 //===----------------------------------------------------------------------===//
38 /* The three modes of operation are, fifo search, lifo search, and best-fit */
47 static void *bget(kmp_info_t *th, bufsize size);
48 static void *bgetz(kmp_info_t *th, bufsize size);
56 /* Buffer allocation size quantum: all buffers allocated are a
57 multiple of this size. This MUST be a power of two. */
59 /* On IA-32 architecture with Linux* OS, malloc() does not
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/freebsd/stand/common/
H A Dbcache.c1 /*-
30 * Simple hashed block cache
56 * bcache per device node. cache is allocated on device first open and freed
57 * on last close, to save memory. The issue there is the size; biosdisk
74 static u_int bcache_units; /* number of devices with cache */
83 #define BHASH(bc, blkno) ((blkno) & ((bc)->bcache_nblks - 1))
85 ((bc)->bcache_ctl[BHASH((bc), (blkno))].bc_blkno != (blkno))
95 * Initialise the cache for (nblks) of (bsize).
106 * add number of devices to bcache. we have to divide cache space
135 * the bcache block count must be power of 2 for hash function in bcache_allocate()
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/freebsd/sys/dev/mmc/
H A Dmmcsd.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
35 * Group. This Simplified Specification is provided on a non-confidential
38 * Association, SD Group, SD-3C LLC or other third parties.
44 * is provided "AS-IS" without any representations or warranties of any
45 * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD
47 * right of the SD Group, SD-3C LLC, the SD Card Association or any third
50 * SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing
51 * herein shall be construed as an obligation by the SD Group, the SD-3C LLC
53 * information, know-how or other confidential information to any third party.
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/freebsd/share/doc/papers/sysperf/
H A D4.t54 Where possible, we have allowed the size of caches to be controlled
62 translating path names to inodes\u\s-21\s0\d\**.
64 \** \u\s-21\s0\d Inode is an abbreviation for ``Index node''.
84 Changing directories invalidates the cache, as
95 The cost of the cache is about 20 lines of code
101 cache we ran ``ls \-l''
103 Before the per-process cache this command
105 After adding the cache the program used the same amount
129 Table 9. Call times for \fInamei\fP with per-process cache.
134 was caused by a low cache hit ratio.
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/freebsd/stand/libsa/
H A Dtftp.c37 * - socket descriptor (int) at dev->d_opendata, dev stored at
38 * open_file->f_devdata
39 * - server host IP in global rootip
41 * - read only
42 * - lseek only with SEEK_SET or SEEK_CUR
43 * - no big time differences between transfers (<tftp timeout)
110 char *path; /* saved for re-requests */
163 sendudp(h->iodesc, &wbuf.t, wtail - (char *)&wbuf.t); in tftp_senderr()
167 tftp_sendack(struct tftp_handle *h, u_short block) in tftp_sendack() argument
177 wbuf.t.th_block = htons(block); in tftp_sendack()
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