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/linux/Documentation/trace/coresight/
H A Dcoresight-ect.rst1 .. SPDX-License-Identifier: GPL-2.0
4 CoreSight Embedded Cross Trigger (CTI & CTM).
11 --------------------
13 The CoreSight Cross Trigger Interface (CTI) is a hardware device that takes
15 devices and interconnects them via the Cross Trigger Matrix (CTM) to other
21 0 C 0----------->: : +======>(other CTI channel IO)
22 0 P 0<-----------: : v
24 0000000 : CTI :<=========>*CTM*<====>: CTI :---+
25 ####### in_trigs : : (id 0-3) ***** ::::::: v
26 # ETM #----------->: : ^ #######
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/linux/drivers/hwtracing/coresight/
H A Dcoresight-cti.h1 /* SPDX-License-Identifier: GPL-2.0 */
17 #include "coresight-priv.h"
23 * 0x000 - 0x144: CTI programming and status
24 * 0xEDC - 0xEF8: CTI integration test.
25 * 0xF00 - 0xFFC: Coresight management registers.
27 /* CTI programming registers */
42 #define ITCHINACK 0xEDC /* WO CTI CSSoc 400 only*/
43 #define ITTRIGINACK 0xEE0 /* WO CTI CSSoc 400 only*/
44 #define ITCHOUT 0xEE4 /* WO RW-600 */
45 #define ITTRIGOUT 0xEE8 /* WO RW-600 */
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H A Dcoresight-cti-platform.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <dt-bindings/arm/coresight-cti-dt.h>
14 #include "coresight-cti.h"
15 #include "coresight-priv.h"
17 /* Number of CTI signals in the v8 architecturally defined connection */
22 /* CTI device tree trigger connection node keyword */
23 #define CTI_DT_CONNS "trig-conns"
25 /* CTI device tree connection property keywords */
26 #define CTI_DT_V8ARCH_COMPAT "arm,coresight-cti-v8-arch"
27 #define CTI_DT_CSDEV_ASSOC "arm,cs-dev-assoc"
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H A Dcoresight-cti-core.c1 // SPDX-License-Identifier: GPL-2.0
22 #include "coresight-priv.h"
23 #include "coresight-cti.h"
26 * CTI devices can be associated with a PE, or be connected to CoreSight
30 * We assume that the non-CPU CTIs are always powered as we do with sinks etc.
33 * the same CTM, in general this is the case but does not always have to be.
36 /* net of CTI devices connected via CTM */
43 dev_get_drvdata(csdev->dev.parent)
52 * CTI naming. CTI bound to cores will have the name cti_cpu<N> where
53 * N is the CPU ID. System CTIs will have the name cti_sys<I> where I
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