| /linux/Documentation/devicetree/bindings/media/xilinx/ |
| H A D | xlnx,csi2rxss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx MIPI CSI-2 Receiver Subsystem
10 - Vishal Sagar <vishal.sagar@amd.com>
13 The Xilinx MIPI CSI-2 Receiver Subsystem is used to capture MIPI CSI-2
16 The subsystem consists of a MIPI D-PHY in slave mode which captures the
17 data packets. This is passed along the MIPI CSI-2 Rx IP which extracts the
20 For more details, please refer to PG232 Xilinx MIPI CSI-2 Receiver Subsystem.
21 Please note that this bindings includes only the MIPI CSI-2 Rx controller
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| /linux/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/ |
| H A D | csi_rx_public.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
16 * @brief Get the csi rx frontend state.
17 * Get the state of the csi rx frontend regiester-set.
19 * @param[in] id The global unique ID of the csi rx fe controller.
20 * @param[out] state Point to the register-state.
26 * @brief Dump the csi rx frontend state.
27 * Dump the state of the csi rx frontend regiester-set.
29 * @param[in] id The global unique ID of the csi rx fe controller.
30 * @param[in] state Point to the register-state.
36 * @brief Get the state of the csi rx fe dlane.
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| /linux/Documentation/admin-guide/media/ |
| H A D | imx.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 ------------
15 - Image DMA Controller (IDMAC)
16 - Camera Serial Interface (CSI)
17 - Image Converter (IC)
18 - Sensor Multi-FIFO Controller (SMFC)
19 - Image Rotator (IRT)
20 - Video De-Interlacing or Combining Block (VDIC)
26 re-ordering (for example UYVY to YUYV) within the same colorspace, and
27 packed <--> planar conversion. The IDMAC can also perform a simple
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| H A D | imx7.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 ------------
14 - CMOS Sensor Interface (CSI)
15 - Video Multiplexer
16 - MIPI CSI-2 Receiver
18 .. code-block:: none
20 MIPI Camera Input ---> MIPI CSI-2 --- > |\
24 | U | ------> CSI ---> Capture
27 Parallel Camera Input ----------------> | /
34 --------
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| /linux/Documentation/devicetree/bindings/misc/ |
| H A D | ifm-csi.txt | 4 - compatible: "ifm,o2d-csi"
5 - reg: specifies sensor chip select number and associated address range
6 - interrupts: external interrupt line number and interrupt sense mode
8 - gpios: three gpio-specifiers for "capture", "reset" and "master enable"
9 GPIOs (strictly in this order).
10 - ifm,csi-clk-handle: the phandle to a node in the DT describing the sensor
12 - ifm,csi-addr-bus-width: address bus width (valid values are 16, 24, 25)
13 - ifm,csi-data-bus-width: data bus width (valid values are 8 and 16)
14 - ifm,csi-wait-cycles: sensor bus wait cycles
17 - ifm,csi-byte-swap: if this property is present, the byte swapping on
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| /linux/drivers/staging/media/tegra-video/ |
| H A D | tegra210.c | 1 // SPDX-License-Identifier: GPL-2.0-only
8 * VI and CSI SoC specific data, operations and registers accessors.
17 #include "csi.h"
40 /* Tegra210 VI CSI registers */
64 /* Tegra210 CSI Pixel Parser registers: Starts from 0x838, offset 0x0 */
92 /* Tegra210 CSI PHY registers */
150 writel_relaxed(val, chan->vi->iomem + addr); in tegra_vi_write()
155 return readl_relaxed(chan->vi->iomem + addr); in tegra_vi_read()
164 vi_csi_base = chan->vi->iomem + TEGRA210_VI_CSI_BASE(portno); in vi_csi_write()
174 vi_csi_base = chan->vi->iomem + TEGRA210_VI_CSI_BASE(portno); in vi_csi_read()
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| H A D | csi.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
9 #include <media/media-entity.h>
10 #include <media/v4l2-async.h>
11 #include <media/v4l2-subdev.h>
14 * Each CSI brick supports max of 4 lanes that can be used as either
15 * one x4 port using both CILA and CILB partitions of a CSI brick or can
22 /* Maximum 2 CSI x4 ports can be ganged up for streaming */
25 /* each CSI channel can have one sink and one source pads */
42 * struct tegra_csi_channel - Tegra CSI channel
48 * @csi: Tegra CSI device structure
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| /linux/drivers/media/platform/rockchip/rkisp1/ |
| H A D | rkisp1-csi.c | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Rockchip ISP1 Driver - CSI-2 Receiver
16 #include <linux/phy/phy-mipi-dphy.h>
18 #include <media/v4l2-ctrls.h>
19 #include <media/v4l2-fwnode.h>
21 #include "rkisp1-common.h"
22 #include "rkisp1-csi.h"
37 struct rkisp1_csi *csi = &rkisp1->csi; in rkisp1_csi_link_sensor() local
40 s_asd->pixel_rate_ctrl = v4l2_ctrl_find(sd->ctrl_handler, in rkisp1_csi_link_sensor()
42 if (!s_asd->pixel_rate_ctrl) { in rkisp1_csi_link_sensor()
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| /linux/Documentation/userspace-api/media/v4l/ |
| H A D | metafmt-generic.rst | 1 .. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later
8 Generic line-based metadata formats
14 These generic line-based metadata formats define the memory layout of the data
17 .. _v4l2-meta-fmt-generic-8:
20 -----------------------
22 The V4L2_META_FMT_GENERIC_8 format is a plain 8-bit metadata format. This format
23 is used on CSI-2 for 8 bits per :term:`Data Unit`.
26 packed into one 16-bit Data Unit. Otherwise the 16 bits per pixel dataformat is
27 :ref:`V4L2_META_FMT_GENERIC_CSI2_16 <v4l2-meta-fmt-generic-csi2-16>`.
34 .. flat-table:: Sample 4x2 Metadata Frame
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| /linux/Documentation/devicetree/bindings/soc/imx/ |
| H A D | fsl,imx8mm-disp-blk-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MM DISP blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MM DISP blk-ctrl is a top-level peripheral providing access to
14 the NoC and ensuring proper power sequencing of the display and MIPI CSI
15 peripherals located in the DISP domain of the SoC.
20 - const: fsl,imx8mm-disp-blk-ctrl
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| H A D | fsl,imx8mn-disp-blk-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MN DISP blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MN DISP blk-ctrl is a top-level peripheral providing access to
14 the NoC and ensuring proper power sequencing of the display and MIPI CSI
15 peripherals located in the DISP domain of the SoC.
20 - const: fsl,imx8mn-disp-blk-ctrl
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| /linux/Documentation/devicetree/bindings/media/ |
| H A D | ti,omap3isp.txt | 4 The DT definitions can be found in include/dt-bindings/media/omap3-isp.h.
9 compatible : must contain "ti,omap3-isp"
14 CSI PHYs and receivers registers.
17 syscon : the phandle and register offset to the Complex I/O or CSI-PHY
19 ti,phy-type : 0 -- OMAP3ISP_PHY_TYPE_COMPLEX_IO (e.g. 3430)
20 1 -- OMAP3ISP_PHY_TYPE_CSIPHY (e.g. 3630)
21 #clock-cells : Must be 1 --- the ISP provides two external clocks,
24 clock bindings in ../clock/clock-bindings.txt.
27 ---------------------
29 More documentation on these bindings is available in
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| H A D | imx.txt | 5 ---------------------------
12 - compatible : "fsl,imx-capture-subsystem";
13 - ports : Should contain a list of phandles pointing to camera
18 capture-subsystem {
19 compatible = "fsl,imx-capture-subsystem";
25 --------------
27 This is the device node for the MIPI CSI-2 Receiver core in the i.MX
28 SoC. This is a Synopsys Designware MIPI CSI-2 host controller core
29 combined with a D-PHY core mixed into the same register block. In
30 addition this device consists of an i.MX-specific "CSI2IPU gasket"
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| H A D | video-interfaces.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/video-interfaces.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sakari Ailus <sakari.ailus@linux.intel.com>
11 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
23 Configuration of a port depends on other devices participating in the data
29 #address-cells = <1>;
30 #size-cells = <0>;
43 one port is present in a device node or there is more than one endpoint at a
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| H A D | renesas,rzg2l-csi2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/renesas,rzg2l-csi2.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Renesas RZ/G2L (and alike SoC's) MIPI CSI-2 receiver
11 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
14 The CSI-2 receiver device provides MIPI CSI-2 capabilities for the Renesas RZ/G2L
15 (and alike SoCs). MIPI CSI-2 is part of the CRU block which is used in conjunction
21 - enum:
22 - renesas,r9a07g043-csi2 # RZ/G2UL
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| /linux/drivers/acpi/ |
| H A D | mipi-disco-img.c | 1 // SPDX-License-Identifier: GPL-2.0-only
7 * Support MIPI DisCo for Imaging by parsing ACPI _CRS CSI-2 records defined in
8 * Section 6.4.3.8.2.4 "Camera Serial Interface (CSI-2) Connection Resource
12 * The implementation looks for the information in the ACPI namespace (CSI-2
13 * resource descriptors in _CRS) and constructs software nodes compatible with
14 * Documentation/firmware-guide/acpi/dsd/graph.rst to represent the CSI-2
16 * extracted from the _CRS CSI-2 resource descriptors and the MIPI DisCo
17 * for Imaging device properties present in _DSD for the ACPI device objects
18 * with CSI-2 connections.
31 #include <media/v4l2-fwnode.h>
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| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | rockchip-inno-csi-dphy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/rockchip-inno-csi-dphy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip SoC MIPI RX0 D-PHY
10 - Heiko Stuebner <heiko@sntech.de>
13 The Rockchip SoC has a MIPI CSI D-PHY based on an Innosilicon IP which
14 connects to the ISP1 (Image Signal Processing unit v1.0) for CSI cameras.
19 - rockchip,px30-csi-dphy
20 - rockchip,rk1808-csi-dphy
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| H A D | mediatek,mt8365-csi-rx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/phy/mediatek,mt8365-csi-rx.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Mediatek Sensor Interface MIPI CSI CD-PHY
11 - Julien Stephan <jstephan@baylibre.com>
12 - Andy Hsieh <andy.hsieh@mediatek.com>
15 The SENINF CD-PHY is a set of CD-PHY connected to the SENINF CSI-2
17 Depending on the SoC model, each PHYs can be either CD-PHY or D-PHY only
23 - mediatek,mt8365-csi-rx
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| /linux/Documentation/devicetree/bindings/media/i2c/ |
| H A D | toshiba,tc358746.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marco Felsch <kernel@pengutronix.de>
12 description: |-
13 The Toshiba TC358746 converts a parallel video stream into a MIPI CSI-2
14 stream. The direction can be either parallel-in -> csi-out or csi-in ->
15 parallel-out The chip is programmable through I2C and SPI but the SPI
16 interface is only supported in parallel-in -> csi-out mode.
19 parallel-in -> csi-out path.
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| /linux/drivers/staging/greybus/ |
| H A D | gb-camera.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
10 #include <linux/v4l2-mediabus.h>
18 * struct gb_camera_stream - Represents greybus camera stream.
19 * @width: Stream width in pixels.
20 * @height: Stream height in pixels.
22 * @vc: MIPI CSI virtual channel.
23 * @dt: MIPI CSI data types. Most formats use a single data type, in which case
25 * @max_size: Maximum size of a frame in bytes. The camera module guarantees
40 * struct gb_camera_csi_params - CSI configuration parameters
41 * @num_lanes: number of CSI data lanes
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| /linux/include/media/i2c/ |
| H A D | tc358743.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * tc358743 - Toshiba HDMI to CSI-2 bridge
10 * REF_01 - Toshiba, TC358743XBG (H2C), Functional Specification, Rev 0.60
11 * REF_02 - Toshiba, TC358743XBG_HDMI-CSI_Tv11p_nm.xls
37 * Sets DDC5V_MODE in register DDC_CTL.
46 * level to somewhere in the middle (e.g. 300), so it can cover speed
47 * mismatches in input and output ports.
55 /* CSI
56 * Calculate CSI parameters with REF_02 for the highest resolution your
57 * CSI interface can handle. The driver will adjust the number of CSI
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| /linux/include/video/ |
| H A D | imx-ipu-v3.h | 2 * Copyright 2005-2009 Freescale Semiconductor, Inc.
8 * http://www.opensource.org/licenses/lgpl-license.html
21 #include <media/v4l2-mediabus.h>
56 * Enumeration of CSI destinations
83 /* 90-degree rotations require the IRT unit */
120 * NOTE: channels 6,7 are unused in the IPU and are not IDMAC channels,
121 * but the direct CSI->VDI linking is handled the same way as IDMAC
122 * channel linking in the FSU via the IPU_FS_PROC_FLOW registers, so
123 * these channel names are used to support the direct CSI->VDI link.
183 return -EINVAL; in ipu_channel_alpha_channel()
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| /linux/Documentation/devicetree/bindings/spi/ |
| H A D | renesas,rzv2m-csi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/renesas,rzv2m-csi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/V2M Clocked Serial Interface (CSI)
10 - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
14 - $ref: spi-controller.yaml#
18 const: renesas,rzv2m-csi
28 - description: The clock used to generate the output clock (CSICLK)
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| /linux/drivers/media/platform/nxp/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
8 tristate "NXP CSI Bridge driver"
17 Driver for the NXP Camera Sensor Interface (CSI) Bridge. This device
18 is found in the i.MX6UL/L, i.MX7 and i.MX8M[MQ] SoCs.
21 tristate "NXP i.MX8MQ MIPI CSI-2 receiver"
28 Video4Linux2 driver for the MIPI CSI-2 receiver found on the i.MX8MQ
32 tristate "NXP MIPI CSI-2 CSIS receiver found on i.MX7 and i.MX8 models"
39 Video4Linux2 sub-device driver for the MIPI CSI-2 CSIS receiver
42 source "drivers/media/platform/nxp/imx8-isi/Kconfig"
53 The i.MX Pixel Pipeline is a memory-to-memory engine for scaling,
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| /linux/Documentation/devicetree/bindings/display/bridge/ |
| H A D | renesas,dsi-csi2-tx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/renesas,dsi-csi2-tx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car MIPI DSI/CSI-2 Encoder
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 This binding describes the MIPI DSI/CSI-2 encoder embedded in the Renesas
14 R-Car Gen4 SoCs. The encoder can operate in either DSI or CSI-2 mode, with up
20 - renesas,r8a779a0-dsi-csi2-tx # for V3U
21 - renesas,r8a779g0-dsi-csi2-tx # for V4H
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