| /freebsd/sys/contrib/device-tree/Bindings/misc/ |
| H A D | ifm-csi.txt | 4 - compatible: "ifm,o2d-csi"
5 - reg: specifies sensor chip select number and associated address range
6 - interrupts: external interrupt line number and interrupt sense mode
8 - gpios: three gpio-specifiers for "capture", "reset" and "master enable"
9 GPIOs (strictly in this order).
10 - ifm,csi-clk-handle: the phandle to a node in the DT describing the sensor
12 - ifm,csi-addr-bus-width: address bus width (valid values are 16, 24, 25)
13 - ifm,csi-data-bus-width: data bus width (valid values are 8 and 16)
14 - ifm,csi-wait-cycles: sensor bus wait cycles
17 - ifm,csi-byte-swap: if this property is present, the byte swapping on
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| /freebsd/sys/contrib/device-tree/Bindings/media/i2c/ |
| H A D | ov5640.txt | 1 * Omnivision OV5640 MIPI CSI-2 / parallel sensor
4 - compatible: should be "ovti,ov5640"
5 - clocks: reference to the xclk input clock.
6 - clock-names: should be "xclk".
7 - DOVDD-supply: Digital I/O voltage supply, 1.8 volts
8 - AVDD-supply: Analog voltage supply, 2.8 volts
9 - DVDD-supply: Digital core voltage supply, 1.5 volts
12 - reset-gpios: reference to the GPIO connected to the reset pin, if any.
14 - powerdown-gpios: reference to the GPIO connected to the powerdown pin,
16 - rotation: as defined in
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| H A D | st,st-vgxy61.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/i2c/st,st-vgxy61.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Benjamin Mugnier <benjamin.mugnier@foss.st.com>
12 - Sylvain Petinot <sylvain.petinot@foss.st.com>
14 description: |-
15 STMicroelectronics VGxy61 family has a CSI-2 output port. CSI-2 output is a
19 - VG5661 and VG6661 are 1.6 Mpx (1464 x 1104) monochrome and color sensors.
21 - VG5761 and VG6761 are 2.3 Mpx (1944 x 1204) monochrome and color sensors.
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| H A D | isil,isl79987.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Intersil ISL79987 Analog to MIPI CSI-2 decoder
10 - Michael Tretter <m.tretter@pengutronix.de>
11 - Marek Vasut <marex@denx.de>
14 The Intersil ISL79987 is an analog to MIPI CSI-2 decoder which is capable of
16 CSI-2 virtual channels, using one MIPI clock lane and 1/2 data lanes.
21 - isil,isl79987
26 reset-gpios:
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| H A D | toshiba,tc358746.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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| H A D | galaxycore,gc08a3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: GalaxyCore gc08a3 1/4" 8M Pixel MIPI CSI-2 sensor
11 - Zhi Mao <zhi.mao@mediatek.com>
14 The gc08a3 is a raw image sensor with an MIPI CSI-2 image data
28 dovdd-supply: true
30 avdd-supply: true
32 dvdd-supply: true
34 reset-gpios:
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| H A D | galaxycore,gc05a2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: GalaxyCore gc05a2 1/5" 5M Pixel MIPI CSI-2 sensor
11 - Zhi Mao <zhi.mao@mediatek.com>
14 The gc05a2 is a raw image sensor with an MIPI CSI-2 image data
28 dovdd-supply: true
30 avdd-supply: true
32 dvdd-supply: true
34 reset-gpios:
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| H A D | ov2680.txt | 1 * Omnivision OV2680 MIPI CSI-2 sensor
4 - compatible: should be "ovti,ov2680".
5 - clocks: reference to the xvclk input clock.
6 - clock-names: should be "xvclk".
7 - DOVDD-supply: Digital I/O voltage supply.
8 - DVDD-supply: Digital core voltage supply.
9 - AVDD-supply: Analog voltage supply.
12 - reset-gpios: reference to the GPIO connected to the powerdown/reset pin,
18 Documentation/devicetree/bindings/media/video-interfaces.txt.
20 Endpoint node required properties for CSI-2 connection are:
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| H A D | tc358743.txt | 1 * Toshiba TC358743 HDMI-RX to MIPI CSI2-TX Bridge
3 The Toshiba TC358743 HDMI-RX to MIPI CSI2-TX (H2C) is a bridge that converts
4 a HDMI stream to MIPI CSI-2 TX. It is programmable through I2C.
8 - compatible: value should be "toshiba,tc358743"
9 - clocks, clock-names: should contain a phandle link to the reference clock
14 - reset-gpios: gpio phandle GPIO connected to the reset pin
15 - interrupts: GPIO connected to the interrupt pin
16 - data-lanes: should be <1 2 3 4> for four-lane operation,
17 or <1 2> for two-lane operation
18 - clock-lanes: should be <0>
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| H A D | ovti,ov8858.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacopo Mondi <jacopo.mondi@ideasonboard.com>
11 - Nicholas Roth <nicholas@rothemail.net>
15 controlled through an I2C-compatible SCCB bus. The sensor transmits images
16 on a MIPI CSI-2 output interface with up to 4 data lanes.
29 clock-names:
32 dvdd-supply:
35 avdd-supply:
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| H A D | maxim,max96712.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Quad GMSL2 to CSI-2 Deserializer with GMSL1 Compatibility
11 - Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
15 CSI-2 D-PHY or C-PHY formatted outputs. The device allows each link to
16 simultaneously transmit bidirectional control-channel data while forward
18 four remotely located sensors using industry-standard coax or STP
23 MAX96712 can be paired with first-generation 3.12Gbps or 1.5Gbps GMSL1
34 enable-gpios: true
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| H A D | st,st-mipid02.txt | 1 STMicroelectronics MIPID02 CSI-2 to PARALLEL bridge
3 MIPID02 has two CSI-2 input ports, only one of those ports can be active at a
4 time. Active port input stream will be de-serialized and its content outputted
6 CSI-2 first input port is a dual lane 800Mbps per lane whereas CSI-2 second
11 YUV420 8-bit, YUV422 8-bit and YUV420 10-bit.
14 - compatible: shall be "st,st-mipid02"
15 - clocks: reference to the xclk input clock.
16 - clock-names: shall be "xclk".
17 - VDDE-supply: sensor digital IO supply. Must be 1.8 volts.
18 - VDDIN-supply: sensor internal regulator supply. Must be 1.8 volts.
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| H A D | hynix,hi846.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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| H A D | ovti,ov4689.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mikhai
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| H A D | ovti,ov02a10.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Dongchu
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| H A D | ovti,og01a1b.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (c) 2023-2024 Linaro Ltd.
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
15 image sensor controlled over an I2C-compatible SCCB bus.
16 The sensor transmits images on a MIPI CSI-2 output interface with one or
20 - $ref: /schemas/media/video-interface-devices.yaml#
32 reset-gpios:
36 strobe-gpios:
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| /freebsd/sys/contrib/device-tree/Bindings/media/xilinx/ |
| H A D | xlnx,csi2rxss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx MIPI CSI-2 Receiver Subsystem
10 - Vishal Sagar <vishal.sagar@amd.com>
13 The Xilinx MIPI CSI-2 Receiver Subsystem is used to capture MIPI CSI-2
16 The subsystem consists of a MIPI D-PHY in slave mode which captures the
17 data packets. This is passed along the MIPI CSI-2 Rx IP which extracts the
20 For more details, please refer to PG232 Xilinx MIPI CSI-2 Receiver Subsystem.
21 Please note that this bindings includes only the MIPI CSI-2 Rx controller
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| /freebsd/sys/contrib/device-tree/src/arm64/allwinner/ |
| H A D | sun50i-a64-amarula-relic.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 /dts-v1/;
7 #include "sun50i-a64.dtsi"
8 #include "sun50i-a64-cpu-opp.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
13 model = "Amarula A64-Relic";
14 compatible = "amarula,a64-relic", "allwinner,sun50i-a64";
21 stdout-path = "serial0:115200n8";
25 compatible = "i2c-gpio";
26 sda-gpios = <&pio 4 13 GPIO_ACTIVE_HIGH>;
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| H A D | sun50i-a64-pinetab.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "sun50i-a64.dtsi"
10 #include "sun50i-a64-cpu-opp.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/pwm/pwm.h>
18 compatible = "pine64,pinetab", "allwinner,sun50i-a64";
19 chassis-type = "tablet";
27 compatible = "pwm-backlight";
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| /freebsd/sys/contrib/device-tree/Bindings/fpga/ |
| H A D | xlnx,fpga-selectmap.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/fpga/xlnx,fpga-selectmap.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Charles Perry <charles.perry@savoirfairelinux.com>
22 - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#
27 - xlnx,fpga-xc7s-selectmap
28 - xlnx,fpga-xc7a-selectmap
29 - xlnx,fpga-xc7k-selectmap
30 - xlnx,fpga-xc7v-selectmap
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| /freebsd/sys/contrib/device-tree/src/arm64/renesas/ |
| H A D | r9a07g044c2-smarc-cru-csi-ov5645.dtso | 1 // SPDX-License-Identifier: GPL-2.0
4 * OV5645 camera connected to CSI and CRU enabled.
9 /dts-v1/;
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
16 #include "rz-smarc-cru-csi-ov5645.dtsi"
19 enable-gpios = <&pinctrl RZG2L_GPIO(0, 1) GPIO_ACTIVE_HIGH>;
20 reset-gpios = <&pinctrl RZG2L_GPIO(5, 2) GPIO_ACTIVE_LOW>;
|
| H A D | r9a07g043u11-smarc-cru-csi-ov5645.dtso | 1 // SPDX-License-Identifier: GPL-2.0
4 * connected to CSI and CRU enabled.
9 /dts-v1/;
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
16 #include "rz-smarc-cru-csi-ov5645.dtsi"
19 enable-gpios = <&pinctrl RZG2L_GPIO(4, 4) GPIO_ACTIVE_HIGH>;
20 reset-gpios = <&pinctrl RZG2L_GPIO(0, 1) GPIO_ACTIVE_LOW>;
|
| H A D | r9a07g044l2-smarc-cru-csi-ov5645.dtso | 1 // SPDX-License-Identifier: GPL-2.0
4 * connected to CSI and CRU enabled.
9 /dts-v1/;
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
16 #include "rz-smarc-cru-csi-ov5645.dtsi"
19 enable-gpios = <&pinctrl RZG2L_GPIO(2, 0) GPIO_ACTIVE_HIGH>;
20 reset-gpios = <&pinctrl RZG2L_GPIO(40, 2) GPIO_ACTIVE_LOW>;
|
| H A D | r9a07g054l2-smarc-cru-csi-ov5645.dtso | 1 // SPDX-License-Identifier: GPL-2.0
4 * connected to CSI and CRU enabled.
9 /dts-v1/;
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
16 #include "rz-smarc-cru-csi-ov5645.dtsi"
19 enable-gpios = <&pinctrl RZG2L_GPIO(2, 0) GPIO_ACTIVE_HIGH>;
20 reset-gpios = <&pinctrl RZG2L_GPIO(40, 2) GPIO_ACTIVE_LOW>;
|
| /freebsd/sys/contrib/device-tree/src/powerpc/ |
| H A D | o2d.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
12 gpio-controller;
13 fsl,has-wdt;
14 fsl,wdt-on-boot = <0>;
16 &gpt1 { gpio-controller; };
33 compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
34 #address-cells = <1>;
35 #size-cells = <0>;
36 cell-index = <0>;
48 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
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