/linux/drivers/crypto/nx/ |
H A D | nx-common-powernv.c | 174 #define CSB_ERR(csb, msg, ...) \ argument 176 ##__VA_ARGS__, (csb)->flags, \ 177 (csb)->cs, (csb)->cc, (csb)->ce, \ 178 be32_to_cpu((csb)->count)) 180 #define CSB_ERR_ADDR(csb, msg, ...) \ argument 181 CSB_ERR(csb, msg " at %lx", ##__VA_ARGS__, \ 182 (unsigned long)be64_to_cpu((csb)->address)) 185 struct coprocessor_status_block *csb) in wait_for_csb() argument 190 while (!(READ_ONCE(csb->flags) & CSB_V)) { in wait_for_csb() 197 /* hw has updated csb and output buffer */ in wait_for_csb() [all …]
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H A D | nx-common-pseries.c | 87 /* I assume we need to align the CSB? */ 222 struct cop_status_block *csb) in nx842_validate_result() argument 224 /* The csb must be valid after returning from vio_h_cop_sync */ in nx842_validate_result() 225 if (!NX842_CSBCBP_VALID_CHK(csb->valid)) { in nx842_validate_result() 229 csb->valid, in nx842_validate_result() 230 csb->crb_seq_number, in nx842_validate_result() 231 csb->completion_code, in nx842_validate_result() 232 csb->completion_extension); in nx842_validate_result() 234 be32_to_cpu(csb->processed_byte_count), in nx842_validate_result() 235 (unsigned long)be64_to_cpu(csb->address)); in nx842_validate_result() [all …]
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H A D | nx-aes-ecb.c | 89 atomic64_add(be32_to_cpu(csbcpb->csb.processed_byte_count), in ecb_aes_nx_crypt()
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H A D | nx-aes-cbc.c | 91 atomic64_add(be32_to_cpu(csbcpb->csb.processed_byte_count), in cbc_aes_nx_crypt()
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H A D | nx-aes-ctr.c | 105 atomic64_add(be32_to_cpu(csbcpb->csb.processed_byte_count), in ctr_aes_nx_crypt()
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/linux/arch/powerpc/platforms/book3s/ |
H A D | vas-api.c | 138 * Update the CSB to indicate a translation error. 140 * User space will be polling on CSB after the request is issued. 141 * If NX can handle the request without any issues, it updates CSB. 143 * fault and update CSB with translation error. 145 * If we are unable to update the CSB means copy_to_user failed due to 151 struct coprocessor_status_block csb; in vas_update_csb() local 167 memset(&csb, 0, sizeof(csb)); in vas_update_csb() 168 csb.cc = CSB_CC_FAULT_ADDRESS; in vas_update_csb() 169 csb.ce = CSB_CE_TERMINATION; in vas_update_csb() 170 csb.cs = 0; in vas_update_csb() [all …]
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/linux/Documentation/arch/powerpc/ |
H A D | vas-api.rst | 217 co-processor Status Block (CSB) flags. NX updates status in CSB after each 218 request is processed. Refer NX-GZIP user's manual for the format of CSB and 221 In case if NX encounters translation error (called NX page fault) on CSB 225 updating CSB with the following data:: 227 csb.flags = CSB_V; 228 csb.cc = CSB_CC_FAULT_ADDRESS; 229 csb.ce = CSB_CE_TERMINATION; 230 csb.address = fault_address; 236 If the OS can not update CSB due to invalid CSB address, sends SEGV signal 243 siginfo.si_addr = CSB address; [all …]
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/linux/tools/testing/selftests/powerpc/nx-gzip/ |
H A D | gzip_vas.c | 152 while (getnn(cmdp->crb.csb, csb_v) == 0) { in nx_wait_for_csb() 180 /* hw has updated csb and output buffer */ in nx_wait_for_csb() 183 /* Check CSB flags. */ in nx_wait_for_csb() 184 if (getnn(cmdp->crb.csb, csb_v) == 0) { in nx_wait_for_csb() 185 fprintf(stderr, "CSB still not valid after %d polls.\n", in nx_wait_for_csb() 187 prt_err("CSB still not valid after %d polls, giving up.\n", in nx_wait_for_csb() 269 cc = getnn(cmdp->crb.csb, csb_cc); /* CC Table 6-8 */ in nxu_submit_job()
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H A D | gzfht_test.c | 26 * csb: coprocessor status block (status) 92 memset((void *) &cmdp->crb.csb, 0, sizeof(cmdp->crb.csb)); in compress_fht_sample() 102 /* Figure 6-3 6-4; CSB location */ in compress_fht_sample() 105 (uint64_t) &cmdp->crb.csb & csb_address_mask); in compress_fht_sample() 284 (unsigned long long) cmdp->crb.csb.fsaddr)); in compress_file() 309 tpbc = get32(cmdp->crb.csb, tpbc); in compress_file()
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H A D | gunz_test.c | 21 * csb: coprocessor status block (status) 250 memset((void *)&cmdp->crb.csb, 0, sizeof(cmdp->crb.csb)); in nx_submit_job() 256 csbaddr = ((uint64_t) &cmdp->crb.csb) & csb_address_mask; in nx_submit_job() 708 (void *)cmdp->crb.csb.fsaddr)); in decompress_file() 740 nx_ce = get_csb_ce_ms3b(cmdp->crb.csb); in decompress_file() 750 tpbc = get32(cmdp->crb.csb, tpbc); in decompress_file() 780 tpbc = get32(cmdp->crb.csb, tpbc); in decompress_file()
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/linux/tools/testing/selftests/powerpc/nx-gzip/include/ |
H A D | nxu.h | 56 * csb: coprocessor status block (status) 113 /* 16B CSB size. Written to 0 by DMA when it writes the CPB */ 129 /* Section 6.12.1 CSB NonZero error summary. FSA Failing storage 131 * to A field of CSB 314 /* byte[64:239] shift csb by 128 bytes out of the crb; csb was 315 * in crb earlier; JReilly says csb written with partial inject 320 volatile struct nx_csb_t csb; member 346 /* CSB */ 530 /* CSB.CC Error codes */ 636 struct nx_csb_t csb; member
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H A D | crb.h | 36 /* Chapter 6.5.7 Coprocessor-Status Block (CSB) */ 110 * ADDRESS address of CSB 132 struct coprocessor_status_block csb; member
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/linux/arch/powerpc/platforms/512x/ |
H A D | clock-commonclk.c | 418 * SYS -> CSB -> IPS) from the REF clock rate and the returned mul/div 457 calc_freq *= *ips_div; /* IPS -> CSB */ in mpc512x_clk_setup_ref_clock() 458 calc_freq *= 2; /* CSB -> SYS */ in mpc512x_clk_setup_ref_clock() 640 * CSB which is greater than IPS; the serial port setup may have in mpc512x_clk_setup_mclk() 734 /* now setup the REF -> SYS -> CSB -> IPS hierarchy */ in mpc512x_clk_setup_clock_tree() 737 clks[MPC512x_CLK_CSB] = mpc512x_clk_factor("csb", "sys", 1, 2); in mpc512x_clk_setup_clock_tree() 738 clks[MPC512x_CLK_IPS] = mpc512x_clk_divtable("ips", "csb", in mpc512x_clk_setup_clock_tree() 741 /* now setup anything below SYS and CSB and IPS */ in mpc512x_clk_setup_clock_tree() 756 clks[MPC512x_CLK_SDHC_x4] = mpc512x_clk_factor("sdhc-x4", "csb", 2, 1); in mpc512x_clk_setup_clock_tree() 766 clks[MPC512x_CLK_DIU_x4] = mpc512x_clk_factor("diu-x4", "csb", 4, 1); in mpc512x_clk_setup_clock_tree() [all …]
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/linux/drivers/gpu/drm/i915/gt/ |
H A D | intel_execlists_submission.c | 154 #define GEN12_CTX_STATUS_SWITCHED_TO_NEW_QUEUE (0x1) /* lower csb dword */ 155 #define GEN12_CTX_SWITCH_DETAIL(csb_dw) ((csb_dw) & 0xF) /* upper csb dword */ 161 #define XEHP_CTX_STATUS_SWITCHED_TO_NEW_QUEUE BIT(1) /* upper csb dword */ 838 * becomes a sentinel in parallel to CSB processing. in assert_pending_valid() 920 * that all ELSP are drained i.e. we have processed the CSB, in execlists_submit_ports() 1692 * Xe_HP csb shuffles things around compared to TGL: 1730 static bool xehp_csb_parse(const u64 csb) in xehp_csb_parse() argument 1732 return __gen12_csb_parse(XEHP_CSB_CTX_VALID(lower_32_bits(csb)), /* cxt to */ in xehp_csb_parse() 1733 XEHP_CSB_CTX_VALID(upper_32_bits(csb)), /* cxt away */ in xehp_csb_parse() 1734 upper_32_bits(csb) & XEHP_CTX_STATUS_SWITCHED_TO_NEW_QUEUE, in xehp_csb_parse() [all …]
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/linux/arch/powerpc/include/asm/ |
H A D | icswx.h | 42 /* Chapter 6.5.7 Coprocessor-Status Block (CSB) */ 131 * ADDRESS address of CSB 158 struct coprocessor_status_block csb; member
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/linux/drivers/iio/pressure/ |
H A D | ms5611_i2c.c | 9 * 0x77 (CSB pin low) 10 * 0x76 (CSB pin high)
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/linux/lib/zlib_dfltcc/ |
H A D | dfltcc.h | 80 uint8_t csb[1152]; member 83 static_assert(offsetof(struct dfltcc_param_v0, csb) == 384);
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H A D | dfltcc_util.h | 75 kmsan_unpoison_memory(param, offsetof(struct dfltcc_param_v0, csb)); in dfltcc()
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/linux/drivers/gpio/ |
H A D | gpio-stmpe.c | 25 enum { LSB, CSB, MSB }; enumerator 185 [REG_RE][CSB] = STMPE_IDX_GPRER_CSB, in stmpe_gpio_irq_sync_unlock() 188 [REG_FE][CSB] = STMPE_IDX_GPFER_CSB, in stmpe_gpio_irq_sync_unlock() 191 [REG_IE][CSB] = STMPE_IDX_IEGPIOR_CSB, in stmpe_gpio_irq_sync_unlock()
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/linux/drivers/gpu/drm/i915/gvt/ |
H A D | execlist.c | 158 /* Update the CSB and CSB write pointer in HWSP */ in emulate_csb_update() 170 gvt_dbg_el("vgpu%d: w pointer %u reg %x csb l %x csb h %x\n", in emulate_csb_update()
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/linux/drivers/ata/ |
H A D | pata_serverworks.c | 123 * serverworks_is_csb - Check for CSB or OSB 126 * Returns true if the device being checked is known to be a CSB 210 /* The OSB4 just requires the timing but the CSB series want the in serverworks_set_piomode()
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/linux/arch/powerpc/boot/dts/ |
H A D | mpc5125twr.dts | 39 timebase-frequency = <49500000>;// 49.5 MHz (csb/4) 40 bus-frequency = <198000000>; // 198 MHz csb bus
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H A D | ac14xx.dts | 26 timebase-frequency = <40000000>; /* 40 MHz (csb/4) */ 27 bus-frequency = <160000000>; /* 160 MHz csb bus */
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/linux/arch/powerpc/platforms/powernv/ |
H A D | opal-hmi.c | 117 "UE error on CRB(CSB address, CCB)" }, in print_nx_checkstop_reason() 119 "SUE error on CRB(CSB address, CCB)" }, in print_nx_checkstop_reason()
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/linux/arch/m68k/68000/ |
H A D | dragen2.c | 50 CSB = 0x1a1; in init_dragen2()
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