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/linux/drivers/gpu/drm/i915/selftests/
H A Di915_perf.c2 * SPDX-License-Identifier: MIT
17 #define TEST_OA_CONFIG_UUID "12345678-1234-1234-1234-1234567890ab"
26 return -ENOMEM; in alloc_empty_config()
28 oa_config->perf = perf; in alloc_empty_config()
29 kref_init(&oa_config->ref); in alloc_empty_config()
31 strscpy(oa_config->uuid, TEST_OA_CONFIG_UUID, sizeof(oa_config->uuid)); in alloc_empty_config()
33 mutex_lock(&perf->metrics_lock); in alloc_empty_config()
35 oa_config->id = idr_alloc(&perf->metrics_idr, oa_config, 2, 0, GFP_KERNEL); in alloc_empty_config()
36 if (oa_config->id < 0) { in alloc_empty_config()
37 mutex_unlock(&perf->metrics_lock); in alloc_empty_config()
[all …]
/linux/drivers/spi/
H A Dspi-omap2-mcspi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
15 #include <linux/dma-mapping.h>
32 #include <linux/platform_data/spi-omap2-mcspi.h>
49 /* per-channel banks, 0x14 bytes each, first is: */
56 /* per-register bitmasks: */
92 /* We have 2 DMA channels per CS, one for RX and one for TX */
117 struct list_head cs; member
155 writel_relaxed(val, mcspi->base + idx); in mcspi_write_reg()
162 return readl_relaxed(mcspi->base + idx); in mcspi_read_reg()
168 struct omap2_mcspi_cs *cs = spi->controller_state; in mcspi_write_cs_reg() local
[all …]
H A Dspi-fsl-espi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
39 /* eSPI Controller CS mode register definitions */
118 return ioread32be(espi->reg_base + offset); in fsl_espi_read_reg()
123 return ioread16be(espi->reg_base + offset); in fsl_espi_read_reg16()
128 return ioread8(espi->reg_base + offset); in fsl_espi_read_reg8()
134 iowrite32be(val, espi->reg_base + offset); in fsl_espi_write_reg()
140 iowrite16be(val, espi->reg_base + offset); in fsl_espi_write_reg16()
146 iowrite8(val, espi->reg_base + offset); in fsl_espi_write_reg8()
151 struct fsl_espi *espi = spi_controller_get_devdata(m->spi->controller); in fsl_espi_check_message()
154 if (m->frame_length > SPCOM_TRANLEN_MAX) { in fsl_espi_check_message()
[all …]
H A Dspi-dw-mmio.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Memory-mapped interface driver for DW SPI Core
24 #include "spi-dw.h"
57 * Elba SoC does not use ssi, pin override is used for cs 0,1 and
58 * gpios for cs 2,3 as defined in the device tree.
60 * cs: | 1 0
61 * bit: |---3-------2-------1-------0
65 #define ELBA_SPICS_OFFSET(cs) ((cs) << 1) argument
66 #define ELBA_SPICS_MASK(cs) (GENMASK(1, 0) << ELBA_SPICS_OFFSET(cs)) argument
67 #define ELBA_SPICS_SET(cs, val) \ argument
[all …]
H A Dspi-xlp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2003-2015 Broadcom Corporation
98 int cs; /* target device chip select */ member
100 bool cmd_cont; /* cs active */
105 int cs, int regoff) in xlp_spi_reg_read() argument
107 return readl(priv->base + regoff + cs * SPI_CS_OFFSET); in xlp_spi_reg_read()
110 static inline void xlp_spi_reg_write(struct xlp_spi_priv *priv, int cs, in xlp_spi_reg_write() argument
113 writel(val, priv->base + regoff + cs * SPI_CS_OFFSET); in xlp_spi_reg_write()
119 writel(val, priv->base + regoff); in xlp_spi_sysctl_write()
127 int cs; in xlp_spi_sysctl_setup() local
[all …]
/linux/drivers/gpu/drm/i915/gt/
H A Dselftest_engine_cs.c1 // SPDX-License-Identifier: GPL-2.0
21 return *a - *b; in cmp_u32()
29 atomic_inc(&gt->rps.num_waiters); in perf_begin()
30 queue_work(gt->i915->unordered_wq, &gt->rps.work); in perf_begin()
31 flush_work(&gt->rps.work); in perf_begin()
38 atomic_dec(&gt->rps.num_waiters); in perf_end()
41 return igt_flush_test(gt->i915); in perf_end()
46 struct drm_i915_private *i915 = engine->i915; in timestamp_reg()
49 return RING_TIMESTAMP_UDW(engine->mmio_base); in timestamp_reg()
51 return RING_TIMESTAMP(engine->mmio_base); in timestamp_reg()
[all …]
H A Dselftest_execlists.c1 // SPDX-License-Identifier: MIT
24 #define CS_GPR(engine, n) ((engine)->mmio_base + 0x600 + (n) * 4)
47 tasklet_hi_schedule(&engine->sched_engine->tasklet); in wait_for_submit()
58 if (!READ_ONCE(engine->execlists.pending[0]) && is_active(rq)) in wait_for_submit()
62 return -ETIME; in wait_for_submit()
78 if (READ_ONCE(engine->execlists.pending[0])) in wait_for_reset()
84 if (READ_ONCE(rq->fence.error)) in wait_for_reset()
88 if (rq->fence.error != -EIO) { in wait_for_reset()
90 engine->name, in wait_for_reset()
91 rq->fence.context, in wait_for_reset()
[all …]
H A Dselftest_timeline.c1 // SPDX-License-Identifier: MIT
3 * Copyright © 2017-2018 Intel Corporation
29 struct drm_i915_gem_object *obj = tl->hwsp_ggtt->obj; in hwsp_page()
32 return sg_page(obj->mm.pages->sgl); in hwsp_page()
39 return (address + offset_in_page(tl->hwsp_offset)) / TIMELINE_SEQNO_BYTES; in hwsp_cacheline()
49 err = i915_gem_object_lock(tl->hwsp_ggtt->obj, &ww); in selftest_tl_pin()
53 if (err == -EDEADLK) { in selftest_tl_pin()
81 tl = xchg(&state->history[idx], tl); in __mock_hwsp_record()
83 radix_tree_delete(&state->cachelines, hwsp_cacheline(tl)); in __mock_hwsp_record()
96 while (count--) { in __mock_hwsp_timeline()
[all …]
H A Dselftest_ring_submission.c1 // SPDX-License-Identifier: MIT
13 u32 *cs; in create_wally() local
16 obj = i915_gem_object_create_internal(engine->i915, 4096); in create_wally()
20 vma = i915_vma_instance(obj, engine->gt->vm, NULL); in create_wally()
38 cs = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WC); in create_wally()
39 if (IS_ERR(cs)) { in create_wally()
41 return ERR_CAST(cs); in create_wally()
44 if (GRAPHICS_VER(engine->i915) >= 6) { in create_wally()
45 *cs++ = MI_STORE_DWORD_IMM_GEN4; in create_wally()
46 *cs++ = 0; in create_wally()
[all …]
H A Dselftest_workarounds.c1 // SPDX-License-Identifier: MIT
42 err = -EIO; in request_add_sync()
55 err = -ETIMEDOUT; in request_add_spin()
69 wa_init_start(&lists->gt_wa_list, gt, "GT_REF", "global"); in reference_lists_init()
70 gt_init_workarounds(gt, &lists->gt_wa_list); in reference_lists_init()
71 wa_init_finish(&lists->gt_wa_list); in reference_lists_init()
74 struct i915_wa_list *wal = &lists->engine[id].wa_list; in reference_lists_init()
76 wa_init_start(wal, gt, "REF", engine->name); in reference_lists_init()
81 &lists->engine[id].ctx_wa_list, in reference_lists_init()
93 intel_wa_list_free(&lists->engine[id].wa_list); in reference_lists_fini()
[all …]
H A Dselftest_engine_pm.c1 // SPDX-License-Identifier: GPL-2.0
25 return *a - *b; in cmp_u64()
34 static u32 *emit_wait(u32 *cs, u32 offset, int op, u32 value) in emit_wait() argument
36 *cs++ = MI_SEMAPHORE_WAIT | in emit_wait()
40 *cs++ = value; in emit_wait()
41 *cs++ = offset; in emit_wait()
42 *cs++ = 0; in emit_wait()
44 return cs; in emit_wait()
47 static u32 *emit_store(u32 *cs, u32 offset, u32 value) in emit_store() argument
49 *cs++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT; in emit_store()
[all …]
/linux/fs/fuse/
H A Ddev.c3 Copyright (C) 2001-2008 Miklos Szeredi <miklos@szeredi.hu>
45 return time_is_before_jiffies(req->create_time + fc->timeout.req_timeout); in fuse_request_expired()
62 * - check the fiq pending list
63 * - check the bg queue
64 * - check the fpq io and processing lists
69 * between lists, re-sent requests at the head of the pending list having a
78 struct fuse_iqueue *fiq = &fc->iq; in fuse_check_timeout()
83 if (!atomic_read(&fc->num_waiting)) in fuse_check_timeout()
84 goto out; in fuse_check_timeout()
86 spin_lock(&fiq->lock); in fuse_check_timeout()
[all …]
/linux/kernel/cgroup/
H A Dcpuset-v1.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 #include "cgroup-internal.h"
4 #include "cpuset-internal.h"
11 struct cpuset *cs; member
15 * Frequency meter - How fast is some event occurring?
19 * fmeter_init() - initialize a frequency meter.
20 * fmeter_markevent() - called each time the event happens.
21 * fmeter_getrate() - returns the recent rate of such events.
22 * fmeter_update() - internal routine used to update fmeter.
29 * The filter is single-pole low-pass recursive (IIR). The time unit
[all …]
H A Dcpuset.c7 * Copyright (C) 2004-2007 Silicon Graphics, Inc.
11 * sysfs is Copyright (c) 2001-3 Patrick Mochel
13 * 2003-10-10 Written by Simon Derr.
14 * 2003-10-22 Updates by Stephen Hemminger.
15 * 2004 May-July Rework by Paul Jackson.
24 #include "cpuset-internal.h"
50 * node binding, add this key to provide a quick low-cost judgment
74 * Exclusive CPUs distributed out to local or remote sub-partitions of
96 * - update_partition_sd_lb()
97 * - update_cpumasks_hier()
[all …]
/linux/tools/testing/selftests/cachestat/
H A Dtest_cachestat.c1 // SPDX-License-Identifier: GPL-2.0
28 void print_cachestat(struct cachestat *cs) in print_cachestat() argument
32 cs->nr_cache, cs->nr_dirty, cs->nr_writeback, in print_cachestat()
33 cs->nr_evicted, cs->nr_recently_evicted); in print_cachestat()
51 goto out; in write_exactly()
73 remained -= read_len; in write_exactly()
89 remained -= write_len; in write_exactly()
98 out: in write_exactly()
131 struct cachestat cs; in test_cachestat() local
136 if (fd == -1) { in test_cachestat()
[all …]
/linux/drivers/accel/habanalabs/common/
H A Dhw_queue.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright 2016-2019 HabanaLabs, Ltd.
13 * hl_queue_add_ptr - add to pi or ci and checks if it wraps around
23 ptr &= ((HL_QUEUE_LENGTH << 1) - 1); in hl_hw_queue_add_ptr()
28 return atomic_read(ci) & ((queue_len << 1) - 1); in queue_ci_get()
33 int delta = (q->pi - queue_ci_get(&q->ci, queue_len)); in queue_free_slots()
36 return (queue_len - delta); in queue_free_slots()
38 return (abs(delta) - queue_len); in queue_free_slots()
41 void hl_hw_queue_update_ci(struct hl_cs *cs) in hl_hw_queue_update_ci() argument
43 struct hl_device *hdev = cs->ctx->hdev; in hl_hw_queue_update_ci()
[all …]
/linux/drivers/gpu/drm/i915/gem/selftests/
H A Di915_gem_coherency.c2 * SPDX-License-Identifier: MIT
30 i915_gem_object_lock(ctx->obj, NULL); in cpu_set()
31 err = i915_gem_object_prepare_write(ctx->obj, &needs_clflush); in cpu_set()
33 goto out; in cpu_set()
35 page = i915_gem_object_get_page(ctx->obj, offset >> PAGE_SHIFT); in cpu_set()
47 i915_gem_object_finish_access(ctx->obj); in cpu_set()
49 out: in cpu_set()
50 i915_gem_object_unlock(ctx->obj); in cpu_set()
61 i915_gem_object_lock(ctx->obj, NULL); in cpu_get()
62 err = i915_gem_object_prepare_read(ctx->obj, &needs_clflush); in cpu_get()
[all …]
/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi6220-coresight.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
14 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
17 clock-names = "apb_pclk";
19 out-ports {
22 remote-endpoint =
28 in-ports {
31 remote-endpoint =
39 compatible = "arm,coresight-tmc", "arm,primecell";
42 clock-names = "apb_pclk";
44 in-ports {
[all …]
/linux/drivers/gpu/drm/xe/
H A Dxe_gsc_submit.c1 // SPDX-License-Identifier: MIT
45 * xe_gsc_create_host_session_id - Creates a random 64 bit host_session id with
46 * bits 56-63 masked.
48 * Returns: random host_session_id which can be used to send messages to gsc cs
60 * xe_gsc_emit_header - write the MTL GSC header in memory
90 * xe_gsc_poison_header - poison the MTL GSC header in memory
101 * xe_gsc_check_and_update_pending - check the pending bit and update the input
106 * @out: the iosys map containing the output buffer
113 struct iosys_map *out, u32 offset_out) in xe_gsc_check_and_update_pending() argument
115 if (mtl_gsc_header_rd(xe, out, offset_out, flags) & GSC_OUTFLAG_MSG_PENDING) { in xe_gsc_check_and_update_pending()
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/linux/fs/xfs/scrub/
H A Dstats.c1 // SPDX-License-Identifier: GPL-2.0-or-later
20 /* all 32-bit counters here */
37 /* all 64-bit items here */
43 /* non-counter state must go at the end for clearall */
92 struct xchk_stats *cs, in xchk_stats_format() argument
96 struct xchk_scrub_stats *css = &cs->cs_stats[0]; in xchk_stats_format()
108 (unsigned int)css->invocations, in xchk_stats_format()
109 (unsigned int)css->clean, in xchk_stats_format()
110 (unsigned int)css->corrupt, in xchk_stats_format()
111 (unsigned int)css->preen, in xchk_stats_format()
[all …]
/linux/tools/perf/util/
H A Ddata-convert-bt.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <babeltrace/ctf-writer/writer.h>
15 #include <babeltrace/ctf-writer/clock.h>
16 #include <babeltrace/ctf-writer/stream.h>
17 #include <babeltrace/ctf-writer/event.h>
18 #include <babeltrace/ctf-writer/event-types.h>
19 #include <babeltrace/ctf-writer/event-fields.h>
20 #include <babeltrace/ctf-ir/utils.h>
23 #include "data-convert.h"
39 #include <event-parse.h>
[all …]
/linux/arch/powerpc/platforms/pseries/
H A Dhotplug-cpu.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Split out from arch/powerpc/platforms/pseries/setup.c
17 #define pr_fmt(fmt) "pseries-hotplug-cpu: " fmt
88 systemcfg->processorCount--; in pseries_cpu_disable()
111 * the cpu-offline. Here we wait for long enough to allow the cpu in question
112 * to self-destroy so that the cpu-offline thread can send the CPU_DEAD
116 * self-destruct.
144 paca_ptrs[cpu]->cpu_start = 0; in pseries_cpu_die()
148 * find_cpu_id_range - found a linear ranger of @nthreads free CPU ids.
161 int rc = -ENOSPC; in find_cpu_id_range()
[all …]
/linux/drivers/mtd/nand/raw/
H A Dau1550nd.c1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <asm/mach-au1x00/au1000.h>
16 #include <asm/mach-au1x00/au1550nd.h>
23 int cs; member
33 * au_write_buf - write buffer to chip
48 writeb(p[i], ctx->base + MEM_STNAND_DATA); in au_write_buf()
54 * au_read_buf - read chip data into buffer
69 p[i] = readb(ctx->base + MEM_STNAND_DATA); in au_read_buf()
75 * au_write_buf16 - write buffer to chip
91 writew(p[i], ctx->base + MEM_STNAND_DATA); in au_write_buf16()
[all …]
/linux/drivers/mtd/nand/raw/atmel/
H A Dnand-controller.c1 // SPDX-License-Identifier: GPL-2.0
6 * Author: Boris Brezillon <boris.brezillon@free-electrons.com>
23 * Derived from Das U-Boot source code
24 * (u-boot-1.1.5/board/atmel/at91sam9263ek/nand.c)
38 * - atmel_nand_: all generic structures/functions
39 * - atmel_smc_nand_: all structures/functions specific to the SMC interface
41 * - atmel_hsmc_nand_: all structures/functions specific to the HSMC interface
43 * - atmel_nfc_: all structures/functions used to manipulate the NFC sub-block
45 * - <soc>_nand_: all SoC specific structures/functions
49 #include <linux/dma-mapping.h>
[all …]
/linux/drivers/input/joystick/iforce/
H A Diforce-serio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 2000-2001 Vojtech Pavlik <vojtech@ucw.cz>
6 * USB/RS232 I-Force joysticks and wheels.
29 unsigned char cs; in iforce_serio_xmit() local
32 if (test_and_set_bit(IFORCE_XMIT_RUNNING, iforce->xmit_flags)) { in iforce_serio_xmit()
33 set_bit(IFORCE_XMIT_AGAIN, iforce->xmit_flags); in iforce_serio_xmit()
37 guard(spinlock_irqsave)(&iforce->xmit_lock); in iforce_serio_xmit()
40 if (iforce->xmit.head == iforce->xmit.tail) in iforce_serio_xmit()
43 cs = 0x2b; in iforce_serio_xmit()
45 serio_write(iforce_serio->serio, 0x2b); in iforce_serio_xmit()
[all …]

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