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/linux/drivers/cpufreq/
H A DKconfig.arm1 # SPDX-License-Identifier: GPL-2.0-only
7 tristate "Allwinner nvmem based SUN50I CPUFreq driver"
12 This adds the nvmem based CPUFreq driver for Allwinner
16 module will be called sun50i-cpufreq-nvmem.
19 tristate "Airoha EN7581 SoC CPUFreq support"
25 This adds the CPUFreq driver for Airoha EN7581 SoCs.
28 tristate "Apple Silicon SoC CPUFreq support"
33 This adds the CPUFreq driver for Apple Silicon machines
37 tristate "Armada 37xx CPUFreq support"
41 This adds the CPUFreq driver support for Marvell Armada 37xx SoCs.
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H A Dtegra20-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Based on arch/arm/plat-omap/cpu-omap.c, (C) 2005 Nokia Corporation
28 if (of_property_present(np, "operating-points-v2")) in cpu0_node_has_opp_v2_prop()
53 dev_err(&pdev->dev, "operating points not found\n"); in tegra20_cpufreq_probe()
54 dev_err(&pdev->dev, "please update your device tree\n"); in tegra20_cpufreq_probe()
55 return -ENODEV; in tegra20_cpufreq_probe()
66 dev_info(&pdev->dev, "hardware version 0x%x 0x%x\n", in tegra20_cpufreq_probe()
71 return -ENODEV; in tegra20_cpufreq_probe()
75 dev_err(&pdev->dev, "failed to set supported hw: %d\n", err); in tegra20_cpufreq_probe()
79 err = devm_add_action_or_reset(&pdev->dev, in tegra20_cpufreq_probe()
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H A Dsti-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Match running platform with pre-defined OPP values for CPUFreq
43 * struct sti_cpufreq_ddata - ST CPUFreq Driver Data
56 struct device_node *np = ddata.cpu->of_node; in sti_cpufreq_fetch_major()
83 struct device_node *np = dev->of_node; in sti_cpufreq_fetch_minor()
88 ret = of_property_read_u32_index(np, "st,syscfg-eng", in sti_cpufreq_fetch_minor()
154 struct device_node *np = dev->of_node; in sti_cpufreq_set_opp_info()
170 return -ENODEV; in sti_cpufreq_set_opp_info()
173 ret = of_property_read_u32_index(np, "st,syscfg-eng", in sti_cpufreq_set_opp_info()
176 dev_warn(dev, "Failed to read HW info offset from DT\n"); in sti_cpufreq_set_opp_info()
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H A Dcpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/cpufreq/cpufreq.c
6 * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
9 * Oct 2005 - Ashok Raj <ashok.raj@intel.com>
11 * Feb 2006 - Jacob Shin <jacob.shin@amd.com>
12 * Fix handling for CPU hotplug -- affected CPUs
18 #include <linux/cpufreq.h>
55 * The "cpufreq driver" - the arch- or hardware-dependent low
56 * level driver of CPUFreq support, and its spinlock. This lock
69 /* Flag to suspend/resume CPUFreq governors */
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/linux/Documentation/devicetree/bindings/cpufreq/
H A Dcpufreq-mediatek-hw.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/cpufreq/cpufreq-mediatek-hw.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek's CPUFREQ
10 - Hector Yuan <hector.yuan@mediatek.com>
13 CPUFREQ HW is a hardware engine used by MediaTek SoCs to
19 const: mediatek,cpufreq-hw
25 Addresses and sizes for the memory of the HW bases in
29 "#performance-domain-cells":
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H A Dcpufreq-st.txt1 Binding for ST's CPUFreq driver
4 ST's CPUFreq driver attempts to read 'process' and 'version' attributes
10 ----------------------
16 - operating-points : [See: ../power/opp-v1.yaml]
19 --------------
24 operating-points = <1500000 0
32 --------------------------------------------
34 This requires the ST CPUFreq driver to supply 'process' and 'version' info.
38 - operating-points-v2 : [See ../power/opp-v2.yaml]
41 ----------------
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H A Dimx-cpufreq-dt.txt1 i.MX CPUFreq-DT OPP bindings
6 the opp-supported-hw values for each OPP to check if the OPP is allowed.
9 --------------------
11 For each opp entry in 'operating-points-v2' table:
12 - opp-supported-hw: Two bitmaps indicating:
13 - Supported speed grade mask
14 - Supported market segment mask
21 --------
24 compatible = "operating-points-v2";
25 opp-1000000000 {
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H A Dnvidia,tegra20-cpufreq.txt1 Binding for NVIDIA Tegra20 CPUFreq
5 - clocks: Must contain an entry for the CPU clock.
6 See ../clocks/clock-bindings.txt for details.
7 - operating-points-v2: See ../bindings/opp/opp-v2.yaml for details.
8 - #cooling-cells: Should be 2. See ../thermal/thermal-cooling-devices.yaml for details.
10 For each opp entry in 'operating-points-v2' table:
11 - opp-supported-hw: Two bitfields indicating:
23 - opp-microvolt: CPU voltage triplet.
26 - cpu-supply: Phandle to the CPU power supply.
31 regulator-name = "vdd_cpu";
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/linux/tools/power/cpupower/bench/
H A Dcpufreq-bench_script.sh2 # SPDX-License-Identifier: GPL-2.0-or-later
7 # Ondemand up_threshold and sampling rate test script for cpufreq-bench
16 # Depending on the kernel and the HW sampling rate could be restricted
24 local -i up_threshold_set
25 local -i sampling_rate_set
30 echo $up_threshold >/sys/devices/system/cpu/cpu0/cpufreq/ondemand/up_threshold
31 echo $sampling_rate >/sys/devices/system/cpu/cpu0/cpufreq/ondemand/sampling_rate
32 up_threshold_set=$(cat /sys/devices/system/cpu/cpu0/cpufreq/ondemand/up_threshold)
33 sampling_rate_set=$(cat /sys/devices/system/cpu/cpu0/cpufreq/ondemand/sampling_rate)
36 if [ ${up_threshold_set} -eq ${up_threshold} ];then
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/linux/drivers/clk/
H A Dclk-scpi.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/clk-provider.h>
18 struct clk_hw hw; member
23 #define to_scpi_clk(clk) container_of(clk, struct scpi_clk, hw)
27 static unsigned long scpi_clk_recalc_rate(struct clk_hw *hw, in scpi_clk_recalc_rate() argument
30 struct scpi_clk *clk = to_scpi_clk(hw); in scpi_clk_recalc_rate()
32 return clk->scpi_ops->clk_get_val(clk->id); in scpi_clk_recalc_rate()
35 static long scpi_clk_round_rate(struct clk_hw *hw, unsigned long rate, in scpi_clk_round_rate() argument
47 static int scpi_clk_set_rate(struct clk_hw *hw, unsigned long rate, in scpi_clk_set_rate() argument
50 struct scpi_clk *clk = to_scpi_clk(hw); in scpi_clk_set_rate()
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/linux/tools/power/cpupower/po/
H A Dde.po3 # Copyright (C) 2004-2009 Dominik Brodowski <linux@dominikbrodowski.net>
8 "Project-Id-Version: cpufrequtils 006\n"
9 "Report-Msgid-Bugs-To: \n"
10 "POT-Creation-Date: 2011-03-08 17:03+0100\n"
11 "PO-Revision-Date: 2019-06-02 15:23+0200\n"
12 "Last-Translator: Benjamin Weis <benjamin.weis@gmx.com>\n"
13 "Language-Team: NONE\n"
15 "MIME-Version: 1.0\n"
16 "Content-Type: text/plain; charset=UTF-8\n"
17 "Content-Transfer-Encoding: 8bit\n"
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H A Dpt.po9 "Project-Id-Version: cpufrequtils 004\n"
10 "Report-Msgid-Bugs-To: \n"
11 "POT-Creation-Date: 2011-03-08 17:03+0100\n"
12 "PO-Revision-Date: 2008-06-14 22:16-0400\n"
13 "Last-Translator: Claudio Eduardo <claudioeddy@gmail.com>\n"
14 "MIME-Version: 1.0\n"
15 "Content-Type: text/plain; charset=UTF-8\n"
16 "Content-Transfer-Encoding: 8bit\n"
70 #: utils/idle_monitor/cpupower-monitor.c:66
71 #, c-format
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H A Dit.po2 # Copyright (C) 2004-2009
9 "Project-Id-Version: cpufrequtils 0.3\n"
10 "Report-Msgid-Bugs-To: \n"
11 "POT-Creation-Date: 2011-03-08 17:03+0100\n"
12 "PO-Revision-Date: 2009-08-15 12:00+0900\n"
13 "Last-Translator: Mattia Dongili <malattia@gmail.com>\n"
14 "Language-Team: NONE\n"
16 "MIME-Version: 1.0\n"
17 "Content-Type: text/plain; charset=UTF-8\n"
18 "Content-Transfer-Encoding: 8bit\n"
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H A Dcs.po10 "Project-Id-Version: cs\n"
11 "Report-Msgid-Bugs-To: \n"
12 "POT-Creation-Date: 2011-03-08 17:03+0100\n"
13 "PO-Revision-Date: 2008-06-11 16:26+0200\n"
14 "Last-Translator: Karel Volný <kavol@seznam.cz>\n"
15 "Language-Team: Czech <diskuze@lists.l10n.cz>\n"
17 "MIME-Version: 1.0\n"
18 "Content-Type: text/plain; charset=UTF-8\n"
19 "Content-Transfer-Encoding: 8bit\n"
20 "Plural-Forms: nplurals=3; plural=(n==1) ? 0 : (n>=2 && n<=4) ? 1 : 2;\n"
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H A Dfr.po9 "Project-Id-Version: cpufrequtils 0.1-pre2\n"
10 "Report-Msgid-Bugs-To: \n"
11 "POT-Creation-Date: 2011-03-08 17:03+0100\n"
12 "PO-Revision-Date: 2004-11-17 15:53+1000\n"
13 "Last-Translator: Bruno Ducrot <ducrot@poupinou.org>\n"
14 "Language-Team: NONE\n"
16 "MIME-Version: 1.0\n"
17 "Content-Type: text/plain; charset=ISO-8859-1\n"
18 "Content-Transfer-Encoding: 8bit\n"
72 #: utils/idle_monitor/cpupower-monitor.c:66
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H A Dka.po3 # Copyright (C) 2004-2022 Dominik Brodowski <linux@dominikbrodowski.net>
9 "Project-Id-Version: cpufrequtils 006\n"
10 "Report-Msgid-Bugs-To: \n"
11 "POT-Creation-Date: 2011-03-08 17:03+0100\n"
12 "PO-Revision-Date: 2022-09-18 22:12+0200\n"
13 "Last-Translator: Ekaterine Papava <katopapava@gmail.com>\n"
14 "Language-Team: NONE\n"
16 "MIME-Version: 1.0\n"
17 "Content-Type: text/plain; charset=UTF-8\n"
18 "Content-Transfer-Encoding: 8bit\n"
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/linux/Documentation/cpu-freq/
H A Dcpu-drivers.rst1 .. SPDX-License-Identifier: GPL-2.0
4 How to Implement a new CPUFreq Processor Driver
10 - Dominik Brodowski <linux@brodo.de>
11 - Rafael J. Wysocki <rafael.j.wysocki@intel.com>
12 - Viresh Kumar <viresh.kumar@linaro.org>
18 1.2 Per-CPU Initialization
31 So, you just got a brand-new CPU / chipset with datasheets and want to
32 add cpufreq support for this CPU / chipset? Great. Here are some hints
37 ------------------
41 chipset. If so, register a struct cpufreq_driver with the CPUfreq core
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/linux/drivers/base/
H A Darch_topology.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/cpufreq.h>
52 * either cpufreq or counter driven. If the support status changes as in update_scale_freq_invariant()
70 * supported by cpufreq. in topology_set_scale_freq_source()
81 if (!sfd || sfd->source != SCALE_FREQ_SOURCE_ARCH) { in topology_set_scale_freq_source()
104 if (sfd && sfd->source == source) { in topology_clear_scale_freq_source()
114 * use-after-free races. in topology_clear_scale_freq_source()
127 sfd->set_freq_scale(); in topology_scale_freq_tick()
144 * want to update the scale factor with information from CPUFREQ. in topology_set_freq_scale()
167 * topology_update_hw_pressure() - Update HW pressure for CPUs
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/linux/Documentation/ABI/testing/
H A Dsysfs-devices-system-cpu2 Date: pre-git history
3 Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
18 Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
37 See Documentation/admin-guide/cputopology.rst for more information.
43 Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
58 Contact: Linux memory management mailing list <linux-mm@kvack.org>
67 /sys/devices/system/cpu/cpu42/node2 -> ../../node/node2
77 Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
89 core_siblings_list: human-readable list of the logical CPU
99 thread_siblings_list: human-readable list of cpuX's hardware
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/linux/drivers/clk/qcom/
H A Dkrait-cc.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/clk-provider.h>
16 #include "clk-krait.h"
52 mux->old_index = krait_mux_clk_ops.get_parent(&mux->hw); in krait_notifier_cb()
53 ret = krait_mux_clk_ops.set_parent(&mux->hw, mux->safe_sel); in krait_notifier_cb()
54 mux->reparent = false; in krait_notifier_cb()
61 if (!mux->reparent) in krait_notifier_cb()
62 ret = krait_mux_clk_ops.set_parent(&mux->hw, in krait_notifier_cb()
63 mux->old_index); in krait_notifier_cb()
74 mux->clk_nb.notifier_call = krait_notifier_cb; in krait_notifier_register()
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/linux/drivers/gpu/drm/i915/gt/
H A Dintel_llc.c1 // SPDX-License-Identifier: MIT
7 #include <linux/cpufreq.h>
37 max_khz = policy->cpuinfo.max_freq; in cpu_max_MHz()
53 struct drm_i915_private *i915 = llc_to_gt(llc)->i915; in get_ia_constants()
54 struct intel_rps *rps = &llc_to_gt(llc)->rps; in get_ia_constants()
59 consts->max_ia_freq = cpu_max_MHz(); in get_ia_constants()
61 consts->min_ring_freq = in get_ia_constants()
62 intel_uncore_read(llc_to_gt(llc)->uncore, DCLK) & 0xf; in get_ia_constants()
64 consts->min_ring_freq = mult_frac(consts->min_ring_freq, 8, 3); in get_ia_constants()
66 consts->min_gpu_freq = intel_rps_get_min_raw_freq(rps); in get_ia_constants()
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/linux/Documentation/admin-guide/pm/
H A Dcpufreq.rst1 .. SPDX-License-Identifier: GPL-2.0
20 Operating Performance Points or P-states (in ACPI terminology). As a rule,
24 time (or the more power is drawn) by the CPU in the given P-state. Therefore
29 as possible and then there is no reason to use any P-states different from the
30 highest one (i.e. the highest-performance frequency/voltage configuration
38 put into different P-states.
41 capacity, so as to decide which P-states to put the CPUs into. Of course, since
51 The Linux kernel supports CPU performance scaling by means of the ``CPUFreq``
55 The ``CPUFreq`` core provides the common code infrastructure and user space
64 information on the available P-states (or P-state ranges in some cases) and
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/linux/drivers/clk/renesas/
H A Drcar-gen3-cpg.c1 // SPDX-License-Identifier: GPL-2.0
3 * R-Car Gen3 Clock Pulse Generator
5 * Copyright (C) 2015-2018 Glider bvba
8 * Based on clk-rcar-gen3.c
16 #include <linux/clk-provider.h>
25 #include "renesas-cpg-mssr.h"
26 #include "rcar-cpg-lib.h"
27 #include "rcar-gen3-cpg.h"
43 struct clk_hw hw; member
50 #define to_pll_clk(_hw) container_of(_hw, struct cpg_pll_clk, hw)
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/linux/include/linux/
H A Dcpufreq.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/include/linux/cpufreq.h
6 * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
25 * CPUFREQ INTERFACE *
30 * Maximum transition latency is in nanoseconds - if it's unknown,
34 #define CPUFREQ_ETERNAL (-1)
51 /* in 10^(-9) s = nanoseconds */
62 should set cpufreq */
70 unsigned int cur; /* in kHz, only needed if cpufreq
96 * - Any routine that wants to read from the policy structure will
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/linux/drivers/clk/tegra/
H A Dclk-tegra-super-cclk.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Based on clk-super.c
6 * Based on older tegra20-cpufreq driver by Colin Cross <ccross@google.com>
10 * Copyright (C) 2019 GRATE-DRIVER project
14 #include <linux/clk-provider.h>
33 static u8 cclk_super_get_parent(struct clk_hw *hw) in cclk_super_get_parent() argument
35 return tegra_clk_super_ops.get_parent(hw); in cclk_super_get_parent()
38 static int cclk_super_set_parent(struct clk_hw *hw, u8 index) in cclk_super_set_parent() argument
40 return tegra_clk_super_ops.set_parent(hw, index); in cclk_super_set_parent()
43 static int cclk_super_set_rate(struct clk_hw *hw, unsigned long rate, in cclk_super_set_rate() argument
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