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/linux/Documentation/devicetree/bindings/cpufreq/
H A Dcpufreq-qcom-hw.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/cpufreq/cpufreq-qcom-hw.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. CPUFREQ
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
14 CPUFREQ HW is a hardware engine used by some Qualcomm Technologies, Inc. (QTI)
21 - description: v1 of CPUFREQ HW
23 - enum:
24 - qcom,qcm2290-cpufreq-hw
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H A Dcpufreq-mediatek-hw.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/cpufreq/cpufreq-mediatek-hw.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek's CPUFREQ
10 - Hector Yuan <hector.yuan@mediatek.com>
13 CPUFREQ HW is a hardware engine used by MediaTek SoCs to
19 const: mediatek,cpufreq-hw
25 Addresses and sizes for the memory of the HW bases in
29 "#performance-domain-cells":
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H A Dcpufreq-st.txt1 Binding for ST's CPUFreq driver
4 ST's CPUFreq driver attempts to read 'process' and 'version' attributes
10 ----------------------
16 - operating-points : [See: ../power/opp-v1.yaml]
19 --------------
24 operating-points = <1500000 0
32 --------------------------------------------
34 This requires the ST CPUFreq driver to supply 'process' and 'version' info.
38 - operating-points-v2 : [See ../power/opp-v2.yaml]
41 ----------------
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H A Dimx-cpufreq-dt.txt1 i.MX CPUFreq-DT OPP bindings
6 the opp-supported-hw values for each OPP to check if the OPP is allowed.
9 --------------------
11 For each opp entry in 'operating-points-v2' table:
12 - opp-supported-hw: Two bitmaps indicating:
13 - Supported speed grade mask
14 - Supported market segment mask
21 --------
24 compatible = "operating-points-v2";
25 opp-1000000000 {
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H A Dnvidia,tegra20-cpufreq.txt1 Binding for NVIDIA Tegra20 CPUFreq
5 - clocks: Must contain an entry for the CPU clock.
6 See ../clocks/clock-bindings.txt for details.
7 - operating-points-v2: See ../bindings/opp/opp-v2.yaml for details.
8 - #cooling-cells: Should be 2. See ../thermal/thermal-cooling-devices.yaml for details.
10 For each opp entry in 'operating-points-v2' table:
11 - opp-supported-hw: Two bitfields indicating:
23 - opp-microvolt: CPU voltage triplet.
26 - cpu-supply: Phandle to the CPU power supply.
31 regulator-name = "vdd_cpu";
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/linux/drivers/cpufreq/
H A DKconfig.arm1 # SPDX-License-Identifier: GPL-2.0-only
7 tristate "Allwinner nvmem based SUN50I CPUFreq driver"
12 This adds the nvmem based CPUFreq driver for Allwinner
16 module will be called sun50i-cpufreq-nvmem.
19 tristate "Apple Silicon SoC CPUFreq support"
24 This adds the CPUFreq driver for Apple Silicon machines
28 tristate "Armada 37xx CPUFreq support"
32 This adds the CPUFreq driver support for Marvell Armada 37xx SoCs.
36 tristate "Armada 8K CPUFreq driver"
41 This enables the CPUFreq driver support for Marvell
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 # CPUfreq core
3 obj-$(CONFIG_CPU_FREQ) += cpufreq.o freq_table.o
5 # CPUfreq stats
6 obj-$(CONFIG_CPU_FREQ_STAT) += cpufreq_stats.o
8 # CPUfreq governors
9 obj-$(CONFIG_CPU_FREQ_GOV_PERFORMANCE) += cpufreq_performance.o
10 obj-$(CONFIG_CPU_FREQ_GOV_POWERSAVE) += cpufreq_powersave.o
11 obj-$(CONFIG_CPU_FREQ_GOV_USERSPACE) += cpufreq_userspace.o
12 obj-$(CONFIG_CPU_FREQ_GOV_ONDEMAND) += cpufreq_ondemand.o
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H A Dmediatek-cpufreq-hw.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/cpufreq.h>
63 policy = cpufreq_cpu_get_raw(cpu_dev->id); in mtk_cpufreq_get_cpu_power()
67 data = policy->driver_data; in mtk_cpufreq_get_cpu_power()
69 for (i = 0; i < data->nr_opp; i++) { in mtk_cpufreq_get_cpu_power()
70 if (data->table[i].frequency < *KHz) in mtk_cpufreq_get_cpu_power()
73 i--; in mtk_cpufreq_get_cpu_power()
75 *KHz = data->table[i].frequency; in mtk_cpufreq_get_cpu_power()
76 /* Provide micro-Watts value to the Energy Model */ in mtk_cpufreq_get_cpu_power()
77 *uW = readl_relaxed(data->reg_bases[REG_EM_POWER_TBL] + in mtk_cpufreq_get_cpu_power()
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H A Dsun50i-cpufreq-nvmem.c1 // SPDX-License-Identifier: GPL-2.0
3 * Allwinner CPUFreq nvmem based driver
5 * The sun50i-cpufreq-nvmem driver reads the efuse value from the SoC to
13 #include <linux/arm-smccc.h>
16 #include <linux/nvmem-consumer.h>
39 * the slowest bin. Expected efuse values are 1-3, slowest in sun50i_h6_efuse_xlate()
43 return efuse_value - 1; in sun50i_h6_efuse_xlate()
59 * returned speedbin index is 4 -> 0/2 -> 3 -> 1, from worst to best.
98 pr_warn("sun50i-cpufreq-nvmem: unknown speed bin 0x%x, using default bin 0\n", in sun50i_h616_efuse_xlate()
116 { .compatible = "allwinner,sun50i-h6-operating-points",
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H A Dqcom-cpufreq-hw.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
8 #include <linux/cpufreq.h>
50 * Mutex to synchronize between de-init sequence and re-starting LMh
80 dev = get_cpu_device(policy->cpu); in qcom_cpufreq_set_bw()
82 return -ENODEV; in qcom_cpufreq_set_bw()
116 struct qcom_cpufreq_data *data = policy->driver_data; in qcom_cpufreq_hw_target_index()
118 unsigned long freq = policy->freq_table[index].frequency; in qcom_cpufreq_hw_target_index()
121 writel_relaxed(index, data->base + soc_data->reg_perf_state); in qcom_cpufreq_hw_target_index()
123 if (data->per_core_dcvs) in qcom_cpufreq_hw_target_index()
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H A Dimx-cpufreq-dt.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/cpufreq.h>
13 #include <linux/nvmem-consumer.h>
20 #include "cpufreq-dt.h"
32 /* cpufreq-dt device registered by imx-cpufreq-dt */
64 unsigned int newfreq = policy->freq_table[index].frequency; in imx7ulp_target_intermediate()
92 if (!of_property_present(cpu_dev->of_node, "cpu-supply")) in imx_cpufreq_dt_probe()
93 return -ENODEV; in imx_cpufreq_dt_probe()
101 dt_pdev = platform_device_register_data(NULL, "cpufreq-dt", in imx_cpufreq_dt_probe()
102 -1, &imx7ulp_data, in imx_cpufreq_dt_probe()
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H A Dtegra20-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Based on arch/arm/plat-omap/cpu-omap.c, (C) 2005 Nokia Corporation
28 if (of_property_present(np, "operating-points-v2")) in cpu0_node_has_opp_v2_prop()
53 dev_err(&pdev->dev, "operating points not found\n"); in tegra20_cpufreq_probe()
54 dev_err(&pdev->dev, "please update your device tree\n"); in tegra20_cpufreq_probe()
55 return -ENODEV; in tegra20_cpufreq_probe()
66 dev_info(&pdev->dev, "hardware version 0x%x 0x%x\n", in tegra20_cpufreq_probe()
71 return -ENODEV; in tegra20_cpufreq_probe()
75 dev_err(&pdev->dev, "failed to set supported hw: %d\n", err); in tegra20_cpufreq_probe()
79 err = devm_add_action_or_reset(&pdev->dev, in tegra20_cpufreq_probe()
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H A Dti-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * TI CPUFreq/OPP hw-supported driver
5 * Copyright (C) 2016-2017 Texas Instruments, Inc.
6 * Dave Gerlach <d-gerlach@ti.com>
110 efuse = opp_data->soc_data->efuse_fallback; in amx3_efuse_xlate()
256 .efuse_offset = OMAP34xx_ProdID_SKUID - OMAP3_SYSCON_BASE,
259 .rev_offset = OMAP3_CONTROL_IDCODE - OMAP3_SYSCON_BASE,
284 .efuse_offset = OMAP3_CONTROL_DEVICE_STATUS - OMAP3_SYSCON_BASE,
287 .rev_offset = OMAP3_CONTROL_IDCODE - OMAP3_SYSCON_BASE,
299 .efuse_offset = OMAP3_CONTROL_DEVICE_STATUS - OMAP3_SYSCON_BASE,
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H A Dsti-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Match running platform with pre-defined OPP values for CPUFreq
43 * struct sti_cpufreq_ddata - ST CPUFreq Driver Data
56 struct device_node *np = ddata.cpu->of_node; in sti_cpufreq_fetch_major()
83 struct device_node *np = dev->of_node; in sti_cpufreq_fetch_minor()
88 ret = of_property_read_u32_index(np, "st,syscfg-eng", in sti_cpufreq_fetch_minor()
154 struct device_node *np = dev->of_node; in sti_cpufreq_set_opp_info()
170 return -ENODEV; in sti_cpufreq_set_opp_info()
173 ret = of_property_read_u32_index(np, "st,syscfg-eng", in sti_cpufreq_set_opp_info()
176 dev_warn(dev, "Failed to read HW info offset from DT\n"); in sti_cpufreq_set_opp_info()
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/linux/tools/power/cpupower/bench/
H A Dcpufreq-bench_script.sh2 # SPDX-License-Identifier: GPL-2.0-or-later
7 # Ondemand up_threshold and sampling rate test script for cpufreq-bench
16 # Depending on the kernel and the HW sampling rate could be restricted
24 local -i up_threshold_set
25 local -i sampling_rate_set
30 echo $up_threshold >/sys/devices/system/cpu/cpu0/cpufreq/ondemand/up_threshold
31 echo $sampling_rate >/sys/devices/system/cpu/cpu0/cpufreq/ondemand/sampling_rate
32 up_threshold_set=$(cat /sys/devices/system/cpu/cpu0/cpufreq/ondemand/up_threshold)
33 sampling_rate_set=$(cat /sys/devices/system/cpu/cpu0/cpufreq/ondemand/sampling_rate)
36 if [ ${up_threshold_set} -eq ${up_threshold} ];then
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/linux/tools/power/cpupower/utils/idle_monitor/
H A Dmperf_monitor.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <cpufreq.h>
17 #include "idle_monitor/cpupower-monitor.h"
68 * 2) cpufreq /sys/devices/.../cpu0/cpufreq/cpuinfo_max_freq at init time
69 * 1. Is preferred as it also works without cpufreq subsystem (e.g. on Xen)
163 return -1; in mperf_get_count_percent()
166 return -1; in mperf_get_count_percent()
168 mperf_diff = mperf_current_count[cpu] - mperf_previous_count[cpu]; in mperf_get_count_percent()
169 aperf_diff = aperf_current_count[cpu] - aperf_previous_count[cpu]; in mperf_get_count_percent()
172 tsc_diff = tsc_at_measure_end[cpu] - tsc_at_measure_start[cpu]; in mperf_get_count_percent()
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/linux/drivers/clk/bcm/
H A Dclk-raspberrypi.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Even though clk-bcm2835 provides an interface to the hardware registers for
8 * over-temperature and under-voltage protections provided by the firmware.
14 #include <linux/clk-provider.h>
19 #include <soc/bcm2835/raspberrypi-firmware.h>
35 [RPI_FIRMWARE_PIXEL_BVB_CLK_ID] = "pixel-bvb",
47 struct platform_device *cpufreq; member
51 struct clk_hw hw; member
141 * https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface
154 .id = cpu_to_le32(data->id), in raspberrypi_clock_property()
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/linux/drivers/clk/
H A Dclk-scpi.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/clk-provider.h>
18 struct clk_hw hw; member
23 #define to_scpi_clk(clk) container_of(clk, struct scpi_clk, hw)
27 static unsigned long scpi_clk_recalc_rate(struct clk_hw *hw, in scpi_clk_recalc_rate() argument
30 struct scpi_clk *clk = to_scpi_clk(hw); in scpi_clk_recalc_rate()
32 return clk->scpi_ops->clk_get_val(clk->id); in scpi_clk_recalc_rate()
35 static long scpi_clk_round_rate(struct clk_hw *hw, unsigned long rate, in scpi_clk_round_rate() argument
47 static int scpi_clk_set_rate(struct clk_hw *hw, unsigned long rate, in scpi_clk_set_rate() argument
50 struct scpi_clk *clk = to_scpi_clk(hw); in scpi_clk_set_rate()
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/linux/tools/power/cpupower/po/
H A Dde.po3 # Copyright (C) 2004-2009 Dominik Brodowski <linux@dominikbrodowski.net>
8 "Project-Id-Version: cpufrequtils 006\n"
9 "Report-Msgid-Bugs-To: \n"
10 "POT-Creation-Date: 2011-03-08 17:03+0100\n"
11 "PO-Revision-Date: 2019-06-02 15:23+0200\n"
12 "Last-Translator: Benjamin Weis <benjamin.weis@gmx.com>\n"
13 "Language-Team: NONE\n"
15 "MIME-Version: 1.0\n"
16 "Content-Type: text/plain; charset=UTF-8\n"
17 "Content-Transfer-Encoding: 8bit\n"
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H A Dpt.po9 "Project-Id-Version: cpufrequtils 004\n"
10 "Report-Msgid-Bugs-To: \n"
11 "POT-Creation-Date: 2011-03-08 17:03+0100\n"
12 "PO-Revision-Date: 2008-06-14 22:16-0400\n"
13 "Last-Translator: Claudio Eduardo <claudioeddy@gmail.com>\n"
14 "MIME-Version: 1.0\n"
15 "Content-Type: text/plain; charset=UTF-8\n"
16 "Content-Transfer-Encoding: 8bit\n"
70 #: utils/idle_monitor/cpupower-monitor.c:66
71 #, c-format
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H A Dit.po2 # Copyright (C) 2004-2009
9 "Project-Id-Version: cpufrequtils 0.3\n"
10 "Report-Msgid-Bugs-To: \n"
11 "POT-Creation-Date: 2011-03-08 17:03+0100\n"
12 "PO-Revision-Date: 2009-08-15 12:00+0900\n"
13 "Last-Translator: Mattia Dongili <malattia@gmail.com>\n"
14 "Language-Team: NONE\n"
16 "MIME-Version: 1.0\n"
17 "Content-Type: text/plain; charset=UTF-8\n"
18 "Content-Transfer-Encoding: 8bit\n"
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H A Dcs.po10 "Project-Id-Version: cs\n"
11 "Report-Msgid-Bugs-To: \n"
12 "POT-Creation-Date: 2011-03-08 17:03+0100\n"
13 "PO-Revision-Date: 2008-06-11 16:26+0200\n"
14 "Last-Translator: Karel Volný <kavol@seznam.cz>\n"
15 "Language-Team: Czech <diskuze@lists.l10n.cz>\n"
17 "MIME-Version: 1.0\n"
18 "Content-Type: text/plain; charset=UTF-8\n"
19 "Content-Transfer-Encoding: 8bit\n"
20 "Plural-Forms: nplurals=3; plural=(n==1) ? 0 : (n>=2 && n<=4) ? 1 : 2;\n"
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H A Dfr.po9 "Project-Id-Version: cpufrequtils 0.1-pre2\n"
10 "Report-Msgid-Bugs-To: \n"
11 "POT-Creation-Date: 2011-03-08 17:03+0100\n"
12 "PO-Revision-Date: 2004-11-17 15:53+1000\n"
13 "Last-Translator: Bruno Ducrot <ducrot@poupinou.org>\n"
14 "Language-Team: NONE\n"
16 "MIME-Version: 1.0\n"
17 "Content-Type: text/plain; charset=ISO-8859-1\n"
18 "Content-Transfer-Encoding: 8bit\n"
72 #: utils/idle_monitor/cpupower-monitor.c:66
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H A Dka.po3 # Copyright (C) 2004-2022 Dominik Brodowski <linux@dominikbrodowski.net>
9 "Project-Id-Version: cpufrequtils 006\n"
10 "Report-Msgid-Bugs-To: \n"
11 "POT-Creation-Date: 2011-03-08 17:03+0100\n"
12 "PO-Revision-Date: 2022-09-18 22:12+0200\n"
13 "Last-Translator: Ekaterine Papava <katopapava@gmail.com>\n"
14 "Language-Team: NONE\n"
16 "MIME-Version: 1.0\n"
17 "Content-Type: text/plain; charset=UTF-8\n"
18 "Content-Transfer-Encoding: 8bit\n"
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/linux/Documentation/cpu-freq/
H A Dcpu-drivers.rst1 .. SPDX-License-Identifier: GPL-2.0
4 How to Implement a new CPUFreq Processor Driver
10 - Dominik Brodowski <linux@brodo.de>
11 - Rafael J. Wysocki <rafael.j.wysocki@intel.com>
12 - Viresh Kumar <viresh.kumar@linaro.org>
18 1.2 Per-CPU Initialization
31 So, you just got a brand-new CPU / chipset with datasheets and want to
32 add cpufreq support for this CPU / chipset? Great. Here are some hints
37 ------------------
41 chipset. If so, register a struct cpufreq_driver with the CPUfreq core
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