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/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsdm632.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 thermal-zones {
8 /delete-node/cpu1-thermal;
9 /delete-node/cpu2-thermal;
10 /delete-node/cpu3-thermal;
12 cpu0-thermal {
13 thermal-sensors = <&tsens0 13>;
15 cooling-maps {
17 cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
25 cpu4-thermal {
[all …]
H A Dipq9574.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
9 #include <dt-bindings/clock/qcom,apss-ipq.h>
10 #include <dt-bindings/clock/qcom,ipq9574-gcc.h>
11 #include <dt-bindings/interconnect/qcom,ipq9574.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/reset/qcom,ipq9574-gcc.h>
14 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&intc>;
18 #address-cells = <2>;
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H A Dsc7180.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
8 #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7180.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7180.h>
11 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
12 #include <dt-bindings/clock/qcom,rpmh.h>
13 #include <dt-bindings/clock/qcom,videocc-sc7180.h>
14 #include <dt-bindings/firmware/qcom,scm.h>
15 #include <dt-bindings/interconnect/qcom,icc.h>
[all …]
H A Dqcs404.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-qcs404.h>
8 #include <dt-bindings/clock/qcom,turingcc-qcs404.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/power/qcom-rpmpd.h>
11 #include <dt-bindings/thermal/thermal.h>
14 interrupt-parent = <&intc>;
16 #address-cells = <2>;
17 #size-cells = <2>;
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/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos5422-odroidhc1.dts1 // SPDX-License-Identifier: GPL-2.0
10 /dts-v1/;
11 #include <dt-bindings/leds/common.h>
12 #include "exynos5422-odroid-core.dtsi"
16 compatible = "hardkernel,odroid-hc1", "samsung,exynos5800", \
19 led-controller {
20 compatible = "pwm-leds";
22 led-1 {
26 pwm-names = "pwm2";
27 max-brightness = <255>;
[all …]
H A Dexynos5422-odroidxu3-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel Odroid XU3/XU3-Lite/XU4 boards common device tree source
12 #include <dt-bindings/input/input.h>
13 #include "exynos5422-odroid-core.dtsi"
20 gpio-keys {
21 compatible = "gpio-keys";
22 pinctrl-names = "default";
23 pinctrl-0 = <&power_key>;
25 power-key {
36 debounce-interval = <0>;
[all …]
H A Dexynos5410.dtsi1 // SPDX-License-Identifier: GPL-2.0
14 #include <dt-bindings/clock/exynos5410.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 interrupt-parent = <&gic>;
30 #address-cells = <1>;
31 #size-cells = <0>;
33 cpu0: cpu@0 { label
35 compatible = "arm,cortex-a15";
37 clock-frequency = <1600000000>;
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/freebsd/sys/contrib/device-tree/Bindings/thermal/
H A Dthermal-cooling-devices.yaml1 # SPDX-License-Identifier: (GPL-2.0)
4 ---
5 $id: http://devicetree.org/schemas/thermal/thermal-cooling-devices.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Thermal cooling device
11 - Amit Kucheria <amitk@kernel.org>
14 Thermal management is achieved in devicetree by describing the sensor hardware
15 and the software abstraction of cooling devices and thermal zones required to
16 take appropriate action to mitigate thermal overload.
18 The following node types are used to completely describe a thermal management
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H A Dthermal-zones.yaml1 # SPDX-License-Identifier: (GPL-2.0)
4 ---
5 $id: http://devicetree.org/schemas/thermal/thermal-zones.yaml#
6 $schema: http://devicetree.org/meta-schemas/base.yaml#
8 title: Thermal zone
11 - Daniel Lezcano <daniel.lezcano@linaro.org>
14 Thermal management is achieved in devicetree by describing the sensor hardware
15 and the software abstraction of cooling devices and thermal zones required to
16 take appropriate action to mitigate thermal overloads.
18 The following node types are used to completely describe a thermal management
[all …]
H A Dthermal.txt1 * Thermal Framework Device Tree descriptor
4 defining hardware thermal structure using device tree.
5 A thermal structure includes thermal zones and their components,
9 The target of device tree thermal descriptors is to describe only
10 the hardware thermal aspects. The thermal device tree bindings are
14 There are five types of nodes involved to describe thermal bindings:
15 - thermal sensors: devices which may be used to take temperature
17 - cooling devices: devices which may be used to dissipate heat.
18 - trip points: describe key temperatures at which cooling is recommended. The
20 - cooling maps: used to describe links between trip points and cooling devices;
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H A Dmediatek,lvts-thermal.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/mediatek,lvts-thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek SoC Low Voltage Thermal Sensor (LVTS)
10 - Balsam CHIHI <bchihi@baylibre.com>
13 LVTS is a thermal management architecture composed of three subsystems,
14 a Sensing device - Thermal Sensing Micro Circuit Unit (TSMCU),
15 a Converter - Low Voltage Thermal Sensor converter (LVTS), and
21 - mediatek,mt7988-lvts-ap
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H A Drockchip-thermal.txt4 - compatible : should be "rockchip,<name>-tsadc"
5 "rockchip,px30-tsadc": found on PX30 SoCs
6 "rockchip,rv1108-tsadc": found on RV1108 SoCs
7 "rockchip,rk3228-tsadc": found on RK3228 SoCs
8 "rockchip,rk3288-tsadc": found on RK3288 SoCs
9 "rockchip,rk3328-tsadc": found on RK3328 SoCs
10 "rockchip,rk3368-tsadc": found on RK3368 SoCs
11 "rockchip,rk3399-tsadc": found on RK3399 SoCs
12 - reg : physical base address of the controller and length of memory mapped
14 - interrupts : The interrupt number to the cpu. The interrupt specifier format
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/marvell/
H A Darmada-ap80x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/thermal.h>
11 /dts-v1/;
14 #address-cells = <2>;
15 #size-cells = <2>;
25 compatible = "arm,psci-0.2";
29 reserved-memory {
30 #address-cells = <2>;
31 #size-cells = <2>;
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H A Darmada-ap806-dual.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include "armada-ap806.dtsi"
12 compatible = "marvell,armada-ap806-dual", "marvell,armada-ap806";
15 #address-cells = <1>;
16 #size-cells = <0>;
18 cpu0: cpu@0 { label
20 compatible = "arm,cortex-a72";
22 enable-method = "psci";
23 #cooling-cells = <2>;
25 i-cache-size = <0xc000>;
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/freebsd/sys/contrib/device-tree/src/arm64/exynos/
H A Dexynos5433-tmu.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device tree sources for Exynos5433 thermal zone
8 #include <dt-bindings/thermal/thermal.h>
11 thermal-zones {
12 atlas0_thermal: atlas0-thermal {
13 thermal-sensors = <&tmu_atlas0>;
14 polling-delay-passive = <0>;
15 polling-delay = <0>;
17 atlas0_alert_0: atlas0-alert-0 {
22 atlas0_alert_1: atlas0-alert-1 {
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am62-thermal.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
6 #include <dt-bindings/thermal/thermal.h>
8 thermal_zones: thermal-zones {
9 main0_thermal: main0-thermal {
10 polling-delay-passive = <250>; /* milliSeconds */
11 polling-delay = <500>; /* milliSeconds */
12 thermal-sensors = <&wkup_vtm0 0>;
15 main0_alert: main0-alert {
21 main0_crit: main0-crit {
[all …]
H A Dk3-am652.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
8 #include "k3-am65.dtsi"
12 #address-cells = <1>;
13 #size-cells = <0>;
14 cpu-map {
17 cpu = <&cpu0>;
26 cpu0: cpu@0 { label
27 compatible = "arm,cortex-a53";
30 enable-method = "psci";
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H A Dk3-am654.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
8 #include "k3-am65.dtsi"
12 #address-cells = <1>;
13 #size-cells = <0>;
14 cpu-map {
17 cpu = <&cpu0>;
36 cpu0: cpu@0 { label
37 compatible = "arm,cortex-a53";
40 enable-method = "psci";
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/allwinner/
H A Dsun50i-h5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <arm/allwinner/sunxi-h3-h5.dtsi>
6 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <1>;
11 #size-cells = <0>;
13 cpu0: cpu@0 { label
14 compatible = "arm,cortex-a53";
17 enable-method = "psci";
19 clock-latency-ns = <244144>; /* 8 32k periods */
20 #cooling-cells = <2>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/allwinner/
H A Dsun5i-a13.dtsi4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
47 #include <dt-bindings/thermal/thermal.h>
50 thermal-zones {
51 cpu-thermal {
53 polling-delay-passive = <250>;
54 polling-delay = <1000>;
55 thermal-sensors = <&rtp>;
57 cooling-maps {
60 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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H A Dsun8i-h3.dtsi4 * This file is dual-licensed: you can use it either under the terms
43 #include "sunxi-h3-h5.dtsi"
44 #include <dt-bindings/thermal/thermal.h>
47 cpu0_opp_table: opp-table-cpu {
48 compatible = "operating-points-v2";
49 opp-shared;
51 opp-648000000 {
52 opp-hz = /bits/ 64 <648000000>;
53 opp-microvolt = <1040000 1040000 1300000>;
54 clock-latency-ns = <244144>; /* 8 32k periods */
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/amlogic/
H A Dmeson-a1-ad402.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "meson-a1.dtsi"
10 #include <dt-bindings/thermal/thermal.h>
21 stdout-path = "serial0:115200n8";
29 reserved-memory {
33 no-map;
39 compatible = "linaro,optee-tz";
44 battery_4v2: regulator-battery-4v2 {
45 compatible = "regulator-fixed";
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Domap4-cpu-thermal.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Device Tree Source for OMAP4/5 SoC CPU thermal
5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
9 #include <dt-bindings/thermal/thermal.h>
12 polling-dela
[all...]
/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dstih418.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "stih418-clock.dtsi"
7 #include "stih407-family.dtsi"
8 #include "stih410-pinctrl.dtsi"
9 #include <dt-bindings/thermal/thermal.h>
12 #address-cells = <1>;
13 #size-cells = <0>;
16 compatible = "arm,cortex-a9";
18 /* u-boot puts hpen in SBC dmem at 0xa4 offset */
19 cpu-release-addr = <0x94100A4>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt8188.dtsi1 // SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
8 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/mailbox/mediatek,mt8188-gce.h>
12 #include <dt-bindings/phy/phy.h>
13 #include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h>
14 #include <dt-bindings/power/mediatek,mt8188-power.h>
15 #include <dt-bindings/reset/mt8188-resets.h>
[all …]

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