Home
last modified time | relevance | path

Searched +full:cpu +full:- +full:pcie (Results 1 – 25 of 505) sorted by relevance

12345678910>>...21

/linux/drivers/pci/controller/
H A Dpcie-iproc-msi.c1 // SPDX-License-Identifier: GPL-2.0
14 #include "pcie-iproc.h"
52 * struct iproc_msi_grp - iProc MSI group
68 * struct iproc_msi - iProc event queue based MSI
73 * @pcie: pointer to iProc PCIe data
94 struct iproc_pcie *pcie; member
132 struct iproc_pcie *pcie = msi->pcie; in iproc_msi_read_reg() local
134 return readl_relaxed(pcie->base + msi->reg_offsets[eq][reg]); in iproc_msi_read_reg()
141 struct iproc_pcie *pcie = msi->pcie; in iproc_msi_write_reg() local
143 writel_relaxed(val, pcie->base + msi->reg_offsets[eq][reg]); in iproc_msi_write_reg()
[all …]
/linux/tools/perf/pmu-events/arch/x86/skylakex/
H A Duncore-io.json13 …PCIe card of any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 could…
29 …PCIe card of any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 could…
44 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-3",
55 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0",
66 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 1",
77 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 2",
88 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 3",
99 "BriefDescription": "PCIe Completion Buffer Inserts; Port 0",
111 "BriefDescription": "PCIe Completion Buffer Inserts; Port 1",
123 "BriefDescription": "PCIe Completion Buffer Inserts; Port 2",
[all …]
/linux/tools/perf/pmu-events/arch/x86/cascadelakex/
H A Duncore-io.json13 …PCIe card of any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 could…
29 …PCIe card of any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 could…
44 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-3",
55 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0",
66 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 1",
77 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 2",
88 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 3",
99 "BriefDescription": "PCIe Completion Buffer Inserts; Port 0",
111 "BriefDescription": "PCIe Completion Buffer Inserts; Port 1",
123 "BriefDescription": "PCIe Completion Buffer Inserts; Port 2",
[all …]
/linux/tools/perf/pmu-events/arch/x86/sapphirerapids/
H A Duncore-io.json182 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-7",
190 "PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 0-7",
195 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0",
203 …"PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 0 : x16 card …
208 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 1",
216 …"PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 1 : x16 card …
221 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 2",
229 …"PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 2 : x16 card …
234 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 3",
242 …"PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 2 : x16 card …
[all …]
/linux/tools/perf/pmu-events/arch/x86/emeraldrapids/
H A Duncore-io.json182 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-7",
190 "PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 0-7",
195 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0",
203 …"PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 0 : x16 card …
208 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 1",
216 …"PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 1 : x16 card …
221 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 2",
229 …"PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 2 : x16 card …
234 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 3",
242 …"PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 2 : x16 card …
[all …]
/linux/arch/arm/boot/dts/marvell/
H A Darmada-xp-mv78460.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
27 #address-cells = <1>;
28 #size-cells = <0>;
29 enable-method = "marvell,armada-xp-smp";
31 cpu@0 {
32 device_type = "cpu";
33 compatible = "marvell,sheeva-v7";
[all …]
H A Darmada-385.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 #include "armada-38x.dtsi"
19 #address-cells = <1>;
20 #size-cells = <0>;
21 enable-method = "marvell,armada-380-smp";
23 cpu@0 {
24 device_type = "cpu";
25 compatible = "arm,cortex-a9";
[all …]
H A Darmada-xp-mv78230.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
25 #address-cells = <1>;
26 #size-cells = <0>;
27 enable-method = "marvell,armada-xp-smp";
29 cpu@0 {
30 device_type = "cpu";
31 compatible = "marvell,sheeva-v7";
[all …]
/linux/tools/perf/pmu-events/arch/x86/grandridge/
H A Duncore-io.json12 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
24 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
36 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
48 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
60 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
72 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
84 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
96 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
108 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
228 …"BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core …
[all …]
/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-sm1-khadas-vim3l.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "meson-sm1.dtsi"
10 #include "meson-khadas-vim3.dtsi"
11 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
17 vddcpu: regulator-vddcpu {
21 compatible = "pwm-regulator";
23 regulator-name = "VDDCPU";
24 regulator-min-microvolt = <690000>;
25 regulator-max-microvolt = <1050000>;
[all …]
/linux/arch/arm64/boot/dts/marvell/
H A Dac5x-rd-carrier-cn9131.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * Utilizing the CN913x COM Express CPU module board.
8 * only maintains a PCIe link with the CPU module,
13 * which would allow it to use an external CN9131 CPU COM Express module,
19 * When the board boots in the external CPU mode, the internal CPU is disabled,
20 * and only the switch portion of the SOC acts as a PCIe end-point, Hence there
21 * is no need to describe this internal (disabled CPU) in the device tree.
23 * There is no CPU booting in this mode on the carrier, only on the
24 * CN9131 COM Express CPU module.
25 * What runs the Linux is the CN9131 on the COM Express CPU module,
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls2088a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-2088A family SoC.
12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
13 #include "fsl-ls208xa.dtsi"
17 compatible = "arm,cortex-a72-pmu";
22 &cpu {
23 cpu0: cpu@0 {
24 device_type = "cpu";
25 compatible = "arm,cortex-a72";
28 cpu-idle-states = <&CPU_PW20>;
[all …]
/linux/arch/arm/boot/dts/airoha/
H A Den7523.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 #include <dt-bindings/interrupt-controller/irq.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/clock/en7523-clk.h>
9 interrupt-parent = <&gic>;
10 #address-cells = <1>;
11 #size-cells = <1>;
13 reserved-memory {
14 #address-cells = <1>;
[all …]
/linux/arch/powerpc/boot/dts/fsl/
H A Dp3041si-post.dtsi4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10 0>;
51 compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
[all …]
H A Dp4080si-post.dtsi4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10 0>;
51 compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
[all …]
H A Dt1040si-post.dtsi4 * Copyright 2013 - 2014 Freescale Semiconductor Inc.
35 #include <dt-bindings/thermal/thermal.h>
38 compatible = "fsl,bman-fbpr";
39 alloc-ranges = <0 0 0x10000 0>;
43 compatible = "fsl,qman-fqd";
44 alloc-ranges = <0 0 0x10000 0>;
48 compatible = "fsl,qman-pfdr";
49 alloc-ranges = <0 0 0x10000 0>;
53 #address-cells = <2>;
54 #size-cells = <1>;
[all …]
H A Dt2081si-post.dtsi4 * Copyright 2013 - 2014 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10000 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10000 0>;
51 #address-cells = <2>;
52 #size-cells = <1>;
59 compatible = "fsl,t2080-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie";
[all …]
H A Dt1023si-post.dtsi35 #include <dt-bindings/thermal/thermal.h>
38 compatible = "fsl,bman-fbpr";
39 alloc-ranges = <0 0 0x10000 0>;
43 compatible = "fsl,qman-fqd";
44 alloc-ranges = <0 0 0x10000 0>;
48 compatible = "fsl,qman-pfdr";
49 alloc-ranges = <0 0 0x10000 0>;
53 #address-cells = <2>;
54 #size-cells = <1>;
60 compatible = "fsl,t1023-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
[all …]
/linux/drivers/gpu/drm/amd/include/
H A Dkgd_pp_interface.h167 PP_SMC_POWER_PROFILE_UNKNOWN = -1,
237 * APU power is managed to system-level requirements through the PPT
247 * enum pp_power_limit_level - Used to query the power limits
255 PP_PWR_LIMIT_MIN = -1,
262 * enum pp_power_type - Used to specify the type of the requested power
275 XGMI_PLPD_NONE = -1,
283 PP_PM_POLICY_NONE = -1,
768 /* Energy (15.259uJ (2^-16) units) */
792 /*PCIE accumulated bandwidth (GB/sec) */
795 /*PCIE instantaneous bandwidth (GB/sec) */
[all …]
/linux/tools/perf/pmu-events/arch/x86/sierraforest/
H A Duncore-io.json12 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
24 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
36 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
48 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
60 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
72 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
84 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
96 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
108 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
228 …"BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core …
[all …]
/linux/tools/perf/pmu-events/arch/x86/graniterapids/
H A Duncore-io.json12 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
24 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
36 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
48 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
60 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
72 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
84 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
96 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
108 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
228 …"BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core …
[all …]
/linux/Documentation/devicetree/bindings/pci/
H A Dqcom,pcie-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PCIe Endpoint Controller
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
15 - enum:
16 - qcom,sa8775p-pcie-ep
17 - qcom,sdx55-pcie-ep
18 - qcom,sm8450-pcie-ep
[all …]
/linux/tools/perf/pmu-events/arch/x86/snowridgex/
H A Duncore-io.json13 …"PublicDescription": "Data requested of the CPU : Card reading from DRAM : Number of DWs (4 bytes)…
29 …"PublicDescription": "Data requested of the CPU : Card writing to DRAM : Number of DWs (4 bytes) t…
133 "BriefDescription": "PCIe Completion Buffer Inserts : All Ports",
145 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-7",
152 "PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 0-7",
157 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0",
164 …"PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 0 : x16 card …
169 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 1",
176 …"PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 1 : x16 card …
181 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 2",
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7d.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
7 #include <dt-bindings/reset/imx7-reset.h>
17 cpu0: cpu@0 {
18 clock-frequency = <996000000>;
19 operating-points-v2 = <&cpu0_opp_table>;
20 #cooling-cells = <2>;
21 nvmem-cells = <&fuse_grade>;
22 nvmem-cell-names = "speed_grade";
25 cpu1: cpu@1 {
26 compatible = "arm,cortex-a7";
[all …]
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra210-p3450-0000.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/input/linux-event-codes.h>
6 #include <dt-bindings/mfd/max77620.h>
12 compatible = "nvidia,p3450-0000", "nvidia,tegra210";
15 ethernet = "/pcie@1003000/pci@2,0/ethernet@0,0";
22 stdout-path = "serial0:115200n8";
30 pcie@1003000 {
33 hvddio-pex-supply = <&vdd_1v8>;
[all …]

12345678910>>...21