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/freebsd/sys/contrib/device-tree/Bindings/powerpc/
H A Dibm,powerpc-cpu-features.txt3 (skiboot/doc/device-tree/ibm,powerpc-cpu-features/binding.txt)
9 ibm,powerpc-cpu-features binding
12 This device tree binding describes CPU features available to software, with
19 /cpus/ibm,powerpc-cpu-features node binding
20 -------------------------------------------
22 Node: ibm,powerpc-cpu-features
24 Description: Container of CPU feature nodes.
26 The node name must be "ibm,powerpc-cpu-features".
35 - compatible
38 Definition: "ibm,powerpc-cpu-features"
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/freebsd/sys/contrib/device-tree/src/arm/allwinner/
H A Dsun8i-t113s.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #define SOC_PERIPHERAL_IRQ(nr) GIC_SPI nr argument
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <riscv/allwinner/sunxi-d1s-t11
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/freebsd/sys/contrib/xen/
H A Dsysctl.h24 * Copyright (c) 2002-2006, K Fraser
45 /* IN: Non-zero -> clear after reading. */
47 /* IN: Non-zero -> start index specified by @index field. */
118 uint32_t max_cpu_id; /* Largest possible CPU ID on this host */
142 /* Sub-operations: */
184 /* Get physical CPU information. */
204 int32_t node; /* NUMA node of interest (-1 for all nodes). */
228 uint32_t nr; /* entry nr in triggers & residencies, including C0 */ member
233 uint32_t nr_pc; /* entry nr in pc[] */
234 uint32_t nr_cc; /* entry nr in cc[] */
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/freebsd/sys/contrib/device-tree/src/riscv/allwinner/
H A Dsun20i-d1s.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 // Copyright (C) 2021-2022 Samuel Holland <samuel@sholland.org>
4 #define SOC_PERIPHERAL_IRQ(nr) (nr + 16) argument
6 #include "sunxi-d1s-t113.dtsi"
10 timebase-frequency = <24000000>;
11 #address-cell
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/freebsd/sys/dev/hyperv/vmbus/
H A Dvmbus_var.h1 /*-
49 * - DO NOT set it to the same value as VMBUS_SINT_MESSAGE.
50 * - DO NOT set it to 0.
72 u_long *intr_cnt; /* Hyper-V interrupt counter */
78 void *cpu_mem; /* For Hyper-V tlb hypercall */
118 struct taskqueue *vmbus_subchtq; /* for sub-chan attach/detach */
130 /* The list of usable MMIO ranges for PCIe pass-through */
144 #define VMBUS_PCPU_GET(sc, field, cpu) (sc)->vmbus_pcpu[(cpu)].field argument
145 #define VMBUS_PCPU_PTR(sc, field, cpu) &(sc)->vmbus_pcpu[(cpu)].field argument
156 #define BIT_MASK(nr) (1UL << ((nr) & (BITS_PER_LONG - 1))) argument
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/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Dmmp3.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/marvell,mmp2.h>
7 #include <dt-bindings/power/marvell,mmp2.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
17 enable-method = "marvell,mmp3-smp";
19 cpu@0 {
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/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dmicrowatt.dts1 /dts-v1/;
4 #size-cells = <0x02>;
5 #address-cells = <0x02>;
6 model-name = "microwatt";
7 compatible = "microwatt-soc";
13 reserved-memory {
14 #size-cells = <0x02>;
15 #address-cells = <0x02>;
26 #clock-cells = <0>;
27 compatible = "fixed-clock";
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/freebsd/sys/contrib/device-tree/src/riscv/renesas/
H A Dr9a07g043f.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/interrupt-controller/irq.h>
10 #define SOC_PERIPHERAL_IRQ(nr) (nr + 32) argument
16 #address-cells = <1>;
17 #size-cells = <0>;
18 timebase-frequency = <12000000>;
20 cpu0: cpu@0 {
22 device_type = "cpu";
23 #cooling-cells = <2>;
27 riscv,isa-base = "rv64i";
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/freebsd/sys/contrib/device-tree/Bindings/timer/
H A Dqcom,msm-timer.txt5 - compatible : Should at least contain "qcom,msm-timer". More specific
8 "qcom,kpss-timer" - krait subsystem
9 "qcom,scss-timer" - scorpion subsystem
11 - interrupts : Interrupts for the debug timer, the first general purpose
15 - reg : Specifies the base address of the timer registers.
17 - clocks: Reference to the parent clocks, one per output clock. The parents
20 - clock-names: The name of the clocks as free-form strings. They should be in
23 - clock-frequency : The frequency of the debug timer and the general purpose
28 - cpu-offset : per-cpu offset used when the timer is accessed without the
29 CPU remapping facilities. The offset is
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/freebsd/sys/compat/linux/
H A Dlinux_misc.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
77 * Non-standard aux entry types used in Linux ELF binaries.
80 #define LINUX_AT_PLATFORM 15 /* String identifying CPU */
81 #define LINUX_AT_HWCAP 16 /* CPU capabilities */
88 #define LINUX_AT_HWCAP2 26 /* CPU capabilities */
89 #define LINUX_AT_HWCAP3 29 /* CPU capabilities */
90 #define LINUX_AT_HWCAP4 30 /* CPU capabilities */
164 #define LINUX_OOM_SCORE_ADJ_MIN -1000
180 uint64_t nr; member
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/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dmrvl,intc.txt4 - compatible : Should be
5 "mrvl,mmp-intc" on Marvel MMP,
6 "mrvl,mmp2-intc" along with "mrvl,mmp2-mux-intc" on MMP2 or
7 "marvell,mmp3-intc" with "mrvl,mmp2-mux-intc" on MMP3
8 - reg : Address and length of the register set of the interrupt controller.
10 of the whole interrupt controller. The "marvell,mmp3-intc" controller
11 also has a secondary range for the second CPU core. If the interrupt
12 controller is mux-intc, address and length means one register. Since
13 address of mux-intc is in the range of intc. mux-intc is secondary
15 - reg-names : Name of the register set of the interrupt controller. It's
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/freebsd/share/doc/smm/01.setup/
H A D2.t49 Intel 386/486-based machines (ISA/AT or EISA bus only)
51 Sony News MIPS-based workstations
53 Omron Luna 68000-based workstations
150 HP-IB/CS80 (7912, 7914, 7933, 7936, 7945, 7957, 7958, 7959, 2200, 2203)
151 and SCSI-I (including magneto-optical).
155 Low-density CS80 cartridge (7914, 7946, 9144),
156 high-density CS80 cartridge (9145),
162 98644 built-in single-port, 98642 4-port and 98638 8-port interfaces.
185 Battery-backed real time clock,
186 builtin and 98625A/B HP-IB interfaces,
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/freebsd/sys/contrib/device-tree/Bindings/watchdog/
H A Dqcom-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/qcom-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Krait Processor Sub-system (KPSS) Watchdog timer
10 - Rajendra Nayak <quic_rjendra@quicinc.com>
14 pattern: "^(watchdog|timer)@[0-9a-f]+$"
18 - items:
19 - enum:
20 - qcom,kpss-wdt-ipq4019
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/freebsd/sys/contrib/device-tree/src/arc/
H A Daxc001.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
7 * Device tree for AXC001 770D/EM6/AS221 CPU card
8 * Note that this file only supports the 770D CPU
15 #address-cells = <2>;
16 #size-cells = <2>;
19 compatible = "simple-bus";
20 #address-cells = <1>;
21 #size-cells = <1>;
26 #clock-cells = <0>;
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H A Daxc003_idu.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 * Device tree for AXC003 CPU card: HS38x2 (Dual Core) with IDU intc
14 #address-cells = <2>;
15 #size-cells = <2>;
18 compatible = "simple-bus";
19 #address-cells = <1>;
20 #size-cells = <1>;
24 input_clk: input-clk {
25 #clock-cells = <0>;
26 compatible = "fixed-clock";
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H A Daxc003.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
7 * Device tree for AXC003 CPU card: HS38x UP configuration
14 #address-cells = <2>;
15 #size-cells = <2>;
18 compatible = "simple-bus";
19 #address-cells = <1>;
20 #size-cells = <1>;
24 input_clk: input-clk {
25 #clock-cells = <0>;
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/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos4412.dtsi1 // SPDX-License-Identifier: GPL-2.0
23 #address-cells = <1>;
24 #size-cells = <0>;
26 cpu-map {
29 cpu = <&cpu0>;
32 cpu = <&cpu1>;
35 cpu = <&cpu2>;
38 cpu = <&cpu3>;
43 cpu0: cpu@a00 {
44 device_type = "cpu";
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H A Dexynos4212.dtsi1 // SPDX-License-Identifier: GPL-2.0
23 #address-cells = <1>;
24 #size-cells = <0>;
26 cpu-map {
29 cpu = <&cpu0>;
32 cpu = <&cpu1>;
37 cpu0: cpu@a00 {
38 device_type = "cpu";
39 compatible = "arm,cortex-a9";
42 clock-names = "cpu";
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/freebsd/secure/lib/libcrypto/man/man3/
H A DOpenSSL_version.31 .\" -*- mode: troff; coding: utf-8 -*-
49 . nr % 0
50 . nr F 2
58 .TH OPENSSL_VERSION 3ossl 2025-09-30 3.5.4 OpenSSL
70 \&\- get OpenSSL version number and other information
115 indicates that this is a pre-release version, such as \f(CW"\-dev"\fR for an
116 ongoing development snapshot or \f(CW"\-alpha3"\fR for an alpha release.
136 version for the headers in use is at least at the given pre-requisite major
197 The current OpenSSL cpu settings.
198 This is the current setting of the cpu capability flags. It is usually
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H A DOPENSSL_instrument_bus.31 .\" -*- mode: troff; coding: utf-8 -*-
49 . nr % 0
50 . nr F 2
58 .TH OPENSSL_INSTRUMENT_BUS 3ossl 2025-09-30 3.5.4 OpenSSL
64 OPENSSL_instrument_bus, OPENSSL_instrument_bus2 \- instrument references to memory bus
76 are subject to irregular, apparently non-deterministic variations. The
79 bus-bound a 'flush cache line' instruction is used between probes. In
82 multi-processor systems. This also means that \fBvector[num]\fR should be
95 Return value of 0 indicates that CPU is not capable of performing the
103 Copyright 2011\-2018 The OpenSSL Project Authors. All Rights Reserved.
/freebsd/secure/lib/libcrypto/man/man7/
H A DEVP_KDF-SCRYPT.71 .\" -*- mode: troff; coding: utf-8 -*-
49 . nr % 0
50 . nr F 2
57 .IX Title "EVP_KDF-SCRYPT 7ossl"
58 .TH EVP_KDF-SCRYPT 7ossl 2025-09-30 3.5.4 OpenSSL
64 EVP_KDF\-SCRYPT \- The scrypt EVP_KDF implementation
67 Support for computing the \fBscrypt\fR password-based KDF through the \fBEVP_KDF\fR
70 The EVP_KDF\-SCRYPT algorithm implements the scrypt password-based key
71 derivation function, as described in RFC 7914. It is memory-hard in the sense
78 has to be a positive power of two, is the general work factor and scales CPU
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/freebsd/sys/contrib/device-tree/src/arm64/apm/
H A Dapm-shadowcat.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * dts file for AppliedMicro (APM) X-Gene Shadowcat SOC
9 compatible = "apm,xgene-shadowcat";
10 interrupt-parent = <&gic>;
11 #address-cells = <2>;
12 #size-cells = <2>;
15 #address-cells = <2>;
16 #size-cells = <0>;
18 cpu@0 {
19 device_type = "cpu";
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/freebsd/usr.bin/clang/llvm-dwarfdump/
H A Dllvm-dwarfdump.14 .nr rst2man-indent-level 0
7 \\$1 \\n[an-margin]
8 level \\n[rst2man-indent-level]
9 level margin: \\n[rst2man-indent\\n[rst2man-indent-level]]
10 -
11 \\n[rst2man-indent0]
12 \\n[rst2man-indent1]
13 \\n[rst2man-indent2]
18 . nr rst2man-indent\\n[rst2man-indent-level] \\n[an-margin]
19 . nr rst2man-indent-level +1
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/freebsd/contrib/ofed/infiniband-diags/man/
H A Dibsysstat.85 IBSYSSTAT \-
7 .nr rst2man-indent-level 0
10 \\$1 \\n[an-margin]
11 level \\n[rst2man-indent-level]
12 level margin: \\n[rst2man-indent\\n[rst2man-indent-level]]
13 -
14 \\n[rst2man-indent0]
15 \\n[rst2man-indent1]
16 \\n[rst2man-indent2]
21 . nr rst2man-indent\\n[rst2man-indent-level] \\n[an-margin]
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/freebsd/secure/usr.bin/openssl/man/
H A Dopenssl-info.11 .\" -*- mode: troff; coding: utf-8 -*-
49 . nr % 0
50 . nr F 2
57 .IX Title "OPENSSL-INFO 1ossl"
58 .TH OPENSSL-INFO 1ossl 2025-09-30 3.5.4 OpenSSL
64 openssl\-info \- print OpenSSL built\-in information
68 [\fB\-help\fR]
69 [\fB\-configdir\fR]
70 [\fB\-enginesdir\fR]
71 [\fB\-modulesdir\fR ]
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