| /linux/Documentation/devicetree/bindings/cpu/ |
| H A D | idle-states.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/cpu/idle-states.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Idle states
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
11 - Anup Patel <anup@brainfault.org>
15 1 - Introduction
18 ARM and RISC-V systems contain HW capable of managing power consumption
19 dynamically, where cores can be put in different low-power states (ranging
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| H A D | cpu-capacity.txt | 2 CPU capacity bindings
6 1 - Introduction
15 2 - CPU capacity definition
18 CPU capacity is a number that provides the scheduler information about CPUs
19 heterogeneity. Such heterogeneity can come from micro-architectural differences
23 capture a first-order approximation of the relative performance of CPUs.
25 CPU capacities are obtained by running a suitable benchmark. This binding makes
29 * A "single-threaded" or CPU affine benchmark
30 * Divided by the running frequency of the CPU executing the benchmark
31 * Not subject to dynamic frequency scaling of the CPU
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| /linux/Documentation/admin-guide/pm/ |
| H A D | intel_idle.rst | 1 .. SPDX-License-Identifier: GPL-2.0
5 ``intel_idle`` CPU Idle Time Management Driver
17 :doc:`CPU idle time management subsystem <cpuidle>` in the Linux kernel
18 (``CPUIdle``). It is the default CPU idle time management driver for the
24 Documentation/admin-guide/pm/cpuidle.rst if you have not done that yet.]
27 logical CPU executing it is idle and so it may be possible to put some of the
28 processor's functional blocks into low-power states. That instruction takes two
29 arguments (passed in the ``EAX`` and ``ECX`` registers of the target CPU), the
38 only way to pass early-configuration-time parameters to it is via the kernel
42 .. _intel-idle-enumeration-of-states:
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| H A D | cpuidle.rst | 1 .. SPDX-License-Identifier: GPL-2.0
5 .. |cpufreq| replace:: :doc:`CPU Performance Scaling <cpufreq>`
8 CPU Idle Time Management
19 Modern processors are generally able to enter states in which the execution of
21 memory or executed. Those states are the *idle* states of the processor.
23 Since part of the processor hardware is not used in idle states, entering them
27 CPU idle time management is an energy-efficiency feature concerned about using
28 the idle states of processors for this purpose.
31 ------------
33 CPU idle time management operates on CPUs as seen by the *CPU scheduler* (that
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| H A D | suspend-flows.rst | 1 .. SPDX-License-Identifier: GPL-2.0
12 At least one global system-wide transition needs to be carried out for the
14 :doc:`sleep states <sleep-states>`. Hibernation requires more than one
15 transition to occur for this purpose, but the other sleep states, commonly
16 referred to as *system-wide suspend* (or simply *system suspend*) states, need
19 For those sleep states, the transition from the working state of the system into
26 different sleep states of the system are quite similar, but there are some
27 significant differences between the :ref:`suspend-to-idle <s2idle>` code flows
28 and the code flows related to the :ref:`suspend-to-RAM <s2ram>` and
29 :ref:`standby <standby>` sleep states.
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| /linux/Documentation/devicetree/bindings/powerpc/opal/ |
| H A D | power-mgt.txt | 1 IBM Power-Management Bindings
5 idle states. The description of these idle states is exposed via the
6 node @power-mgt in the device-tree by the firmware.
9 ----------------
10 Typically each idle state has the following associated properties:
12 - name: The name of the idle state as defined by the firmware.
14 - flags: indicating some aspects of this idle states such as the
15 extent of state-loss, whether timebase is stopped on this
16 idle states and so on. The flag bits are as follows:
18 - exit-latency: The latency involved in transitioning the state of the
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| /linux/drivers/cpuidle/ |
| H A D | Kconfig.arm | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # ARM CPU Idle drivers
6 bool "Generic ARM CPU idle Driver"
12 It provides a generic idle driver whose idle states are configured
13 at run-time through DT nodes. The CPUidle suspend backend is
14 initialized by calling the CPU operations init idle hook
18 bool "PSCI CPU idle Driver"
24 It provides an idle driver that is capable of detecting and
25 managing idle states through the PSCI firmware interface.
28 - If the idle states are described with the non-hierarchical layout,
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| H A D | dt_idle_states.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * DT idle states parsing code.
9 #define pr_fmt(fmt) "DT idle-states: " fmt
29 * pointer of the passed in struct of_device_id array to the idle in init_state_node()
32 idle_state->enter = match_id->data; in init_state_node()
38 idle_state->enter_s2idle = match_id->data; in init_state_node()
40 err = of_property_read_u32(state_node, "wakeup-latency-us", in init_state_node()
41 &idle_state->exit_latency); in init_state_node()
45 err = of_property_read_u32(state_node, "entry-latency-us", in init_state_node()
48 pr_debug(" * %pOF missing entry-latency-us property\n", in init_state_node()
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| H A D | cpuidle-riscv-sbi.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * RISC-V SBI CPU idle driver.
9 #define pr_fmt(fmt) "cpuidle-riscv-sbi: " fmt
34 u32 *states; member
53 data->available = true; in sbi_set_domain_state()
54 data->state = state; in sbi_set_domain_state()
61 return data->state; in sbi_get_domain_state()
68 data->available = false; in sbi_clear_domain_state()
75 return data->available; in sbi_is_domain_state_available()
81 u32 *states = __this_cpu_read(sbi_cpuidle_data.states); in sbi_cpuidle_enter_state() local
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| H A D | cpuidle-psci.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * PSCI CPU idle driver.
29 #include "cpuidle-psci.h"
58 u32 *states = data->psci_states; in __psci_enter_domain_idle_state() local
59 struct device *pd_dev = data->dev; in __psci_enter_domain_idle_state()
65 return -1; in __psci_enter_domain_idle_state()
67 /* Do runtime PM to manage a hierarchical CPU toplogy. */ in __psci_enter_domain_idle_state()
75 state = states[idx]; in __psci_enter_domain_idle_state()
77 ret = psci_cpu_suspend_enter(state) ? -1 : idx; in __psci_enter_domain_idle_state()
86 /* Clear the domain state to start fresh when back from idle. */ in __psci_enter_domain_idle_state()
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| H A D | coupled.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * coupled.c - helper functions to enter the same idle state on multiple cpus
11 #include <linux/cpu.h>
21 * DOC: Coupled cpuidle states
25 * sequencing restrictions (on Tegra 2, cpu 0 must be the last to
26 * power down), or due to HW bugs (on OMAP4460, a cpu powering up
27 * will corrupt the gic state unless the other cpu runs a work
28 * around). Each cpu has a power state that it can enter without
29 * coordinating with the other cpu (usually Wait For Interrupt, or
30 * WFI), and one or more "coupled" power states that affect blocks
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| H A D | cpuidle-kirkwood.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * CPU idle Marvell Kirkwood SoCs
5 * The cpu idle uses wait-for-interrupt and DDR self refresh in order
6 * to implement two idle states -
7 * #1 wait-for-interrupt
8 * #2 wait-for-interrupt and DDR self refresh
27 /* Actual code that puts the SoC in different idle states */
41 .states[0] = ARM_CPUIDLE_WFI_STATE,
42 .states[1] = {
52 /* Initialize CPU idle by registering the idle states */
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| H A D | cpuidle-at91.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * based on arch/arm/mach-kirkwood/cpuidle.c
5 * CPU idle support for AT91 SoC
7 * The cpu idle uses wait-for-interrupt and RAM self refresh in order
8 * to implement two idle states -
9 * #1 wait-for-interrupt
10 * #2 wait-for-interrupt and RAM self refresh
25 /* Actual code that puts the SoC in different idle states */
37 .states[0] = ARM_CPUIDLE_WFI_STATE,
38 .states[1] = {
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| /linux/tools/power/cpupower/man/ |
| H A D | cpupower-idle-set.1 | 1 .TH "CPUPOWER-IDLE-SET" "1" "0.1" "" "cpupower Manual"
4 cpupower\-idle\-set \- Utility to set cpu idle state specific kernel options
7 cpupower [ \-c cpulist ] idle\-set [\fIoptions\fP]
10 The cpupower idle\-set subcommand allows to set cpu idle, also called cpu
12 sleep states. This can be handy for power vs performance tuning.
16 \fB\-d\fR \fB\-\-disable\fR <STATE_NO>
19 \fB\-e\fR \fB\-\-enable\fR <STATE_NO>
22 \fB\-D\fR \fB\-\-disable-by-latency\fR <LATENCY>
23 Disable all idle states with a equal or higher latency than <LATENCY>.
25 Enable all idle states with a latency lower than <LATENCY>.
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| H A D | cpupower-idle-info.1 | 1 .TH "CPUPOWER-IDLE-INFO" "1" "0.1" "" "cpupower Manual"
4 cpupower\-idle\-info \- Utility to retrieve cpu idle kernel information
7 cpupower [ \-c cpulist ] idle\-info [\fIoptions\fP]
10 A tool which prints out per cpu idle information helpful to developers and interested users.
14 \fB\-f\fR \fB\-\-silent\fR
15 Only print a summary of all available C-states in the system.
17 \fB\-e\fR \fB\-\-proc\fR
19 Prints out idle information in old /proc/acpi/processor/*/power format. This
23 .SH IDLE\-INFO DESCRIPTIONS
26 statistics when it enters or leaves an idle state, therefore on a very idle or
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| H A D | cpupower-monitor.1 | 1 .TH CPUPOWER\-MONITOR "1" "22/02/2011" "" "cpupower Manual"
3 cpupower\-monitor \- Report processor frequency and idle statistics
7 .RB "\-l"
10 .RB [ -c ] [ "\-m <mon1>," [ "<mon2>,..." ] ]
11 .RB [ "\-i seconds" ]
14 .RB [ -c ][ "\-m <mon1>," [ "<mon2>,..." ] ]
18 \fBcpupower-monitor \fP reports processor topology, frequency and idle power
22 \fBcpupower-monitor \fP implements independent processor sleep state and
24 directly reading out hardware registers. Use \-l to get an overview which are
29 \-l
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| /linux/Documentation/driver-api/pm/ |
| H A D | cpuidle.rst | 1 .. SPDX-License-Identifier: GPL-2.0
5 CPU Idle Time Management
13 CPU Idle Time Management Subsystem
18 cores) is idle after an interrupt or equivalent wakeup event, which means that
19 there are no tasks to run on it except for the special "idle" task associated
21 belongs to. That can be done by making the idle logical CPU stop fetching
23 depended on by it into an idle state in which they will draw less power.
25 However, there may be multiple different idle states that can be used in such a
28 particular idle state. That is the role of the CPU idle time management
35 units: *governors* responsible for selecting idle states to ask the processor
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| /linux/drivers/cpuidle/governors/ |
| H A D | teo.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Timer events oriented CPU idle governor
5 * Copyright (C) 2018 - 2021 Intel Corporation
10 * DOC: teo-description
14 * other interrupt types, so they are likely to dominate CPU wakeup patterns.
16 * can be determined at the idle state selection time, although doing that may
18 * for idle state selection.
20 * Of course, non-timer wakeup sources are more important in some use cases,
21 * but even then it is generally unnecessary to consider idle duration values
24 * CPU anyway unless it is woken up earlier.
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| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | fsl-ls2088a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-2088A family SoC.
12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
13 #include "fsl-ls208xa.dtsi"
17 compatible = "arm,cortex-a72-pmu";
22 &cpu {
23 cpu0: cpu@0 {
24 device_type = "cpu";
25 compatible = "arm,cortex-a72";
28 cpu-idle-states = <&CPU_PW20>;
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| H A D | fsl-ls2080a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
5 * Copyright 2014-2016 Freescale Semiconductor, Inc.
12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
13 #include "fsl-ls208xa.dtsi"
17 compatible = "arm,cortex-a57-pmu";
22 &cpu {
23 cpu0: cpu@0 {
24 device_type = "cpu";
25 compatible = "arm,cortex-a57";
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| /linux/Documentation/devicetree/bindings/arm/ |
| H A D | psci.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
15 processors") can be used by Linux to initiate various CPU-centric power
18 Issue A of the specification describes functions for CPU suspend, hotplug
25 r0 => 32-bit Function ID / return value
26 {r1 - r3} => Parameters
40 - description:
44 - description:
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| /linux/arch/arm64/boot/dts/sprd/ |
| H A D | ums9620.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 interrupt-parent = <&gic>;
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <2>;
17 #size-cells = <0>;
19 cpu-map {
22 cpu = <&CPU0>;
25 cpu = <&CPU1>;
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| /linux/arch/arm64/boot/dts/arm/ |
| H A D | juno-r2.dts | 9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/arm/coresight-cti-dt.h>
13 #include "juno-base.dtsi"
14 #include "juno-cs-r1r2.dtsi"
18 compatible = "arm,juno-r2", "arm,juno", "arm,vexpress";
19 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <2>;
28 stdout-path = "serial0:115200n8";
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| H A D | juno.dts | 4 * Copyright (c) 2013-2014 ARM Ltd.
9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/arm/coresight-cti-dt.h>
13 #include "juno-base.dtsi"
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
27 stdout-path = "serial0:115200n8";
31 compatible = "arm,psci-0.2";
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| H A D | juno-r1.dts | 9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/arm/coresight-cti-dt.h>
13 #include "juno-base.dtsi"
14 #include "juno-cs-r1r2.dtsi"
18 compatible = "arm,juno-r1", "arm,juno", "arm,vexpress";
19 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <2>;
28 stdout-path = "serial0:115200n8";
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